TWI619932B - Thermal pile sensing structure integrated with capacitor - Google Patents

Thermal pile sensing structure integrated with capacitor Download PDF

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TWI619932B
TWI619932B TW105132814A TW105132814A TWI619932B TW I619932 B TWI619932 B TW I619932B TW 105132814 A TW105132814 A TW 105132814A TW 105132814 A TW105132814 A TW 105132814A TW I619932 B TWI619932 B TW I619932B
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capacitor
sensing
sensing structure
thermopile
layer
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TW105132814A
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TW201716756A (en
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蔡明翰
王世霖
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原相科技股份有限公司
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Abstract

本發明提出一種整合電容之熱電堆感測結構。整合電容之熱電堆感測結構包含: 基板、紅外線感應單元及分隔 (partition)結構。紅外線感應單元位於基板上,紅外線感應單元具有第一感應結構及第二感應結構,其中第一感應結構及第二感應結構彼此相近之一端為熱端 (Hot junction)。分隔結構圍繞紅外線感應單元,其中分隔結構與第一感應結構彼此相近之一端為一冷端 (Cold junction),分隔結構與該第二感應結構彼此相近之一端為另一冷端。其中,熱端與冷端間之溫度差產生電壓差訊號,且其中,分隔結構之一部分構成至少一電容。The invention provides a thermopile sensing structure with integrated capacitors. The thermopile sensing structure of the integrated capacitor includes a substrate, an infrared sensing unit, and a partition structure. The infrared sensing unit is located on the substrate. The infrared sensing unit has a first sensing structure and a second sensing structure. One end of the first sensing structure and the second sensing structure that are close to each other is a hot junction. The partition structure surrounds the infrared sensing unit, wherein one end of the partition structure and the first sensing structure that is close to each other is a cold junction, and one end of the partition structure and the second sensing structure that is close to each other is a cold end. The temperature difference between the hot end and the cold end generates a voltage difference signal, and a part of the separation structure constitutes at least one capacitor.

Description

整合電容之熱電堆感測結構Thermopile sensing structure with integrated capacitor

本發明係有關一種整合電容之熱電堆感測結構,特別是指一種整合有MIM電容及/或PIP電容,以節省晶片面積並降低雜訊的整合電容之熱電堆感測結構。The invention relates to a thermopile sensing structure with integrated capacitors, in particular to a thermopile sensing structure with integrated capacitors that integrates MIM capacitors and / or PIP capacitors to save chip area and reduce noise.

請參考第1圖並對照第2圖。第1圖顯示先前技術之熱電堆感測結構應用於溫度感測模組的功能方塊圖。第2圖顯示先前技術之熱電堆感測結構的剖面圖。先前技術之溫度感測模組100包含一習知熱電堆感測結構10、一雜訊過濾器81、一雜訊過濾器82、一差分放大器Amp、一類比數位轉換器ADC及一溫度感測器80。熱電堆感測結構10透過溫度差的變化產生一電壓差訊號VDS,以此方式感應溫度。熱電堆感測結構10所產生的電壓差訊號輸出後,藉由雜訊過濾器81及雜訊過濾器82的處理而輸入至差分放大器Amp。差分放大器Amp將訊號處理後輸入至類比數位轉換器ADC。類比數位轉換器ADC亦接收溫度感測器80所輸出的一溫度訊號TS。雜訊過濾器81及雜訊過濾器82分別具有電容C1及電容C2。此外,溫度感測模組100尚包含一電容C3。在此先前技術中,電容C1、電容C2、熱電堆感測結構10為三個獨立分開、各自封裝的零件。Please refer to Figure 1 and compare with Figure 2. FIG. 1 is a functional block diagram of a prior art thermopile sensing structure applied to a temperature sensing module. Figure 2 shows a cross-sectional view of a prior art thermopile sensing structure. The prior art temperature sensing module 100 includes a conventional thermopile sensing structure 10, a noise filter 81, a noise filter 82, a differential amplifier Amp, an analog-to-digital converter ADC, and a temperature sensor.器 80。 80. The thermopile sensing structure 10 generates a voltage difference signal VDS through a change in temperature difference, thereby sensing temperature. After the voltage difference signal generated by the thermopile sensing structure 10 is output, it is processed by the noise filter 81 and the noise filter 82 and input to the differential amplifier Amp. The differential amplifier Amp processes the signal and inputs it to the analog-to-digital converter ADC. The analog-to-digital converter ADC also receives a temperature signal TS output from the temperature sensor 80. The noise filter 81 and the noise filter 82 have a capacitor C1 and a capacitor C2, respectively. In addition, the temperature sensing module 100 further includes a capacitor C3. In this prior art, the capacitor C1, the capacitor C2, and the thermopile sensing structure 10 are three separate and separately packaged parts.

請參考第2圖。習知熱電堆感測結構10包含: 一基板11; 一紅外線感應單元16,位於基板11上; 紅外線感應單元16具有一第一感應結構161及一第二感應結構162,其中第一感應結構161及第二感應結構162彼此相近之一端為一熱端 (Hot junction);以及一分隔 (partition)結構15,圍繞紅外線感應單元16,其中分隔結構15與第一感應結構161彼此相近之一端為一冷端 (Cold junction)C,分隔結構15與第二感應結構162彼此相近之一端為另一冷端C,其中,熱端H與冷端C間之溫度差產生一電壓差訊號VDS。為使紅外線感應單元16更精確地感應訊號,此先前技術更設置一濾光層14,藉由一結合層13而連接於熱電堆感測結構10的本體。Please refer to Figure 2. The conventional thermopile sensing structure 10 includes: a substrate 11; an infrared sensing unit 16 on the substrate 11; the infrared sensing unit 16 has a first sensing structure 161 and a second sensing structure 162, of which the first sensing structure 161 One end of the second sensing structure 162 that is close to each other is a hot junction; and a partition structure 15 that surrounds the infrared sensing unit 16, wherein one end of the partitioning structure 15 and the first sensing structure 161 that is close to each other is a hot junction. Cold junction C. One end of the separation structure 15 and the second sensing structure 162 that is close to each other is the other cold junction C. The temperature difference between the hot junction H and the cold junction C generates a voltage difference signal VDS. In order to make the infrared sensing unit 16 more accurately sense signals, the prior art further provided a filter layer 14 connected to the body of the thermopile sensing structure 10 through a bonding layer 13.

以CMOS製程來製作此習知熱電堆感測結構10時,分隔結構15通常包含多晶矽層poly1、多層的金屬層M1-M4(舉例顯示為四層,但數目不限於為四)、以及多層的通道層V。第一感應結構161及第二感應結構162由金屬層M1與多晶矽層poly1構成。各電性結構之間以介電質層12來絕緣。電壓差訊號VDS的傳送則藉由電晶體電路17來達成。When the conventional thermopile sensing structure 10 is manufactured by a CMOS process, the separation structure 15 usually includes a polycrystalline silicon layer poly1, multiple metal layers M1-M4 (shown as four layers for example, but the number is not limited to four), and multi-layered Channel layer V. The first sensing structure 161 and the second sensing structure 162 are composed of a metal layer M1 and a polycrystalline silicon layer poly1. The electrical structures are insulated by a dielectric layer 12. The transmission of the voltage difference signal VDS is achieved by the transistor circuit 17.

在此先前技術中,如前所述,在熱電堆感測結構10至電路的路徑上會設置電容C1、C2以過濾雜訊,而電容C1、電容C2、熱電堆感測結構10三者為三個獨立分開、各自封裝的零件。此一先前技術的缺點是整體電路較耗面積且成本較高。In this prior art, as mentioned earlier, capacitors C1 and C2 are provided on the path from the thermopile sensing structure 10 to the circuit to filter noise, and the three capacitors C1, C2, and thermopile sensing structure 10 are: Three separate, individually packaged parts. The disadvantage of this prior art is that the overall circuit is relatively area-consuming and costly.

有鑑於此,本發明即針對上述先前技術之不足,提出一種整合有MIM電容及/或PIP電容,以節省晶片面積並降低雜訊的整合電容之熱電堆感測結構。In view of this, the present invention addresses the shortcomings of the foregoing prior art, and proposes a thermopile sensing structure with integrated capacitors that integrates MIM capacitors and / or PIP capacitors to save chip area and reduce noise.

就其中一觀點言,本發明提供了一種整合電容之熱電堆感測結構,包含: 一基板;一紅外線感應單元,位於該基板上,從一垂直切開該基板之剖面圖視之,該紅外線感應單元具有一第一感應結構及一第二感應結構,其中該第一感應結構及該第二感應結構彼此相近之一端為一熱端 (Hot junction);以及一分隔 (partition)結構,圍繞該紅外線感應單元,其中該分隔結構與該第一感應結構彼此相近之一端為一冷端 (Cold junction),該分隔結構與該第二感應結構彼此相近之一端為另一冷端,該熱端與該冷端間之溫度差產生一電壓差訊號,且該分隔結構之一部分構成至少一電容。In one aspect, the present invention provides a thermopile sensing structure with integrated capacitors, including: a substrate; an infrared sensing unit located on the substrate; viewed from a cross-sectional view of the substrate cut vertically, the infrared sensing The unit has a first sensing structure and a second sensing structure, wherein one end of the first sensing structure and the second sensing structure being close to each other is a hot junction; and a partition structure surrounds the infrared ray. A sensing unit, wherein one end of the partition structure and the first sensing structure that is close to each other is a cold junction, one end of the partition structure and the second sensing structure that is close to each other is another cold end, and the hot end is connected to the The temperature difference between the cold junctions generates a voltage difference signal, and a part of the separation structure constitutes at least one capacitor.

在一種較佳的實施型態中,該電容為一金屬-絕緣-金屬(Metal-Insulator-Metal, MIM)電容或一多晶矽-絕緣-多晶矽 (Polysilicon-Insulator-Polysilicon, PIP)電容。In a preferred embodiment, the capacitor is a metal-insulator-metal (MIM) capacitor or a polysilicon-insulator-polysilicon (PIP) capacitor.

在上述較佳的實施型態中,該分隔結構包含疊置之複數金屬層與複數通道層,且該MIM電容包含由金屬層構成之上下極板。In the above-mentioned preferred embodiment, the separation structure includes a plurality of metal layers and a plurality of channel layers that are stacked, and the MIM capacitor includes upper and lower electrode plates composed of a metal layer.

在上述較佳的實施型態中,該分隔結構包含疊置之複數金屬層、複數通道層及複數多晶矽層,且該PIP電容包含由多晶矽層構成之上下極板。In the above-mentioned preferred embodiment, the separation structure includes a plurality of metal layers, a plurality of channel layers, and a plurality of polycrystalline silicon layers that are stacked, and the PIP capacitor includes upper and lower electrode plates composed of a polycrystalline silicon layer.

在一種較佳的實施型態中,整合電容之熱電堆感測結構更包含: 一介電質層,位於該基板上,其中該紅外線感應單元與該分隔結構形成於該介電質層之中。In a preferred embodiment, the thermopile sensing structure of the integrated capacitor further includes: a dielectric layer on the substrate, wherein the infrared sensing unit and the separation structure are formed in the dielectric layer. .

在上述較佳的實施型態中,整合電容之熱電堆感測結構更包含: 一結合層,位於該介電質層上 ; 以及一濾光層,用以過濾除了紅外線以外的訊號,該濾光層藉由該結合層與該介電質層相連。In the above preferred embodiment, the thermopile sensing structure of the integrated capacitor further includes: a bonding layer on the dielectric layer; and a filter layer for filtering signals other than infrared, the filter The optical layer is connected to the dielectric layer through the bonding layer.

在一種較佳的實施型態中,該熱端與該冷端間之溫度差經由一電晶體電路處理而產生該電壓差訊號,該電晶體電路形成於該基板上。In a preferred embodiment, the temperature difference between the hot end and the cold end is processed by a transistor circuit to generate the voltage difference signal, and the transistor circuit is formed on the substrate.

就另一觀點言,本發明提供了一種整合電容之熱電堆感測結構,包含:一基板,具有一空腔;一紅外線感應單元,位於該基板上,該紅外線感應單元具有一第一半導體堆疊結構,其中該第一半導體堆疊結構位於該空腔處之一端為一熱端;以及一分隔 結構,位於該紅外線感應單元周邊,其中該分隔結構與該第一半導體堆疊結構彼此相近之一端為一冷端,該熱端與該冷端間之溫度差產生一電壓差訊號,該分隔結構之一部分構成至少一電容。In another aspect, the present invention provides a thermopile sensing structure with integrated capacitors, including: a substrate having a cavity; an infrared sensing unit located on the substrate; the infrared sensing unit having a first semiconductor stack structure Wherein one end of the first semiconductor stack structure located at the cavity is a hot end; and a partition structure located at the periphery of the infrared sensing unit, wherein one end of the partition structure and the first semiconductor stack structure that is close to each other is a cold end. The temperature difference between the hot end and the cold end generates a voltage difference signal, and a part of the separation structure constitutes at least one capacitor.

在一種較佳的實施型態中,該分隔結構之至少一部分的膜層與該第一半導體堆疊結構的膜層為相同膜層。In a preferred embodiment, the film layer of at least a part of the separation structure is the same film layer as the film layer of the first semiconductor stack structure.

在一種較佳的實施型態中,該至少一電容為一金屬-絕緣-金屬(Metal-Insulator-Metal, MIM)電容或一多晶矽-絕緣-多晶矽(Polysilicon-Insulator-Polysilicon, PIP)電容。In a preferred embodiment, the at least one capacitor is a metal-insulator-metal (MIM) capacitor or a polysilicon-insulator-polysilicon (PIP) capacitor.

在一種較佳的實施型態中,該第一半導體堆疊結構包括二層互相連接之熱傳導材料,其中,該其中之一層熱傳導材料的Seebeck係數不同於該其中之另一層熱傳導材料的Seebeck係數。In a preferred embodiment, the first semiconductor stack structure includes two layers of thermally conductive material connected to each other, wherein a Seebeck coefficient of one of the thermally conductive materials is different from a Seebeck coefficient of the other thermally conductive material.

在一種較佳的實施型態中,整合電容之熱電堆感測結構更包含:一第二半導體堆疊結構,其中該第一半導體堆疊結構及該第二半導體堆疊結構彼此相近之一端為該熱端,該分隔結構與該第一半導體堆疊結構彼此相近之一端為該冷端,該分隔結構與該第二半導體堆疊結構彼此相近之一端為另一冷端。In a preferred embodiment, the thermopile sensing structure of the integrated capacitor further includes a second semiconductor stack structure, wherein one end of the first semiconductor stack structure and the second semiconductor stack structure that is close to each other is the hot end. One end of the partition structure and the first semiconductor stack structure that is close to each other is the cold end, and one end of the partition structure and the second semiconductor stack structure that is close to each other is the other cold end.

在一種較佳的實施型態中,該分隔結構之至少一部分的膜層與該第二半導體堆疊結構的膜層為相同膜層。In a preferred embodiment, the film layer of at least a part of the separation structure is the same film layer as the film layer of the second semiconductor stack structure.

底下藉由具體實施例詳加說明,當更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。Detailed descriptions will be provided below through specific embodiments to make it easier to understand the purpose, technical content, features and effects of the present invention.

有關本發明之前述及其他技術內容、特點與功效,在以下配合參考圖式之一較佳實施例的詳細說明中,將可清楚的呈現。本發明中的圖式均屬示意,主要意在表示各裝置以及各元件之間之功能作用關係,至於形狀、厚度與寬度則並未依照比例繪製。The foregoing and other technical contents, features, and effects of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the accompanying drawings. The drawings in the present invention are schematic, and are mainly intended to represent the functional relationship between each device and each component. As for the shape, thickness, and width, they are not drawn to scale.

請參考第3圖並對照第4圖。第3圖顯示本發明之熱電堆感測結構應用於溫度感測模組的功能方塊圖。第4圖顯示本發明之整合電容之熱電堆感測結構之第一實施例的剖面圖。本實施例之溫度感測模組200包含一整合電容之熱電堆感測結構20、一差分放大器Amp、一類比數位轉換器ADC及一溫度感測器80。與先前技術之溫度感測模組100不同的是: 先前技術之溫度感測模組100係在習知熱電堆感測結構10之外,另外設置雜訊過濾器13及雜訊過濾器14 (即熱電堆感測結構10、電容C1、電容C2為三個分開製造、獨立封裝的元件)。然而,本實施例之整合電容之熱電堆感測結構20係將雜訊過濾器13及雜訊過濾器14整合在熱電堆感測結構20當中。其中,雜訊過濾器13及雜訊過濾器14分別具有電容C1及電容C2。意即,本實施例之熱電堆感測結構20係整合了電容C1及電容C2 在單一封裝之內(關於電容C1及電容C2如何被整合於熱電堆感測結構20的半導體結構特徵及細節,容後詳述)。Please refer to Figure 3 and compare with Figure 4. FIG. 3 shows a functional block diagram of the thermopile sensing structure of the present invention applied to a temperature sensing module. FIG. 4 is a cross-sectional view of a first embodiment of a thermopile sensing structure with integrated capacitors according to the present invention. The temperature sensing module 200 of this embodiment includes a thermopile sensing structure 20 with integrated capacitors, a differential amplifier Amp, an analog-to-digital converter ADC, and a temperature sensor 80. The difference from the prior art temperature sensing module 100 is that the prior art temperature sensing module 100 is in addition to the conventional thermopile sensing structure 10, and additionally has a noise filter 13 and a noise filter 14 ( That is, the thermopile sensing structure 10, the capacitor C1, and the capacitor C2 are three separately manufactured and independently packaged components). However, the thermopile sensing structure 20 with integrated capacitors in this embodiment integrates the noise filter 13 and the noise filter 14 into the thermopile sensing structure 20. The noise filter 13 and the noise filter 14 have a capacitor C1 and a capacitor C2, respectively. In other words, the thermopile sensing structure 20 of this embodiment integrates the capacitors C1 and C2 in a single package (about how the capacitors C1 and C2 are integrated into the semiconductor structure characteristics and details of the thermopile sensing structure 20, Details later).

熱電堆感測結構20的設計原理是利用Seebeck效應。其原理為導電材料內部若存在不同的溫度差,則會產生不同的熱電動勢,因此若給予材料兩端(即如第4圖所示之熱端H與冷端C)不同之溫度,便會有電壓差產生,且透過使用不同的導電材料來進行溫度感應,可以放大此電壓差訊號。簡言之,本實施例之整合電容之熱電堆感測結構20透過熱端H與冷端C (如第4圖所示)間之溫度差的變化產生一電壓差訊號VDS (如第3圖所示),以此方式感應溫度。The design principle of the thermopile sensing structure 20 is to use the Seebeck effect. The principle is that if there are different temperature differences inside the conductive material, different thermoelectromotive forces will be generated. Therefore, if the two ends of the material (that is, the hot end H and the cold end C shown in Figure 4) are given different temperatures, they will A voltage difference is generated, and the temperature difference signal can be amplified by using different conductive materials for temperature sensing. In short, the thermopile sensing structure 20 of the integrated capacitor in this embodiment generates a voltage difference signal VDS (as shown in FIG. 3) through a change in the temperature difference between the hot end H and the cold end C (as shown in FIG. 4). (Shown) to sense temperature in this way.

熱電堆感測結構20所產生的電壓差訊號VDS經由內部所整合的雜訊過濾器13及雜訊過濾器14處理後,予以輸出。輸出之電壓差訊號VDS被輸入至差分放大器Amp。差分放大器Amp將訊號處理後輸入至類比數位轉換器ADC。為使訊號穩定,在差分放大器Amp的兩輸入端之間可設置一電容C3。此外類比數位轉換器ADC例如但不限於可另接收溫度感測器80所輸出的一溫度訊號TS做為參考。溫度感測模組的電路運作方式為習知,在此不詳細敘述。The voltage difference signal VDS generated by the thermopile sensing structure 20 is processed by the internally integrated noise filter 13 and the noise filter 14 and then output. The output voltage difference signal VDS is input to the differential amplifier Amp. The differential amplifier Amp processes the signal and inputs it to the analog-to-digital converter ADC. In order to stabilize the signal, a capacitor C3 may be provided between the two input terminals of the differential amplifier Amp. In addition, the analog-to-digital converter ADC can receive, for example, but not limited to, a temperature signal TS output by the temperature sensor 80 as a reference. The circuit operation mode of the temperature sensing module is known and will not be described in detail here.

請參考第4圖。本實施例之整合電容之熱電堆感測結構20包含: 一基板11、一紅外線感應單元16、一分隔 (partition)結構25、一結合層13以及一濾光層14。基板11例如但不限於為矽基板。基板11具有一空腔11A。紅外線感應單元16位於基板上11,可用以感應紅外線。在一實施例中,紅外線感應單元16係用以感應遠紅外線。Please refer to Figure 4. The thermopile sensing structure 20 with integrated capacitors in this embodiment includes a substrate 11, an infrared sensing unit 16, a partition structure 25, a bonding layer 13, and a filter layer 14. The substrate 11 is, for example, but not limited to, a silicon substrate. The substrate 11 has a cavity 11A. The infrared sensing unit 16 is located on the substrate 11 and can be used to sense infrared rays. In one embodiment, the infrared sensing unit 16 is used to sense far infrared rays.

在一實施例中,從一垂直切開該基板之剖面圖(例如第4圖)視之,紅外線感應單元16可具有至少一個一第一感應結構161及一第二感應結構162。如第4圖所示,第一感應結構161例如但不限於可為一第一半導體堆疊結構,在一實施例中,其具有至少兩層熱傳導材料,而這兩層熱傳導材料的Seebeck係數彼此不同。在一實施例中,第一感應結構161包含,由上至下,例如但不限於,一金屬層M1及一多晶矽層Poly1。如第4圖所示,第二感應結構162例如但不限於可為一第二半導體堆疊結構,在一實施例中,其具有至少兩層熱傳導材料,而這兩層熱傳導材料的Seebeck係數彼此不同。在一實施例中,第一感應結構161包含,由上至下,例如但不限於,一金屬層M1及一多晶矽層Poly1。金屬層M1和多晶矽層Poly1的材料都為熱傳導材料,但值得注意的是,金屬層M1的Seebeck係數不同於多晶矽層Poly1 的Seebeck係數。在此實施例中,第一感應結構161及第二感應結構162彼此係為對稱設置。在這樣的設置中,第一感應結構161及第二感應結構162彼此相近之一端(靠近空腔11A處之一端)為一熱端 (Hot junction) H。分隔結構15係位於紅外線感應單元16周邊並圍繞著紅外線感應單元16,其中分隔結構25與第一感應結構161彼此相近之一端為一冷端 (Cold junction) C,分隔結構25與第二感應結構162彼此相近之一端為另一冷端C。如上所述,本實施例之整合電容之熱電堆感測結構20透過熱端H與冷端C間之溫度差產生一電壓差訊號VDS,以此方式感應溫度。In an embodiment, viewed from a cross-sectional view (eg, FIG. 4) of the substrate cut vertically, the infrared sensing unit 16 may have at least one first sensing structure 161 and a second sensing structure 162. As shown in FIG. 4, the first sensing structure 161 may be, for example, but not limited to, a first semiconductor stack structure. In one embodiment, it has at least two layers of thermally conductive material, and the Seebeck coefficients of the two layers of thermally conductive material are different from each other. . In one embodiment, the first sensing structure 161 includes, from top to bottom, for example, but not limited to, a metal layer M1 and a polycrystalline silicon layer Poly1. As shown in FIG. 4, the second sensing structure 162 may be, for example, but not limited to, a second semiconductor stack structure. In one embodiment, it has at least two layers of thermally conductive material, and the Seebeck coefficients of the two layers of thermally conductive material are different from each other. . In one embodiment, the first sensing structure 161 includes, from top to bottom, for example, but not limited to, a metal layer M1 and a polycrystalline silicon layer Poly1. The material of the metal layer M1 and the polycrystalline silicon layer Poly1 are both thermally conductive materials, but it is worth noting that the Seebeck coefficient of the metal layer M1 is different from the Seebeck coefficient of the polycrystalline silicon layer Poly1. In this embodiment, the first sensing structure 161 and the second sensing structure 162 are symmetrically disposed with each other. In such an arrangement, one end (the end near the cavity 11A) of the first sensing structure 161 and the second sensing structure 162 that is close to each other is a hot junction H. The partition structure 15 is located around the infrared sensing unit 16 and surrounds the infrared sensing unit 16. The partition structure 25 and the first sensing structure 161 are close to each other at a cold junction C. The partition structure 25 and the second sensing structure One end of 162 which is close to each other is the other cold end C. As described above, the thermopile sensing structure 20 of the integrated capacitor in this embodiment generates a voltage difference signal VDS through the temperature difference between the hot end H and the cold end C, thereby sensing the temperature.

值得注意的是,紅外線感應單元16不必須一定得具有二個對稱設置的感應結構 (即161和162)。在另一實施例中,紅外線感應單元16可以僅具有一個感應結構(例如但不限於可為上述的第一半導體堆疊結構,即第一感應結構161)。在這樣的設置中,第一感應結構161位於空腔11A之一端為熱端 (Hot junction) H。分隔結構15與第一感應結構161彼此相近之一端為冷端 (Cold junction) C。 類似地,在這樣的設置中,如上所述,本實施例之整合電容之熱電堆感測結構20透過熱端H與冷端C間之溫度差產生一電壓差訊號VDS,以此方式感應溫度。更詳言之,在其中一種實施例中,從剖面圖視之,紅外線感應單元16可以僅具有一個感應結構而為非對稱形狀。或者,在另一實施例中,從頂視圖觀之,感應結構是由前述的半導體堆疊結構,以熱端H延伸處為圓心、以冷端C為圓周所圍繞而成的一個扇形或圓形,此情況下,從剖面圖(例如第4圖)視之,紅外線感應單元16具有對稱的兩個感應結構,但該兩感應結構實際上屬於同一個半導體堆疊結構的不同位置。以上所述皆屬本案的範圍。此外,本實施例具有介電質層12,其位於基板11上。在一實施例中,介電質層12例如但不限於為二氧化矽 (SiO2),其在本實施例中用以作為一種吸收紅外線訊號的材料。本實施例之紅外線感應單元16與分隔結構25形成於介電質層12之中。It is worth noting that the infrared sensing unit 16 does not necessarily have to have two symmetrically arranged sensing structures (i.e., 161 and 162). In another embodiment, the infrared sensing unit 16 may have only one sensing structure (such as, but not limited to, the above-mentioned first semiconductor stack structure, that is, the first sensing structure 161). In such an arrangement, the first sensing structure 161 is located at one end of the cavity 11A as a hot junction H. One end of the partition structure 15 and the first sensing structure 161 which is close to each other is a cold junction C. Similarly, in such a setting, as described above, the thermopile sensing structure 20 of the integrated capacitor of this embodiment generates a voltage difference signal VDS through the temperature difference between the hot end H and the cold end C, and thus senses the temperature . More specifically, in one of the embodiments, the infrared sensing unit 16 may have only one sensing structure and an asymmetric shape as viewed from a cross-sectional view. Or, in another embodiment, viewed from a top view, the sensing structure is a sector or circle formed by the aforementioned semiconductor stack structure, with the hot end H extending as the center and the cold end C as the circumference. In this case, viewed from a cross-sectional view (for example, FIG. 4), the infrared sensing unit 16 has two symmetrical sensing structures, but the two sensing structures actually belong to different positions of the same semiconductor stack structure. All the above are within the scope of this case. In addition, this embodiment has a dielectric layer 12 which is located on the substrate 11. In one embodiment, the dielectric layer 12 is, for example, but not limited to, silicon dioxide (SiO2), which is used as a material for absorbing infrared signals in this embodiment. The infrared sensing unit 16 and the separation structure 25 in this embodiment are formed in the dielectric layer 12.

結合層13位於介電質層12上 。濾光層14藉由結合層13與介電質層12相連。濾光層14可以幫助整合電容之熱電堆感測結構20過濾除了紅外線以外的訊號。The bonding layer 13 is located on the dielectric layer 12. The filter layer 14 is connected to the dielectric layer 12 through a bonding layer 13. The filter layer 14 can help the integrated thermopile sensing structure 20 to filter signals other than infrared.

濾光層14容許從某一待測物 (圖未示)而來的紅外線的溫度訊號穿越。在一實施例中,濾光層14的厚度例如但不限於可以為5~15 μm。在一實施例中,濾光層14的材料例如但不限於可以為聚乙烯(Polyethylene, 簡稱PE)、聚丙烯(Polypropylene/ Polypropene, 簡稱 PP)或聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate, 簡稱PET)。濾光層14的作用除了濾光之外,尚可防止髒汙進入熱電堆感測結構20之中。The filter layer 14 allows infrared temperature signals from an object to be measured (not shown) to pass through. In an embodiment, the thickness of the filter layer 14 may be, for example, but not limited to, 5 to 15 μm. In an embodiment, the material of the filter layer 14 may be, for example, but not limited to, polyethylene (PE), polypropylene (Polypropylene / Polypropene, PP), or polyethylene terephthalate. , Referred to as PET). In addition to filtering, the filter layer 14 can prevent dirt from entering the thermopile sensing structure 20.

紅外線感應單元16所產生的電壓差可經由一外部電路來處理而產生前述電壓差訊號VDS;此外部電路例如但不限於為一電晶體電路17 (如第4圖所示),其係形成於基板11之中。The voltage difference generated by the infrared sensing unit 16 can be processed by an external circuit to generate the aforementioned voltage difference signal VDS; this external circuit is, for example but not limited to, a transistor circuit 17 (as shown in FIG. 4), which is formed in In the substrate 11.

在一較佳實施方式中,本實施例之熱電堆感測結構20可以利用半導體之CMOS標準製程來製作。其中,可在矽基板11上利用多晶矽、金屬、二氧化矽之沉積與蝕刻等,構成電晶體電路17、紅外線感應單元16、分隔結構15及介電質層12,再於後製程中,利用例如但不限於背面矽體型蝕刻技術來蝕刻矽基板11,以形成如第4圖所示之基板11的形狀,再以晶圓黏合技術來黏合結合層13與濾光層14。In a preferred embodiment, the thermopile sensing structure 20 of this embodiment can be fabricated using a semiconductor CMOS standard process. Among them, the polycrystalline silicon, metal, and silicon dioxide can be deposited and etched on the silicon substrate 11 to form a transistor circuit 17, an infrared sensing unit 16, a separation structure 15, and a dielectric layer 12, and then used in a later process. For example, but not limited to, the silicon substrate 11 is etched on the back surface to etch the silicon substrate 11 to form the shape of the substrate 11 as shown in FIG. 4.

本實施例之特點在於: 分隔結構25之一部分構成至少一電容。如第4圖所示,在一實施例中,分隔結構可包含疊置之四個金屬層(例如:鋁) M1~M4與複數通道層V (例如:鎢),此外並可包含一層或更多層之多晶矽層(本實施例顯示為Poly1)。但本發明不限於此實施例所示之疊層數目、材料、順序、與佈局圖案,可以為不同數目和材料之金屬層及通道層之疊層,又疊層之前後順序及佈局方式可以有不同變化(例如最上方可為通道層V)。如第4圖所示,在一實施例中,分隔結構25之金屬層M1與第一感應結構161 (上述的第一半導體堆疊結構)的金屬層M1為相同膜層,且分隔結構25之多晶矽層Poly1與第一感應結構161的多晶矽層Poly1為相同膜層。在一實施例中,分隔結構25之金屬層M1與第二感應結構162 (上述的第二半導體堆疊結構)的金屬層M1為相同膜層,且分隔結構25之多晶矽層Poly1與第二感應結構162的多晶矽層Poly1為相同膜層。This embodiment is characterized in that a part of the separation structure 25 constitutes at least one capacitor. As shown in FIG. 4, in one embodiment, the separation structure may include four metal layers (for example, aluminum) M1 to M4 and a plurality of channel layers V (for example, tungsten), and may include one or more layers. Multi-layered polycrystalline silicon layer (shown as Poly1 in this embodiment). However, the present invention is not limited to the number, material, order, and layout pattern of the lamination shown in this embodiment, and may be a lamination of metal layers and channel layers of different numbers and materials. Different changes (for example, the uppermost layer may be the channel layer V). As shown in FIG. 4, in an embodiment, the metal layer M1 of the separation structure 25 and the metal layer M1 of the first sensing structure 161 (the first semiconductor stack structure described above) are the same film layer, and the polycrystalline silicon of the separation structure 25 is The layer Poly1 is the same film layer as the polycrystalline silicon layer Poly1 of the first sensing structure 161. In one embodiment, the metal layer M1 of the separation structure 25 and the metal layer M1 of the second sensing structure 162 (the second semiconductor stack structure described above) are the same film layer, and the polycrystalline silicon layer Poly1 of the separation structure 25 and the second sensing structure Poly1 of 162 has the same film layer.

上述金屬層M1~M4與通道層V是採用一般CMOS製程的概念來描述,對應於微電子電路之半導體結構中,內連線(interconnection)中的金屬層次序。但值得注意的是,本實施例中在金屬層 M3與M4之間,另包含一金屬層M3A。金屬層M4、絕緣層 (即介電質層12的一部分)、及金屬層M3A組成一個金屬-絕緣-金屬(Metal-Insulator-Metal, MIM)電容25A,由金屬層M4構成上極板及由金屬層M3A構成下極板。此MIM電容25A即可做為前述之電容C1或C2,因此,本發明可將電容C1及/或C2整合在熱電堆感測結構20之內,大幅減少整體溫度感測模組的面積與製造成本。The above-mentioned metal layers M1 to M4 and the channel layer V are described using the concept of a general CMOS process, which corresponds to the order of the metal layers in the interconnection of a semiconductor structure of a microelectronic circuit. It is worth noting that, in this embodiment, a metal layer M3A is included between the metal layers M3 and M4. The metal layer M4, the insulating layer (that is, a part of the dielectric layer 12), and the metal layer M3A form a metal-insulator-metal (MIM) capacitor 25A. The metal layer M4 constitutes the upper electrode plate and The metal layer M3A constitutes a lower electrode plate. This MIM capacitor 25A can be used as the aforementioned capacitor C1 or C2. Therefore, the present invention can integrate the capacitor C1 and / or C2 in the thermopile sensing structure 20, and greatly reduce the area and manufacturing of the overall temperature sensing module. cost.

請參考第5圖,其顯示本發明之整合電容之熱電堆感測結構之第二實施例的剖面圖。本實施例之整合電容之熱電堆感測結構30類似於第一實施例之整合電容之熱電堆感測結構20,其差別在於: 在本實施例之整合電容之熱電堆感測結構30中,如第5圖所示,分隔結構除了包含疊置之四個金屬層(例如:鋁) M1~M4、複數通道層V (例如:鎢)外,包含二個多晶矽層Poly1與Poly2。上述金屬層M1~M4、通道層V與多晶矽層Poly1與Poly2可採一般CMOS製程完成,與前述實施例相似,本發明不限於此實施例所示之疊層疊層數目、材料、順序、與佈局圖案。在第5圖所示之實施例中,二個多晶矽層Poly1與Poly2構成一個多晶矽-絕緣-多晶矽 (Polysilicon-Insulator-Polysilicon, PIP)電容26B,由多晶矽層Poly2構成上極板及由多晶矽層Poly1構成下極板。此PIP電容26B即可做為前述之電容C1或C2,因此,本發明可將電容C1及/或C2整合在熱電堆感測結構30之內,大幅減少整體溫度感測模組的面積與製造成本。Please refer to FIG. 5, which is a cross-sectional view of a second embodiment of a thermopile sensing structure with integrated capacitors according to the present invention. The thermopile sensing structure 30 of the integrated capacitor in this embodiment is similar to the thermopile sensing structure 20 of the integrated capacitor in the first embodiment, the difference is that in the thermopile sensing structure 30 of the integrated capacitor in this embodiment, As shown in FIG. 5, the separation structure includes two polycrystalline silicon layers, Poly1 and Poly2, in addition to four metal layers (eg, aluminum) M1 to M4 and a plurality of channel layers V (eg, tungsten). The metal layers M1 to M4, the channel layer V, and the polycrystalline silicon layers Poly1 and Poly2 can be completed by a general CMOS process. Similar to the previous embodiment, the present invention is not limited to the number, material, order, and layout of the stacks shown in this embodiment. pattern. In the embodiment shown in FIG. 5, the two polycrystalline silicon layers Poly1 and Poly2 constitute a polysilicon-insulator-polysilicon (PIP) capacitor 26B. The polycrystalline silicon layer Poly2 constitutes the upper plate and the polycrystalline silicon layer Poly1. Form the lower plate. The PIP capacitor 26B can be used as the aforementioned capacitor C1 or C2. Therefore, the present invention can integrate the capacitor C1 and / or C2 in the thermopile sensing structure 30, which can greatly reduce the area and manufacturing of the overall temperature sensing module. cost.

請參考第6圖,其顯示本發明之整合電容之熱電堆感測結構之第三實施例的剖面圖。本實施例之整合電容之熱電堆感測結構40類似於前述實施例之整合電容之熱電堆感測結構20與30,其差別在於:熱電堆感測結構40的分隔結構27包含MIM電容25A以及PIP電容26B。意即,本實施例之熱電堆感測結構40既具有MIM電容25A也具有PIP電容26B。 本實施例之結構可以在較小面積下,製作較大的電容。Please refer to FIG. 6, which is a cross-sectional view of a third embodiment of a thermopile sensing structure with an integrated capacitor according to the present invention. The thermopile sensing structure 40 of the integrated capacitor in this embodiment is similar to the thermopile sensing structures 20 and 30 of the integrated capacitor in the previous embodiment. The difference is that the separation structure 27 of the thermopile sensing structure 40 includes a MIM capacitor 25A and PIP capacitor 26B. That is, the thermopile sensing structure 40 of this embodiment has both a MIM capacitor 25A and a PIP capacitor 26B. The structure of this embodiment can make a larger capacitor in a smaller area.

相較於先前技術,本實施例之整合電容之熱電堆感測結構20、30、40可以免除外掛電容的需求,並有效減少模組面積;此外,將電容由外掛改為內建,也有降低傳輸雜訊的效果,因此優於先前技術。Compared with the prior art, the thermopile sensing structures 20, 30, and 40 of the integrated capacitor in this embodiment can eliminate the need for hanging capacitors and effectively reduce the module area. In addition, changing the capacitors from external to built-in also reduces The effect of transmitting noise is better than the prior art.

以上已針對較佳實施例來說明本發明,唯以上所述者,僅係為使熟悉本技術者易於了解本發明的內容而已,並非用來限定本發明之權利範圍。在本發明之相同精神下,熟悉本技術者可以思及各種等效變化。例如,本發明之金屬層及通道層的個數不限於實施例所示,可為其他個數。凡此種種,皆可根據本發明的教示類推而得,因此,本發明的範圍應涵蓋上述及其他所有等效變化。此外,本發明的任一實施型態不必須達成所有的目的或優點,因此,請求專利範圍任一項也不應以此為限。The present invention has been described above with reference to the preferred embodiments, but the above is only for making those skilled in the art easily understand the content of the present invention, and is not intended to limit the scope of rights of the present invention. In the same spirit of the invention, those skilled in the art can think of various equivalent changes. For example, the numbers of the metal layer and the channel layer of the present invention are not limited to those shown in the embodiment, and may be other numbers. All these can be deduced by analogy according to the teachings of the present invention. Therefore, the scope of the present invention should cover the above and all other equivalent changes. In addition, any embodiment of the present invention does not have to achieve all the objectives or advantages. Therefore, any one of the scope of the claimed patent should not be limited to this.

〔習知〕[Learning]

100‧‧‧溫度感測模組100‧‧‧Temperature Sensing Module

10‧‧‧熱電堆感測結構10‧‧‧ Thermopile sensing structure

11‧‧‧基板11‧‧‧ substrate

11A‧‧‧空腔11A‧‧‧ Cavity

12‧‧‧介電質層12‧‧‧ Dielectric layer

13‧‧‧結合層13‧‧‧Combination layer

14‧‧‧濾光層14‧‧‧ Filter

15‧‧‧分隔結構15‧‧‧ partition structure

16‧‧‧紅外線感應單元16‧‧‧ Infrared sensor unit

161‧‧‧第一感應結構161‧‧‧First induction structure

162‧‧‧第二感應結構162‧‧‧Second induction structure

17‧‧‧電晶體電路17‧‧‧Transistor circuit

C‧‧‧冷端C‧‧‧ cold end

M1~M4‧‧‧金屬層M1 ~ M4‧‧‧metal layer

Poly1‧‧‧多晶矽層Poly1‧‧‧ polycrystalline silicon layer

H‧‧‧熱端H‧‧‧ hot end

V‧‧‧通道層V‧‧‧Channel layer

80‧‧‧溫度感測器80‧‧‧Temperature sensor

81‧‧‧雜訊過濾器81‧‧‧Noise Filter

82‧‧‧雜訊過濾器82‧‧‧Noise Filter

C1~C3‧‧‧電容C1 ~ C3‧‧‧Capacitor

Amp‧‧‧差分放大器Amp‧‧‧ Differential Amplifier

ADC‧‧‧類比數位轉換器ADC‧‧‧ Analog Digital Converter

TS‧‧‧溫度訊號TS‧‧‧Temperature signal

VDS‧‧‧電壓差訊號VDS‧‧‧Voltage difference signal

〔本發明〕〔this invention〕

200‧‧‧溫度感測模組200‧‧‧Temperature Sensing Module

20、30、40‧‧‧整合電容之熱電堆感測結構20, 30, 40‧‧‧‧Integrated capacitor thermopile sensing structure

11‧‧‧基板11‧‧‧ substrate

11A‧‧‧空腔11A‧‧‧ Cavity

12‧‧‧介電質層12‧‧‧ Dielectric layer

13‧‧‧結合層13‧‧‧Combination layer

14‧‧‧濾光層14‧‧‧ Filter

25‧‧‧分隔結構25‧‧‧ divider structure

25A‧‧‧MIM電容25A‧‧‧MIM capacitor

26‧‧‧分隔結構26‧‧‧ Separation Structure

26B‧‧‧PIP電容26B‧‧‧PIP capacitor

27‧‧‧分隔結構27‧‧‧ divider structure

16‧‧‧紅外線感應單元16‧‧‧ Infrared sensor unit

161‧‧‧第一感應結構161‧‧‧First induction structure

162‧‧‧第二感應結構162‧‧‧Second induction structure

17‧‧‧電晶體電路17‧‧‧Transistor circuit

C‧‧‧冷端C‧‧‧ cold end

M1~M4‧‧‧金屬層M1 ~ M4‧‧‧metal layer

M3A‧‧‧金屬層M3A‧‧‧metal layer

Poly1‧‧‧多晶矽層Poly1‧‧‧ polycrystalline silicon layer

Poly2‧‧‧多晶矽層Poly2‧‧‧ polycrystalline silicon layer

H‧‧‧熱端H‧‧‧ hot end

V‧‧‧通道層V‧‧‧Channel layer

71‧‧‧雜訊過濾器71‧‧‧Noise Filter

72‧‧‧雜訊過濾器72‧‧‧ Noise Filter

80‧‧‧溫度感測器80‧‧‧Temperature sensor

C1~C3‧‧‧電容C1 ~ C3‧‧‧Capacitor

Amp‧‧‧差分放大器Amp‧‧‧ Differential Amplifier

ADC‧‧‧類比數位轉換器ADC‧‧‧ Analog Digital Converter

TS‧‧‧溫度訊號TS‧‧‧Temperature signal

VDS‧‧‧電壓差訊號VDS‧‧‧Voltage difference signal

第1圖顯示先前技術之熱電堆感測結構應用於溫度感測模組的功能方塊圖。 第2圖顯示先前技術之熱電堆感測結構的剖面圖。 第3圖顯示本發明之熱電堆感測結構應用於溫度感測模組的功能方塊圖。 第4圖顯示本發明之整合電容之熱電堆感測結構之第一實施例的剖面圖。 第5圖顯示本發明之整合電容之熱電堆感測結構之第二實施例的剖面圖。 第6圖顯示本發明之整合電容之熱電堆感測結構之第三實施例的剖面圖。FIG. 1 is a functional block diagram of a prior art thermopile sensing structure applied to a temperature sensing module. Figure 2 shows a cross-sectional view of a prior art thermopile sensing structure. FIG. 3 shows a functional block diagram of the thermopile sensing structure of the present invention applied to a temperature sensing module. FIG. 4 is a cross-sectional view of a first embodiment of a thermopile sensing structure with integrated capacitors according to the present invention. FIG. 5 is a cross-sectional view of a second embodiment of a thermopile sensing structure with integrated capacitors according to the present invention. FIG. 6 is a cross-sectional view of a third embodiment of a thermopile sensing structure with integrated capacitors according to the present invention.

Claims (2)

一種整合電容之熱電堆感測結構,包含:一基板,具有一空腔;一紅外線感應單元,位於該基板上,該紅外線感應單元具有一第一半導體堆疊結構,其中該第一半導體堆疊結構位於該空腔處之一端為一熱端;以及一分隔結構,位於該紅外線感應單元周邊,其中該分隔結構與該第一半導體堆疊結構彼此相近之一端為一冷端,該熱端與該冷端間之溫度差產生一電壓差訊號,其中該第一半導體堆疊結構包括二層互相間接連接之熱傳導材料,該二層互相間接連接之熱傳導材料彼此不直接接觸,該分隔結構高於該半導體堆疊結構以達成將該半導體堆疊結構與其他部分分離的作用,且該分隔結構之一部分構成至少一電容。 A thermopile sensing structure with integrated capacitors includes: a substrate having a cavity; and an infrared sensing unit on the substrate. The infrared sensing unit has a first semiconductor stacking structure, and the first semiconductor stacking structure is located in the substrate. One end of the cavity is a hot end; and a partition structure is located around the infrared sensing unit, wherein the partition structure and the first semiconductor stack structure are close to each other at one end is a cold end, between the hot end and the cold end. The temperature difference generates a voltage difference signal, wherein the first semiconductor stack structure includes two layers of thermally conductive material indirectly connected to each other, the two layers of thermally conductive material indirectly connected to each other do not directly contact each other, and the separation structure is higher than the semiconductor stack structure to A function of separating the semiconductor stack structure from other parts is achieved, and one part of the separation structure constitutes at least one capacitor. 如申請專利範圍第1項所述之整合電容之熱電堆感測結構,其中該至少一電容為一金屬-絕緣-金屬(Metal-Insulator-Metal,MIM)電容或一多晶矽-絕緣-多晶矽(Polysilicon-Insulator-Polysilicon,PIP)電容。 The thermopile sensing structure of an integrated capacitor according to item 1 of the scope of the patent application, wherein the at least one capacitor is a metal-insulator-metal (MIM) capacitor or a polysilicon-insulation-polysilicon -Insulator-Polysilicon (PIP) capacitor.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWM241803U (en) * 2003-07-11 2004-08-21 Opto Tech Corp Improved structure of thermal pile sensor
EP1553633A2 (en) * 2001-03-30 2005-07-13 Kabushiki Kaisha Toshiba Infrared sensor device and manufacturing method thereof
CN101175978A (en) * 2005-05-11 2008-05-07 株式会社村田制作所 Infrared sensor and its manufacturing process
US20150076651A1 (en) * 2012-09-18 2015-03-19 Ricoh Company, Ltd. Thermocouple, thermopile, infrared ray sensor and method of manufacturing infrared ray sensor

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1553633A2 (en) * 2001-03-30 2005-07-13 Kabushiki Kaisha Toshiba Infrared sensor device and manufacturing method thereof
TWM241803U (en) * 2003-07-11 2004-08-21 Opto Tech Corp Improved structure of thermal pile sensor
CN101175978A (en) * 2005-05-11 2008-05-07 株式会社村田制作所 Infrared sensor and its manufacturing process
US20150076651A1 (en) * 2012-09-18 2015-03-19 Ricoh Company, Ltd. Thermocouple, thermopile, infrared ray sensor and method of manufacturing infrared ray sensor

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