TWI569376B - Static random access memory unit cell structure and static random access memory unit cell layout structure - Google Patents

Static random access memory unit cell structure and static random access memory unit cell layout structure Download PDF

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Publication number
TWI569376B
TWI569376B TW102106422A TW102106422A TWI569376B TW I569376 B TWI569376 B TW I569376B TW 102106422 A TW102106422 A TW 102106422A TW 102106422 A TW102106422 A TW 102106422A TW I569376 B TWI569376 B TW I569376B
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TW
Taiwan
Prior art keywords
random access
access memory
memory unit
unit cell
static random
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TW102106422A
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TW201434112A (en
Inventor
Ching Wen Hung
Po Chao Tsao
Shu Ru Wang
Chia Wei Huang
Chieh Te Chen
feng yi Chang
Chih Sen Huang
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United Microelectronics Corp
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Priority to TW102106422A priority Critical patent/TWI569376B/en
Publication of TW201434112A publication Critical patent/TW201434112A/en
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Publication of TWI569376B publication Critical patent/TWI569376B/en

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TW102106422A 2013-02-23 2013-02-23 Static random access memory unit cell structure and static random access memory unit cell layout structure TWI569376B (en)

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TW102106422A TWI569376B (en) 2013-02-23 2013-02-23 Static random access memory unit cell structure and static random access memory unit cell layout structure

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TW102106422A TWI569376B (en) 2013-02-23 2013-02-23 Static random access memory unit cell structure and static random access memory unit cell layout structure

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TW201434112A TW201434112A (en) 2014-09-01
TWI569376B true TWI569376B (en) 2017-02-01

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9484349B1 (en) 2015-10-28 2016-11-01 Powerchip Technology Corporation Static random access memory
TWI566335B (en) * 2015-10-28 2017-01-11 Powerchip Tech Corp Static random access memory

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030127752A1 (en) * 2002-01-07 2003-07-10 Sung-Bong Kim Layouts for CMOS SRAM cells and devices
TW200812070A (en) * 2006-08-31 2008-03-01 Taiwan Semiconductor Mfg Semiconductor structure
TW200950064A (en) * 2008-03-13 2009-12-01 Tela Innovations Inc Cross-coupled transistor layouts in restricted gate level layout architecture
TW201021162A (en) * 2008-11-27 2010-06-01 United Microelectronics Corp Inverter structure and method for fabricating the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030127752A1 (en) * 2002-01-07 2003-07-10 Sung-Bong Kim Layouts for CMOS SRAM cells and devices
TW200812070A (en) * 2006-08-31 2008-03-01 Taiwan Semiconductor Mfg Semiconductor structure
TW200950064A (en) * 2008-03-13 2009-12-01 Tela Innovations Inc Cross-coupled transistor layouts in restricted gate level layout architecture
TW201021162A (en) * 2008-11-27 2010-06-01 United Microelectronics Corp Inverter structure and method for fabricating the same

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