TWI566266B - Multilayer ceramic capacitor and board having the same - Google Patents

Multilayer ceramic capacitor and board having the same Download PDF

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Publication number
TWI566266B
TWI566266B TW103136756A TW103136756A TWI566266B TW I566266 B TWI566266 B TW I566266B TW 103136756 A TW103136756 A TW 103136756A TW 103136756 A TW103136756 A TW 103136756A TW I566266 B TWI566266 B TW I566266B
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Taiwan
Prior art keywords
ceramic
multilayer ceramic
ceramic capacitor
disposed
electrodes
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TW103136756A
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Chinese (zh)
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TW201526052A (en
Inventor
安永圭
金炫兌
林輝根
金珍
李敎光
李炳華
Original Assignee
三星電機股份有限公司
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Priority to KR1020130129120A priority Critical patent/KR20140038914A/en
Priority to KR1020140133068A priority patent/KR101514610B1/en
Application filed by 三星電機股份有限公司 filed Critical 三星電機股份有限公司
Publication of TW201526052A publication Critical patent/TW201526052A/en
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Publication of TWI566266B publication Critical patent/TWI566266B/en

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G2/00Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02Mountings
    • H01G2/06Mountings specially adapted for mounting on a printed-circuit support
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/12Ceramic dielectrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/301Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor

Description

Multilayer ceramic capacitor and board having the same

This application claims Korean Patent Application No. 10-2013-0129120 filed on October 29, 2013 by the Korean Intellectual Property Office and No. 10-2014-0133068 filed on October 2, 2014 The priority of the Korean Patent Application is hereby incorporated by reference.

The present disclosure relates to a capacitor and a panel having the same, and more particularly to a multilayer ceramic capacitor and a panel having the multilayer ceramic capacitor.

In accordance with the recent trend toward miniaturization and capacity increase of electronic products, there has been a large demand for a demand for electronic components for electronic products which are relatively small and have high capacitance.

Among the electronic components, in the case of a multilayer ceramic capacitor, when an equivalent series inductance (hereinafter referred to as "ESL") is increased, the performance of the electronic product provided by the capacitor may deteriorate. In addition, according to the miniaturization of the electronic product and the electricity of the electronic component As the capacity increases, the increase in the ESL of the multilayer ceramic capacitor may have a considerable influence on the deterioration of the performance of the electronic product.

In particular, decoupling capacitors have been used in a large amount in accordance with the increase in the performance of the integrated circuit. Therefore, there is an increasing demand for multilayer ceramic capacitors having a three-terminal (3-terminal) multilayer vertical structure, so-called "low inductance chip capacitors (LICC)", which can be reduced by external terminals The distance between them is to reduce the current flow path so as to reduce the inductance in the capacitor.

With such multilayer ceramic capacitors, reliability and mounting defect rates can be significantly affected by the shape and size of the external electrodes.

Exemplary embodiments of the present disclosure can provide a three-terminal vertical multilayer capacitor having improved reliability and adhesion strength while maintaining low ESL characteristics, as well as panels having the same.

According to an exemplary embodiment of the present disclosure, the multilayer ceramic capacitor may include: three external electrodes are spaced apart from each other on the mounting surface of the ceramic body, and are connected to lead portions of the internal electrodes, wherein The spacing between the adjacent lead portions is 500.7 micrometers ( μm ) or less, and the width of the outer electrode in the longitudinal direction of the ceramic body not contacting the one-side margin of the corresponding lead portion is 20.2. μ m or more.

100, 100', 100", 1000‧‧‧ multilayer ceramic capacitors

110‧‧‧ceramic body

111‧‧‧Dielectric layer

112, 113‧‧‧ Coverage

120‧‧‧First internal electrode

121‧‧‧First lead part

122‧‧‧Second lead part

123‧‧‧four lead part

124‧‧‧5th lead part

130‧‧‧Second internal electrode

131‧‧‧ Third lead part

132‧‧‧Sixth lead part

141a, 142a, 143a, 144a, 145a, 146a‧‧‧ conductive layer

141b, 142b, 143b, 44b, 145b, 146b‧‧‧ nickel plating

141c, 142c, 143c, 144c, 145c, 146c‧‧‧ tin plating

150‧‧‧Insulation

200‧‧‧ plates

210‧‧‧ boards

221, 222, 223‧‧ ‧ electrode pads

230‧‧‧welding agent

224‧‧‧ Grounding terminal

225‧‧‧Power terminal

141, 141'‧‧‧ first external electrode

142, 142'‧‧‧ second external electrode

143, 143'‧‧‧ third external electrode

144'‧‧‧fourth external electrode

145'‧‧‧ fifth external electrode

146'‧‧‧ sixth external electrode

A1, a2‧‧‧1 side edge portion of the external electrode not in contact with the lead

B1, b2‧‧‧ the distance between adjacent external electrodes

C1, c2‧‧‧The outer electrode is not in contact with one side of the lead

d, e‧‧‧height

L‧‧‧ Length direction

S1‧‧‧ first surface

S2‧‧‧ second surface

S3‧‧‧ first side surface

S4‧‧‧ second side surface

S5‧‧‧ third side surface

S6‧‧‧ fourth side surface

Tc‧‧‧ overall height of capacitor

T‧‧‧ thickness direction

W‧‧‧Width direction

The above and other aspects of the present invention will be more clearly understood from the following detailed description of the accompanying drawings in which: FIG. A multi-layer ceramic capacitor is shown in a reversed state as a perspective view of a multilayer ceramic capacitor; and FIG. 2 is a perspective view showing a state in which the ceramic body of the multilayer ceramic capacitor of FIG. 1 is inverted in the ceramic body; An exploded perspective view showing a state in which the external electrode of the multilayer ceramic capacitor of FIG. 1 is omitted; FIG. 4 is a cross-sectional view showing the multilayer ceramic capacitor of FIG. 1; and FIG. 5 is a drawing of FIG. A multilayer ceramic capacitor includes a perspective view of another example of an external electrode having a different shape; and FIG. 6 is a perspective view schematically illustrating a multilayer ceramic capacitor according to another exemplary embodiment of the present disclosure; FIG. 8 is an exploded perspective view showing a state in which the external electrode of the multilayer ceramic capacitor is omitted; FIG. 8 is a diagram schematically showing another exemplary embodiment according to the present disclosure. a perspective view of a multilayer ceramic capacitor; FIG. 9 is a perspective view showing a ceramic body of the multilayer ceramic capacitor of FIG. 8; and FIG. 10 is a state in which the external electrode of the multilayer ceramic capacitor of FIG. 8 is omitted. Decompose perspective 11 is a cross-sectional view showing the multilayer ceramic capacitor of FIG. 8; and FIG. 12 is a perspective view showing another example of the multilayer ceramic capacitor of FIG. 8 including external electrodes having different shapes; FIG. 13 is a drawing A perspective view of the plate member on which the multilayer ceramic capacitor of Fig. 8 is mounted; and Fig. 14 is a cross-sectional view showing the plate member on which the multilayer ceramic capacitor of Fig. 8 is mounted.

Illustrative embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

However, the disclosure may be embodied in many different forms and should not be construed as limited to the particular embodiments set forth. Rather, these specific embodiments are provided so that this disclosure will be thorough and complete.

The shapes and dimensions of the elements may be exaggerated for clarity, and the same reference numerals will be used throughout to identify the same or similar elements.

The orientation of a six-sided ceramic body will be defined to clearly illustrate an exemplary embodiment of the present disclosure. The L, W, and T directions are provided in the accompanying drawings, which refer to the length direction, the width direction, and the thickness direction, respectively. Here, the width direction can be used to have the same meaning as the direction in which the dielectric layer is stacked.

Multilayer ceramic capacitor

Figure 1 is a diagrammatically drawn according to one of the present disclosures A perspective view of a multilayer ceramic capacitor of the embodiment; FIG. 2 is a perspective view showing a state in which the ceramic body of the multilayer ceramic capacitor of FIG. 1 is inverted, and FIG. 3 is a drawing of the multilayer of FIG. An exploded perspective view of a state in which the external electrode of the ceramic capacitor is omitted; and FIG. 4 is a cross-sectional view of the multilayer ceramic capacitor in which FIG. 1 is drawn.

Referring to FIGS. 1 to 4, the multilayer ceramic capacitor 100 according to the present exemplary embodiment may include a ceramic body 110 in which a plurality of dielectric layers 111 are stacked in the width direction; and includes a plurality of first and second internal electrodes 120 and An active portion of 130; and first to third external electrodes 141 to 143.

According to this exemplary embodiment, the multilayer ceramic capacitor 100 may be a three-terminal capacitor having a total of three external terminals.

The ceramic body 110 may have: first and second surfaces S1 and S2 opposite to each other in the thickness direction; fifth and sixth surfaces S5 and S6 connected to the first and second surfaces S1 and S2 to each other, and mutually With respect to the width direction; and the third and fourth surfaces S3 and S4, relative to each other in the longitudinal direction.

Hereinafter, in the exemplary embodiment, the mounting surface of the multilayer ceramic capacitor 100 may be the first surface of the ceramic body 110.

The ceramic body 110 can be formed by stacking the plurality of dielectric layers 111 in the width direction and then sintering the stacked dielectric layer 111, and the shape thereof is not particularly limited but can be as shown in the accompanying drawings. The hexahedron in the formula.

However, the shape and size of the ceramic body 110 and the stack The number of stacked dielectric layers 111 is not limited to those illustrated in the exemplary embodiments as depicted in the drawings.

In addition, the ceramic body 110 formed by the plurality of dielectric layers 111 may be in a sintered state, and the boundary between the dielectric layers 111 adjacent to each other may be integrated, so that the scanning electron microscope is not used. It will not be easy to identify them.

The ceramic body 110 may include: the active portion including a plurality of internal electrodes and contributing to capacitance formation of the capacitor; and cover layers 112 and 113 disposed on both side surfaces of the active portion in the width direction as Edge part.

The active portion may be formed by alternately stacking the plurality of first and second internal electrodes 120 and 130 in the width direction and having the dielectric layer 111 interposed therebetween.

In this case, the thickness of the dielectric layers 111 may be selectively changed according to the expected degree of capacitance of the multilayer ceramic capacitor 100, but after the sintering process, the thickness of the single dielectric layer may preferably be 0.01 to 1.00 μm . However, the disclosure is not limited to this.

In addition, the dielectric layer 111 may comprise a ceramic powder having a high dielectric constant, for example, a barium titanate (BaTiO 3 )-based powder or a barium titanate substrate (strontium titanate). (SrTiO 3 )-based powder, or the like, but the material of the dielectric layer is not limited thereto as long as sufficient capacitance can be obtained.

If necessary, in addition to the ceramic powder, ceramic additives, organic solvents, plasticizers, binders, dispersion Agents and other analogs may be added to the dielectric layers 111.

In this case, the average particle size of the ceramic powder for forming the dielectric layer 111 is not particularly limited and can be controlled in order to achieve the object of the present disclosure. For example, the average particle diameter of the ceramic powder can be controlled to 400 nm or less, but is not limited thereto.

The capping layers 112 and 113 may have the same material and configuration as used for the dielectric layer 111 except that the internal electrodes are not included therein.

In addition, the cover layers 112 and 113 may be formed by stacking a single dielectric layer or two or more dielectric layers on both sides of the active portion in the width direction, and generally protecting the first and second interiors. Electrodes 120 and 130 are formed from damage by physical or chemical stress.

The first and second internal electrodes 120 and 130 have different polarities and may be formed in the ceramic body 110 and disposed to face each other while having the dielectric layer 111 interposed therebetween.

In this case, the first and second internal electrodes 120 and 130 may be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

The first and second internal electrodes 120 and 130 may include a portion of capacitance formed by overlapping with an adjacent internal electrode and contributing to form a capacitance, and an extension of the portion of the capacitance exposed to the outside of the ceramic body 110 Part of the formed lead portion.

The lead portion is not particularly limited but may be shorter than the capacitance portion of the internal electrode.

Furthermore, the thickness of the first and second internal electrodes 120 and 130 can be determined according to their intended use. For example, in view of the size of the ceramic body 110, the respective thicknesses of the first and second internal electrodes 120 and 130 may be measured in the range of 0.2 μm to 1.0 μm , but are not limited thereto.

Further, materials for forming the first and second internal electrodes 120 and 130 are not particularly limited. For example, the first and second internal electrodes 120 and 130 may be formed using a conductive paste formed of at least one noble metal material such as palladium, palladium-silver alloy (Pd-Ag) or the like, nickel and copper.

Further, as a method of printing the conductive paste, a screen printing method, a gravure printing method or the like may be used, but the present disclosure is not limited thereto.

In the exemplary embodiment, the first internal electrode 120 may have first and second lead portions 121 and 122 spaced apart from each other in the length direction and exposed to the first surface S1 of the ceramic body 110, And the distance between the third and fourth surfaces S3 and S4 may be formed by a predetermined distance.

In addition, the second internal electrode 130 may have a third lead portion 131 exposed to the first surface S1 of the ceramic body 110, and may be associated with the first and second lead portions 121 and 122 with the first and second leads The predetermined distance between the portions 121 and 122 is spaced apart and may form a predetermined distance from the third and fourth surfaces S3 and S4.

In this case, the distance between the adjacent lead portions The larger value of (a1+b1+c1 and a2+b2+c2) may be 500.7 μm or less.

In the case where the larger value (a1+b1+c1 and a2+b2+c2) between the adjacent lead portions is greater than 500.7 μm , it may be difficult to satisfy the pH of 50 or less (pici Henry). Effective series inductance (ESL), so it may be difficult to achieve low ESL.

In a general multilayer ceramic electronic component, external electrodes may be disposed on both side surfaces of the ceramic body relative to each other in the longitudinal direction.

However, in the case where an alternating voltage is applied to the external electrode, the current path is relatively long, so the current loop may be extended, and the intensity of the induced magnetic field may increase, whereby the inductance may be increased. .

In order to solve such defects, according to the exemplary embodiment of the present disclosure, the first and second external electrodes 141 and 142 may be disposed on the first surface S1 of the ceramic body 110, and the third external electrode 143 may be It is disposed on the first surface S1 between the first and second external electrodes 141 and 142.

In this case, since the distance between the first and second external electrodes 141 and 142 and the third external electrode 143 may be short, the current loop may be reduced, resulting in reduced inductance.

The first and second outer electrodes 141 and 142 may be spaced apart from each other in the length direction to be formed on the first surface S1 of the ceramic body 110, and may be connected to the first and second lead portions 121 and 122, and The third external electrode 143 may be formed on the first surface S1 of the ceramic body 110 between the first and second external electrodes 141 and 142 to be predetermined The distance is spaced apart from the first and second outer electrodes 141 and 142 and is connectable to the third lead portion 131.

Further, the first to third external electrodes 141 to 143 may be lead portions electrically connected to the first and second internal electrodes 120 and 130, and respectively disposed at positions corresponding thereto for forming a capacitance, and if It is to be noted that the first to third external electrodes 141 to 143 may be extended to portions of the fifth and sixth surfaces S5 and S6 of the ceramic body in the width direction, and the extended portion forms a band.

In this case, the minimum widths a1, a2, c1, and c2 of the first to third outer electrodes 141 to 143 of the ceramic body which are in contact with the corresponding lead portions at one side edge portion in the longitudinal direction may be It is 20.2 μ m or more.

In the case where the first to third external electrodes 141 to 143 are not in contact with the corresponding lead portion, one of the side edge portions whose widths a1, a2, c1, and c2 have a minimum value of less than 20.2 μm , the high temperature load ( High temperature load) Reliability and moisture resistance Load reliability may deteriorate.

Further, the smaller value between the distances b1 and b2 between the adjacent external electrodes may be 126.9 μm or more.

In the case where the smaller value of the distance b1 and b2 between the adjacent external electrodes is less than 126.9 μm , short-circuits may occur when the multilayer ceramic capacitor is mounted on the board.

Further, the strip heights d of the first to third external electrodes 141 to 143 may be 73.4 μm or more, respectively.

In this case, the strip heights d of the first to third external electrodes 141 to 143 may be equal to or less than the overall height Tc of the capacitor.

Further, in the case where the tape height d of the first to third external electrodes 141 to 143 is 73.4 μm or more, the adhesion strength may be improved to avoid the occurrence of flaws, and at the first to third external electrodes 141 In the case where the height d to the band 143 is less than 73.4 μm , the adhesion strength may occur in the first to third external electrodes 141 to 143.

Meanwhile, the first to third external electrodes 141 to 143 may have a three-layer structure and include first to third conductive layers 141a to 143a contacting the corresponding lead portions of the internal electrodes, first to third nickel plating layers ( Nickel (Ni) plating layers 141b to 143b are formed to cover the first to third conductive layers 141a to 143a, and first to third tin (Sn) plating layers 141c to 143c are formed to cover The first to third nickel plating layers 141b to 143b.

The first to third conductive layers 141a to 143a may be formed of the same conductive material as the first and second internal electrodes 120 and 130, but are not limited thereto. For example, the first to third conductive layers 141a to 143a may be formed of metal powder such as copper, silver, nickel, and the like, and may be prepared by applying a glass frit to the metal powder. The conductive paste is then formed by sintering the applied conductive paste.

Fig. 5 is a perspective view showing the structure of the multilayer ceramic capacitor 100' including an external electrode having a shape different from that of the multilayer ceramic capacitor drawn in Fig. 1.

Referring to FIG. 5, the first to third external electrodes 141' to 143' may be electrically connected to the lead portions of the first and second internal electrodes, respectively, in order to form a capacitance, and may extend to the ceramic body 110 in the width direction. Portions of the fifth and sixth surfaces S5 and S6 such that the extension forms a first strip as desired. Further, the first and second outer electrodes 141' and 142' may extend to portions of the third and fourth surfaces S3 and S4 of the ceramic body 110 in the longitudinal direction, and the extended portion forms a second strip.

In this case, respectively, the height d of the first band of the first to third external electrodes 141' to 143' may be 40.0 μm or more, and the first and second external electrodes 141' and The height e of the second strip of 142' may be 30.3 μm or more.

In this case, the height d of the first band of the first to third external electrodes 141' to 143' may be equal to or less than the overall height of the capacitor, and the first and second external electrodes 141' and The height e of the second strip of 142' may be equal to or less than the overall height of the capacitor. That is, the sum of the heights (d+e) of the first and second bands may be equal to or less than twice the overall height of the capacitor.

Further, in the case where the sum of the height d of the first strips of the first to third external electrodes and the height e of the second strips of the first and second external electrodes is less than 64.1 μm , the adhesion strength may be The first to third external electrodes 141' to 143' appear.

Experimental example

The multilayer ceramic capacitors according to the inventive examples and comparative examples were fabricated as follows.

A slurry containing a powder such as barium titanate powder or the like is applied onto a carrier film, followed by drying to prepare a plurality of ceramic green sheets having a thickness of 1.8 μm .

Next, the first and second internal electrodes are formed by applying a conductive paste as a nickel internal electrode to the ceramic green plate using a screen, each of the first internal electrodes having the first and second lead portions exposed to the corresponding ones One side (first surface) of the ceramic green plate and each of the second inner electrodes have a third lead portion spaced apart from the first and second lead portions and exposed to one side (first surface) of the corresponding ceramic green plate.

Next, about 200 ceramic green sheets are stacked, and one or more ceramic green sheets on which the first and second internal electrodes are not formed are stacked in the width direction of the aforementioned stacked ceramic green sheets A side surface to thereby manufacture a multilayer body. Thereafter, the pressure on the multilayer body 85 ℃ and pressed to 1000 kg force / cm 2 (kgf / cm 2) execution of the pressure (isostatic pressing).

Next, the pressed ceramic multilayer body was cut into individual wafers, and each wafer was subjected to a debinding treatment by maintaining the temperature at 230 ° C for 60 hours under an air atmosphere.

Next, the wafer is sintered at a temperature of about 1200 ° C under a reducing atmosphere having an oxygen partial pressure of 10 -11 to 10 -10 atmospheres below the Ni/NiO equilibrium oxygen partial pressure to avoid The internal electrode is oxidized, thereby preparing a ceramic body.

The wafer size of the multilayer wafer capacitor was about 1.6 mm x 0.8 mm (length x width (L x W), size 1608) after sintering. Here, The manufacturing tolerance is measured within a range of ±0.1 mm (length x width (L x W)).

Thereafter, processing for forming the first to third external electrodes is performed on the first surface of the ceramic body to respectively correspond to the lead portions of the first and second internal electrodes, thereby completing the multilayer ceramic capacitor. A test is then performed to measure the presence or absence of defects present at high temperature/wet resistance loads, the short circuit rate at which the capacitor is mounted, the presence or absence of adhesion, and the equivalent series inductance. The test results are provided in Table 1. The tests were each performed on 100 test samples.

Referring to Table 1, it can be seen that the maximum value (max(a1+b1+c1, a2+b2+c2)) of the adjacent lead portion pitch is preferably 500.7 μm or less, and in the samples 16 to 20 In the case where the maximum value of the adjacent lead portion pitch (max(a1+b1+c1, a2+b2+c2)) is larger than 500.7 μm , the ESL is larger than 50 pH, and thus it is difficult to obtain a low ESL.

In this case, the minimum value of the smaller values of the intervals a1+b1+c1 and a2+b2+c2 between the adjacent leads may be equal to the minimum value of the smaller values of the adjacent external electrode pitches b1 and b2. The sum of the minimum values of the smaller values a1+c1 and a2+c2 of the outer electrode of the ceramic body in the longitudinal direction which is not in contact with the lead portion. Therefore, the smaller values of the pitches a1+b1+c1 and a2+b2+c2 of the adjacent lead portions may preferably be 167.3 μm or more.

Further, it can be seen that the minimum value (nin(a1, a2, c1, c2)) of the width of the one side edge portion where the first to third external electrodes 141 to 143 are not in contact with the lead portion is preferably 20.2 μ. m or more, and the minimum of the width of the one side edge portion of the samples 1, 6, 11 and 16 where the first to third external electrodes 141 to 143 are not in contact with the lead portion (min(a1, a2, When c1, c2)) is less than 20.2 μm , high-temperature load reliability and moisture-resistant load reliability may deteriorate.

In this case, the maximum of the widths a1, a2, c1, and c2 of the one side edge portion of the external electrode not in contact with the lead portion may be equal to a larger value from the distance between the adjacent wire portions. The maximum value (max(a1+b1+c1, a2+b2+c2)) is obtained by subtracting half of the value obtained by the minimum value of the smaller values b1 and b2 between the adjacent external electrodes.

Therefore, the maximum width a1, a2, c1, and c2 of the side edge portion of the outer electrode not in contact with the lead portion may be 186.9 μm or less.

Further, it can be seen that the larger value of the distance between the adjacent external electrodes b1 and b2 is 126.9 μm or more, and the larger value of the distances b1 and b2 between the adjacent external electrodes in the sample 5 is smaller than In the case of 126.9 μm , a short-circuit 瑕疵 occurs when the multilayer ceramic capacitor is mounted on the board.

In this case, the maximum value of the larger values of the distances b1 and b2 between the adjacent external electrodes may be equal to the larger value from the distance between a1+b1+c1 and a2+b2+c2 between the adjacent lead portions. The maximum value is subtracted by a value obtained by twice the minimum value of the minimum values of the widths a1, a2, c1, and c2 of the side edge portion of the outer electrode which is not in contact with the lead portion. Therefore, the maximum value of the larger values of the distances b1 and b2 between the adjacent external electrodes may be 460.3 μm or less.

Further, it can be seen that the first to third external electrodes 141 to 143 preferably have portions of the strip extending to the fifth and sixth surfaces S5 and S6 of the ceramic body 110 in the width direction, and the height d of the strip is higher. Good for 73.4 μm .

The tape height d in the sample 23 at the first to third external electrodes 141 to 143 was less than 73.4 μm , and the adhesion strength 出现 occurred.

Meanwhile, the samples 25 to 36 have portions in which the first to third external electrodes 141 to 143 have the first tape extending to the fifth and sixth surfaces S5 and S6 of the ceramic body 110 in the width direction, and the first The first and second outer electrodes 141 and 142 have a second strip extending to the ceramic body 110 is a structure of portions of the third and fourth surfaces S3 and S4 in the length direction.

In this case, referring to the samples 26 to 36, the first tape height d of the first to third outer electrodes 141 to 143 and the second tape height e of the first and second outer electrodes 141 and 142 can be seen. The sum is 64.1 μm or more, and the adhesion strength of the external electrode does not occur at this time.

In the case of the sample 25, in the case where the sum total of the heights of the first tape and the second tape (d+e) is less than 64.1 μm , the entanglement of the adhesive strength occurs.

Modified example

6 is a perspective view schematically showing a multilayer ceramic capacitor according to another exemplary embodiment of the present disclosure, and FIG. 7 is a view showing a state in which the external electrode of the multilayer ceramic capacitor of FIG. 6 is omitted. An exploded perspective view.

Here, since the structure of the ceramic body 110 is the same as that of the previous exemplary embodiment, in order to avoid excessive simplification, a detailed description thereof will be omitted, and the structures of the first and second internal electrodes 120 and 130 are different from those of the prior art. The exemplary embodiment and insulating layer 150 will be described in detail.

Referring to FIGS. 6 and 7, according to the exemplary embodiment, the insulating layer 150 may be disposed on the second surface S2 of the ceramic body 110 relative to the mounting surface of the ceramic body 110 in the multilayer ceramic capacitor 100".

The first inner electrode 120 may have fourth and fifth lead portions 123 and 124 exposed to the second surface S2 of the ceramic body 110 to It is brought into contact with the insulating layer 150 formed on the second surface S2 of the ceramic body 110.

The second internal electrode 130 may have a sixth lead portion 132 disposed between the fourth and fifth lead portions 123 and 124 and exposed to the second surface S2 of the ceramic body 110 such that it contacts the insulating layer 150.

8 is a perspective view schematically showing a multilayer ceramic capacitor according to another exemplary embodiment of the present disclosure; and FIG. 9 is a perspective view showing a ceramic body of the multilayer ceramic capacitor of FIG. 8; FIG. An exploded perspective view showing a state in which the external electrodes of the multilayer ceramic capacitor of FIG. 8 are omitted; and FIG. 11 is a cross-sectional view of the multilayer ceramic capacitor in which FIG. 8 is drawn.

Here, since the structure of the ceramic body 110 is the same as that in the previous exemplary embodiment, in order to avoid excessive simplification, a detailed description thereof will be omitted, and the fourth to sixth external electrodes 144 and 146 are first and The structure of the two internal electrodes 120 and 130 will be described in detail differently from the previous exemplary embodiments.

Referring to FIGS. 8 through 11, in accordance with the multilayer ceramic capacitor 1000 of the present exemplary embodiment, the fourth to sixth external electrodes 144 to 146 may be disposed on the second surface S2 of the ceramic body 110 so as to face the First to third external electrodes 141 to 143.

In this case, the fourth to sixth outer electrodes 144 to 146 may extend to portions of the fifth and sixth surfaces S5 and S6 of the ceramic body 110 in the width direction as desired.

The fourth to sixth external electrodes 144 to 146 may have a three-layer structure and include fourth to sixth conductive layers 144a to 146a, and lead portions contacting the internal electrodes are respectively disposed at positions corresponding to the conductive layer, Fourth to sixth nickel plating layers 144b to 146b are formed to cover the fourth to sixth conductive layers 144a to 146a, respectively, and fourth to sixth tin plating layers 144c to 146c are formed to cover the fourth to the fourth, respectively Six nickel plating layers 144b to 146b.

The first inner electrode 120 may have fourth and fifth lead portions 123 and 124 exposed to the second surface S2 of the ceramic 110 to thereby connect the second surface S2 formed on the ceramic body 110, respectively. Four and fifth outer electrodes 144 and 145.

The second inner electrode 130 may have a sixth lead portion 132 disposed between the fourth and fifth lead portions 123 and 124 and exposed to the second surface S2 of the ceramic body 110 to thereby connect to the sixth External electrode 146.

As described above, in the case where the inner and outer structures of the multilayer ceramic capacitor 1000 are formed to be vertically symmetrical, the directionality of the capacitor can be removed.

That is, the multilayer ceramic capacitor 1000 has a vertically symmetrical structure so that the flaw which occurs when the mounting surface is reversed when the multilayer ceramic capacitor 1000 is mounted on the board can be avoided.

Therefore, since any one of the first and second surfaces of the multilayer ceramic capacitor 1000 can be used as a mounting surface, it is not necessary to consider the mounting surface when the multilayer ceramic capacitor 1000 is mounted on the board. direction.

In this case, the minimum widths a1, a2, c1, and c2 of the side edge portions of the fourth to sixth external electrodes 144 to 146 that are not in contact with the corresponding lead portions in the longitudinal direction may be 20.2. μ m or more.

In the case where the minimum values of the widths a1, a2, c1, and c2 of the side edge portions of the fourth to sixth external electrodes 144 to 146 not in contact with the corresponding lead portions are less than 20.2 μm , high-temperature load reliability and Humidity resistance reliability may deteriorate.

Further, the smaller value of the distance b1 and b2 between the adjacent external electrodes may be 126.9 μm or more.

In the case where the smaller value of b1 and b2 between the adjacent external electrodes is less than 126.9 μm , a short circuit may occur when the multilayer ceramic capacitor is mounted on the board.

Further, the strip heights d of the fourth to sixth external electrodes 144 to 146 may be 73.4 μm or more, respectively.

In the case where the band height d of the fourth to sixth external electrodes 144 to 146 is 73.4 μm or more, the adhesion strength may be improved, so that the adhesion strength may not occur, and in the fourth to sixth In the case where the tape height d of the external electrodes 144 to 146 is less than 73.4 μm , the adhesion strength 瑕疵 may appear in the fourth to sixth external electrodes 144 to 146.

Fig. 12 is a perspective view showing the structure of a multilayer ceramic capacitor 1000' including an external electrode having a different shape from that of the multilayer ceramic capacitor of Fig. 8.

Referring to FIG. 12, fourth to sixth external electrodes 144' to 146' may be electrically connected to corresponding lead portions of the first and second internal electrodes 120 and 130, respectively, in order to form a capacitance and may extend to the The ceramic body 110 is in portions of the fifth and sixth surfaces S5 and S6 in the width direction to form a first strip, as desired. Further, the fourth and fifth outer electrodes 144' and 145' may extend to portions of the third and fourth surfaces S3 and S4 of the ceramic body 110 in the longitudinal direction to form a second strip, as desired.

In this case, the height d of the first strips of the fourth to sixth external electrodes 144' to 146' may be 40.0 μm or more, respectively, and the fourth and fifth external electrodes 144' and 145' The height e of the second belt may be 30.3 μm or more, respectively.

The sum of the height d of the first strip of the fourth to sixth external electrodes 144' to 146' and the height e of the second strips of the fourth and fifth external electrodes 144' and 145' is less than 64.1 μm . Next, the adhesion strength 瑕疵 may appear in the fourth to sixth external electrodes 144' to 146'.

At the same time, the thickness of the conductive layer of the first to third external electrodes and the plating layer, the presence or absence of flaws in the test when the high temperature/humidity load is present, the short circuit rate and the adhesion strength when the capacitor is mounted are present or The results obtained without the presence and measurement of the equivalent series inductance, as shown in Table 1, can be equally applied to the fourth to sixth external electrodes.

Plate with multilayer ceramic capacitor

Fig. 13 is a perspective view showing a panel on which the multilayer ceramic capacitor of Fig. 8 is mounted, and Fig. 14 is a sectional view of Fig. 13.

Referring to Figures 13 and 14, a panel 200 having a multilayer ceramic capacitor according to the present exemplary embodiment may include a circuit board 210 on which the multilayer ceramic capacitor is mounted and first to third electrode pads Electrode pads 221 to 223 are formed on the circuit board 210 in a manner spaced apart from each other.

In this case, the multilayer ceramic capacitor can be electrically connected to the circuit board 210 by a solder 230, and the first to third external electrodes 141 to 143 are placed in contact with the first to third electrode pads 221 To the state of 223.

In Fig. 14, reference numeral 224 denotes a ground terminal and reference numeral 225 denotes a power terminal.

Meanwhile, although the case where the multilayer ceramic capacitor of this FIG. 8 is mounted is described in the present exemplary embodiment, the present disclosure is not limited thereto. For example, the multilayer ceramic capacitors depicted in Figures 1, 5, 6, and 12 can be similarly mounted on a circuit board to thereby configure a panel having a multilayer ceramic capacitor.

As explained above, according to an exemplary embodiment of the present disclosure, the width between adjacent lead portions of the internal electrode and the width of one side edge portion of the external electrode not in contact with the corresponding lead portion are controllable, Therefore, low ESL characteristics can be maintained, and reliability and adhesion strength can be improved.

While the present invention has been disclosed and described, it will be understood by those skilled in the art that modifications and changes can be made without departing from the scope of the invention as defined by the appended claims.

100‧‧‧Multilayer Ceramic Capacitors

110‧‧‧ceramic body

141‧‧‧First external electrode

142‧‧‧Second external electrode

143‧‧‧ Third external electrode

S1‧‧‧ first surface

S2‧‧‧ second surface

S3‧‧‧ first side surface

S4‧‧‧ second side surface

S5‧‧‧ third side surface

S6‧‧‧ fourth side surface

A1, a2‧‧‧1 side edge portion of the external electrode not in contact with the lead

B1, b2‧‧‧ the distance between adjacent external electrodes

C1, c2‧‧‧The outer electrode is not in contact with one side of the lead

D‧‧‧height

Tc‧‧‧ overall height of capacitor

T‧‧‧ thickness direction

L‧‧‧ Length direction

W‧‧‧Width direction

Claims (42)

  1. A multilayer ceramic capacitor comprising: a ceramic body having a plurality of dielectric layers stacked therein; an active portion having a plurality of first and second internal electrodes alternately disposed, having at least one of the dielectric layers Inserted in the middle; first and second lead portions extending from each of the first inner electrodes so as to be exposed to the mounting surface of the ceramic body and spaced apart from each other to be placed in the length direction of the ceramic body; a three-lead portion extending from each of the second internal electrodes such that it is exposed to the mounting surface of the ceramic body and disposed between the first and second lead portions; the first and second external electrodes, And being spaced apart from each other to be disposed on the mounting surface of the ceramic body in the longitudinal direction of the ceramic body, respectively connected to the first and second lead portions; and a third external electrode disposed in the ceramic body a surface between the first and second external electrodes, connected to the third lead portion, wherein a distance between adjacent lead portions is in a range of 167.3 μm to 500.7 μm , and the first to the first Three external Electrode in the longitudinal direction of the ceramic body did not correspond to the line width of the edge portion of the side portion in contact with the lead in the range of 20.2 μ m to 186.9 μ m in the.
  2. The multilayer ceramic capacitor of claim 1, wherein the distance between the first or second external electrode and the third external electrode is in the range of 126.9 μm to 460.3 μm .
  3. The multilayer ceramic capacitor according to claim 1, wherein the first and second external electrodes have a first side extending to a part of both side surfaces of the ceramic body in the width direction.
  4. The multilayer ceramic capacitor of claim 3, wherein the first side of the first and second external electrodes has a height of 73.4 μm or more, respectively, and is equal to or less than the entirety of the capacitor. height.
  5. The multilayer ceramic capacitor of claim 1, wherein the first and second external electrodes have a second side extending to a portion of both surfaces of the ceramic body in the longitudinal direction.
  6. The multilayer ceramic capacitor according to claim 1, wherein the third external electrode has a first side extending to a part of both side surfaces of the ceramic body in the width direction.
  7. The multilayer ceramic capacitor of claim 6, wherein the first side of the third external electrode has a height of 73.4 μm or more and is equal to or less than an overall height of the capacitor.
  8. The multilayer ceramic capacitor of claim 1, wherein the first and second internal electrodes are disposed to be spaced apart from both sides of the ceramic body in the longitudinal direction.
  9. The multilayer ceramic capacitor of claim 1, wherein the first to third external electrodes comprise: a conductive layer respectively contacting the lead portion corresponding to the conductive layer to be connected thereto; A coating covering the conductive layer.
  10. The multilayer ceramic capacitor of claim 9, wherein The plating layer includes: a nickel plating layer covering the conductive layer; and a tin plating layer covering the nickel plating layer.
  11. The multilayer ceramic capacitor of claim 1, further comprising: fourth and fifth lead portions extending from each of the first internal electrodes so as to be exposed to a surface of the ceramic body, the surface being opposite to The mounting surfaces of the ceramic body are spaced apart from each other to be disposed in the length direction of the ceramic body; the sixth lead portion extends from each of the second internal electrodes such that the surface of the ceramic body is exposed a surface of the surface opposite the ceramic body and disposed between the fourth and fifth lead portions; and an insulating layer disposed on the surface of the ceramic body opposite to the ceramic body The mounting surface.
  12. The multilayer ceramic capacitor of claim 1, further comprising: fourth and fifth external electrodes disposed on a surface of the ceramic body, the surfaces being spaced apart from each other with respect to the mounting surface of the ceramic body Arranging in the length direction of the ceramic body; and a sixth outer electrode disposed on the surface of the ceramic body, the surface being spaced apart from the fourth and fifth outer electrodes with respect to the mounting surface of the ceramic body Wherein each of the first internal electrodes has a fourth and a fifth Lead portions spaced apart from each other and exposed to the surface of the ceramic body, the surface having a sixth lead portion with respect to the mounting surface of the ceramic body, each of the second internal electrodes being exposed On the surface of the ceramic body, the surface is disposed relative to the mounting surface of the ceramic body and disposed between the fourth and fifth lead portions, spaced apart from the fourth and fifth lead portions, the fourth and the fourth Five external electrodes are respectively connected to the fourth and fifth lead portions, and the sixth external electrode is connected to the sixth lead portion.
  13. The multilayer ceramic capacitor of claim 12, wherein the first and second external electrodes have a second side extending to a portion of both surfaces of the ceramic body in the longitudinal direction.
  14. The multilayer ceramic capacitor of claim 12, wherein the sixth outer electrode has a first side extending to a portion of both surfaces of the ceramic body in the width direction.
  15. The multilayer ceramic capacitor of claim 14, wherein the first side of the sixth external electrode has a height of 73.4 μm or more and is equal to or less than an overall height of the capacitor.
  16. The multilayer ceramic capacitor of claim 12, wherein the fourth to sixth external electrodes are in a width of a side edge portion of the ceramic body that is not in contact with the corresponding lead portion in the longitudinal direction of the ceramic body. It is in the range of 20.2 μm to 186.9 μm .
  17. The multilayer ceramic capacitor of claim 12, wherein the distance between the fourth or fifth external electrode and the sixth external electrode is in the range of 126.9 μm to 460.3 μm .
  18. The multilayer ceramic capacitor of claim 12, wherein the fourth and fifth external electrodes have a first strip extending to a portion of the two sides of the ceramic body in the width direction.
  19. The multilayer ceramic capacitor of claim 18, wherein the first side of the fourth and fifth external electrodes has a height of 73.4 μm or more, respectively, and is equal to or less than the entirety of the capacitor. height.
  20. The multilayer ceramic capacitor of claim 12, wherein the fourth to sixth external electrodes comprise: a conductive layer respectively contacting the lead portion corresponding to the conductive layer to be connected thereto; A coating covering the conductive layer.
  21. The multilayer ceramic capacitor of claim 20, wherein the plating layer comprises: a nickel plating layer covering the conductive layer; and a tin plating layer covering the nickel plating layer.
  22. The multilayer ceramic capacitor according to claim 1, further comprising a cover layer disposed on both side surfaces of the active portion in the width direction.
  23. A multilayer ceramic capacitor comprising: a ceramic body having a plurality of dielectric layers stacked therein; an active portion having a plurality of first and second internal electrodes alternately disposed, having at least one of the dielectric layers Inserted in the middle; first and second lead portions extending from one of the first inner electrodes so as to be exposed to the mounting surface of the ceramic body and spaced apart from each other to be placed in the length direction of the ceramic body; a three-lead portion extending from one of the second internal electrodes so as to be exposed to the mounting surface of the ceramic body and disposed between the first and second lead portions; the first and second external electrodes, And being spaced apart from each other to be disposed on the mounting surface of the ceramic body in the longitudinal direction of the ceramic body, respectively connected to the first and second lead portions, and having a first strip extending to the width direction of the ceramic body a portion of both side surfaces, and a second strip extending to a portion of both surfaces of the ceramic body in the length direction; and a third outer electrode disposed on the mounting surface of the ceramic body on the first and second outer surfaces Between the electrode connected to the third lead portion, and having a portion with a first surface extending to both sides of the ceramic body, wherein, adjacent to the range of 167.3 μ m of 500.7 μ m spacing between the line lead portions And a width of the side edge portion of the first to third external electrodes that is not in contact with the corresponding lead portion in the longitudinal direction of the ceramic body is in a range of 20.2 μm to 186.9 μm .
  24. The multilayer ceramic capacitor of claim 23, wherein the distance between the first or second external electrode and the third external electrode is in the range of 126.9 μm to 460.3 μm .
  25. The multilayer ceramic capacitor of claim 23, wherein the sum of the heights of the first and second strips is 64.1 μm or more and is equal to or less than twice the overall height of the capacitor.
  26. The multilayer ceramic capacitor of claim 23, wherein the first and second internal electrodes are disposed to be spaced apart from both surfaces of the ceramic body in the longitudinal direction.
  27. The multilayer ceramic capacitor of claim 23, wherein the first to third external electrodes comprise: a conductive layer respectively contacting the lead portion corresponding to the conductive layer to be connected thereto; A coating covering the conductive layer.
  28. The multilayer ceramic capacitor of claim 27, wherein the plating layer comprises: a nickel plating layer covering the conductive layer; and a tin plating layer covering the nickel plating layer.
  29. The multilayer ceramic capacitor of claim 23, further comprising: fourth and fifth lead portions extending from each of the first internal electrodes so as to be exposed to a surface of the ceramic body, the surface being opposite to The mounting surfaces of the ceramic body are spaced apart from each other to be disposed in the length direction of the ceramic body; the sixth lead portion extends from each of the second internal electrodes such that the surface of the ceramic body is exposed The surface is relative to the The mounting surface of the ceramic body is disposed between the fourth and fifth lead portions; and an insulating layer is disposed on the surface of the ceramic body relative to the mounting surface of the ceramic body.
  30. The multilayer ceramic capacitor of claim 23, further comprising: fourth and fifth external electrodes disposed on a surface of the ceramic body, the surfaces being spaced apart from each other with respect to the mounting surface of the ceramic body Arranging in the length direction of the ceramic body; and a sixth outer electrode disposed on the surface of the ceramic body, the surface being spaced apart from the fourth and fifth outer electrodes with respect to the mounting surface of the ceramic body Wherein each of the first internal electrodes has fourth and fifth lead portions spaced apart from the length portion and exposed to the surface of the ceramic body, the surface being opposite to the ceramic body a mounting surface, each of the second internal electrodes having a sixth lead portion exposed to the surface of the ceramic body, the surface being disposed relative to the mounting surface of the ceramic body and disposed between the fourth and fifth lead portions And spaced apart from the fourth and fifth lead portions, the fourth and fifth external electrodes are respectively connected to the fourth and fifth lead portions, and the sixth external electrode is connected to the sixth lead portion.
  31. The multilayer ceramic capacitor of claim 30, wherein the fourth to sixth external electrodes are not widened at a side edge portion of the ceramic body that is not in contact with the corresponding lead portion in the longitudinal direction of the ceramic body. It is in the range of 20.2 μm to 186.9 μm .
  32. The multilayer ceramic capacitor of claim 30, wherein the distance between the fourth or fifth external electrode and the sixth external electrode is in the range of 126.9 μm to 460.3 μm .
  33. The multilayer ceramic capacitor of claim 30, wherein the fourth to sixth external electrodes have a first strip extending to a portion of the two sides of the ceramic body in the width direction, the fourth And the fifth outer electrode has a second strip extending to both surfaces of the ceramic body in the length direction, and the sum of the heights of the first and second strips is 64.1 μm or more, and is equal to or less than The overall height of the capacitor is twice.
  34. The multilayer ceramic capacitor of claim 30, wherein the fourth to sixth external electrodes comprise: a conductive layer respectively contacting the lead portion corresponding to the conductive layer to be connected thereto; A coating covering the conductive layer.
  35. The multilayer ceramic capacitor of claim 34, wherein the plating layer comprises: a nickel plating layer covering the conductive layer; and a tin plating layer covering the nickel plating layer.
  36. The multilayer ceramic capacitor of claim 23, further comprising a cover layer disposed on both sides of the active portion in the width direction surface.
  37. A plate member having a multilayer ceramic capacitor, comprising: a circuit board on which the first to third electrode pads are disposed; and the multilayer ceramic capacitor according to claim 1, wherein the first to third external portions Electrodes are mounted on the first to third electrode pads, respectively.
  38. A plate member having a multilayer ceramic capacitor, comprising: a circuit board on which the first to third electrode pads are disposed; and the multilayer ceramic capacitor according to claim 7, wherein the first to third external portions Electrodes are mounted on the first to third electrode pads, respectively.
  39. A plate member having a multilayer ceramic capacitor, comprising: a circuit board on which the first to third electrode pads are disposed; and the multilayer ceramic capacitor according to claim 8, wherein the first to third external portions Electrodes are mounted on the first to third electrode pads, respectively.
  40. A plate member having a multilayer ceramic capacitor, comprising: a circuit board on which the first to third electrode pads are disposed; and the multilayer ceramic capacitor according to claim 15, wherein the first to third external portions Electrodes are mounted on the first to third electrode pads, respectively.
  41. A plate member having a multilayer ceramic capacitor, comprising: a circuit board on which the first to third electrode pads are disposed; and the multilayer ceramic capacitor according to claim 21, The first to third external electrodes are respectively mounted on the first to third electrode pads.
  42. A plate member having a multilayer ceramic capacitor, comprising: a circuit board on which the first to third electrode pads are disposed; and the multilayer ceramic capacitor according to claim 22, wherein the first to third external portions Electrodes are mounted on the first to third electrode pads, respectively.
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