TWI564692B - Bandgap reference circuit - Google Patents

Description

Bandgap reference circuit

The present invention relates to a bandgap reference circuit.

The bandgap reference circuit is used to generate an accurate output voltage. The output voltage generated by the bandgap reference circuit is not affected by process variations, power supply, and temperature variations. Therefore, the bandgap reference circuit can be widely used in various analog circuits and digital circuits, which require an accurate reference voltage during operation.

Figure 1 illustrates a conventional bandgap reference circuit 100. Referring to FIG. 1, the bandgap reference circuit 100 includes PMOS transistors M1, M2, and M3, an operational amplifier OP, resistors R1 and R2, and bipolar transistors Q1, Q2, and Q3. When the base current is ignored, the output voltage VOUT of the bandgap reference circuit 100 can be expressed as:

Among them, VEB3 is the emitter-base voltage difference of bipolar transistor Q3, VT is the thermal voltage at room temperature, N is the emitter area and bipolar of bipolar transistor Q2. The ratio of the emitter area of the transistor Q1.

As shown in equation (1), adjust the resistance ratio of resistors R2 and R1 After the example, the bandgap reference circuit 100 can provide a stable output voltage VOUT having a zero temperature coefficient. The voltage level of the voltage VOUT is about 1.25V, which is close to the electron volt of the energy gap, that is, the 矽 energy gap reference voltage.

Referring to FIG. 1, the lowest voltage level of the power supply VDD that enables the bandgap reference circuit 100 to maintain normal operation is:

Where |VDS| is the drain-source voltage difference of the PMOS transistor M1.

It can be found from equation (2) that since the voltage level of VEB3 is about 0.7V, the voltage level of the power supply VDD must be greater than 1.8V to enable the bandgap reference circuit 100 to maintain normal operation.

It is an object of the present invention to provide a bandgap reference circuit for producing a stable output voltage.

According to an embodiment of the invention, the gap reference circuit includes a first current source, a second current source, a third current source, a fourth current source, an operational amplifier, a first bipolar transistor, and a first current source. a voltage dividing circuit, a second bipolar transistor, a third bipolar transistor, a first resistor and a second resistor. The operational amplifier is electrically coupled to the first to fourth current sources. The first bipolar transistor has an emitter electrically connected to the first current source, And a base and a collector electrically connected to a ground voltage. The voltage dividing circuit is electrically connected between the emitter of the first bipolar transistor and the base, and the voltage dividing circuit provides a ratio of an emitter-base voltage difference of the first bipolar transistor a bias voltage. The second bipolar transistor has a base for receiving the bias voltage, an emitter electrically coupled to the second current source, and a collector electrically coupled to the ground voltage. The third bipolar transistor has a collector and a base electrically connected to the ground voltage. The first resistor is electrically coupled between the third current source and an emitter of the third bipolar transistor. The second resistor is electrically connected between the fourth current source and the ground voltage. An intersection of the fourth current source and the second resistor provides a bandgap reference voltage.

100‧‧‧Gap reference circuit

200‧‧‧Gap reference circuit

22‧‧‧current source unit

24‧‧‧voltage circuit

M1, M2, M3, M4‧‧‧ PMOS transistors

OP‧‧‧Operational Amplifier

Q1, Q2, Q3, Q4‧‧‧ bipolar transistor

R1, R2, R3, R4‧‧‧ resistance

Figure 1 illustrates a common bandgap reference circuit.

Figure 2 is a circuit diagram showing a bandgap reference circuit incorporating an embodiment of the present invention.

Figure 2 shows a circuit diagram of a bandgap reference circuit 200 incorporating an embodiment of the present invention. As shown in FIG. 2, the bandgap reference circuit 200 includes a current source unit 22, a voltage dividing circuit 24, an operational amplifier OP, resistors R1 and R2, and a plurality of bipolar transistors Q1, Q2, and Q3.

The current source unit 22 is used to provide stable currents I1, I2, and I3. And I4. In the present embodiment, the current source unit 22 is a current mirror unit composed of four PMOS transistors M1, M2, M3, and M4. Referring to FIG. 2, each of the PMOS transistors M1, M2, M3, and M4 has a source electrically connected to a supply source VDD and a gate having an output electrically connected to the operational amplifier OP. pole. The gates of the PMOS transistors M1, M2, M3, and M4 are connected together, and the sources of the PMOS transistors M1, M2, M3, and M4 are electrically connected to a common supply power source VDD, and flow through the PMOS battery. The current I1 of the crystal M1, the current I2 flowing through the PMOS transistor M2, the current I3 flowing through the PMOS transistor M3, and the current I4 flowing through the PMOS transistor M4 are proportional to the aspect ratio of the PMOS transistor (W/L ratio). ).

Referring to FIG. 2, the bipolar transistor Q1 has a drain electrically connected to the PMOS transistor M1 and an emitter of the voltage dividing circuit 24, and a base and a collector electrically connected to a ground. . The bipolar transistor Q2 has an emitter electrically connected to the drain of the PMOS transistor M2, has a base electrically connected to a voltage VA from the voltage dividing circuit 24, and has an electrical connection to the ground One episode of the end. The bipolar transistor Q3 has a collector and a base electrically connected to the ground. The resistor R1 is electrically connected between a drain of the PMOS transistor M3 and an emitter of the bipolar transistor Q3.

As shown in FIG. 2, the operational amplifier OP has a positive input terminal electrically connected to the drain of the PMOS transistor M3, and has a negative input terminal electrically connected to the drain of the PMOS transistor M2, and An output having electrical connections to the gates of the PMOS transistors M1, M2, M3, and M4. The amplifier OP and the PMOS transistors M2 and M3 form a negative feedback loop such that the input voltages VD1 and VD3 are substantially identical. Therefore, the voltages VD1 and VD3 can be expressed as: VD1 = VD3 = VA + VEB2 = VEB3 + I3 × R1 (3)

Wherein, VEB2 is the emitter-base voltage difference of the bipolar transistor Q2, and VEB3 is the emitter-base voltage difference of the bipolar transistor Q3.

Referring to Fig. 2, the voltage dividing circuit 24 is electrically connected to the emitter of the bipolar transistor Q1. In the present embodiment, the voltage dividing circuit 24 is composed of two resistors R3 and R4 connected in series. Therefore, the voltage VA provided by the voltage dividing circuit 24 is proportional to the emitter-base voltage difference of the bipolar transistor Q1, so the voltage VA can be expressed as:

Wherein, VEB1 is the emitter-base voltage difference of the bipolar transistor Q1.

According to this, equation (2) can be rearranged into equation (4) and can be rearranged as:

Where VT is the thermal voltage at room temperature, N is the emitter area of the bipolar transistor Q3 and the emitter area of the bipolar transistor Q2 proportion.

In the present embodiment, the current flowing through the bipolar transistor Q2 and the current flowing through the bipolar transistor Q3 are adjusted to be substantially the same. Therefore, the current I3 flowing through the resistor R1 can be expressed as:

Since the thermal voltage VT has a positive temperature coefficient of 0.085 mV/° C., and the emitter-base voltage difference of the bipolar transistor Q1 has a negative temperature coefficient of −2 mV/° C., according to equation (6) The temperature coefficient of the current I3 can be adjusted to a positive temperature coefficient or a negative temperature coefficient. When the value of N increases, the current I3 can obtain a positive temperature coefficient. When the ratio of the voltage dividing circuit 24 is increased (i.e., the ratio of R4/(R3+R4) is increased), the current I3 can obtain a negative temperature coefficient. This current I3 can also achieve a substantially zero temperature coefficient by adjusting the N value and the ratio of the voltage dividing circuit 24.

In order to provide a stable reference voltage having one of substantially zero temperature coefficients, as shown in FIG. 2, the bandgap reference circuit 200 includes a resistor R2 electrically connected between the drain of the PMOS transistor M4 and the ground. . According to this configuration, the output voltage VREF of the bandgap reference circuit 200 can be expressed as: VREF = I4 × R2 (7)

In the present embodiment, the currents flowing through the voltages of the bipolar transistors Q1, Q2, and Q3 are substantially the same. The aspect ratio of the PMOS transistors M1, M2, M3, and M4 in the current source unit 22 is set to 2:1:1:1. Therefore, currents I2, I3, and I4 are substantially the same, and current I1 will be twice the current I2. Since current I3 and current I4 have the same current value, equation (6) can be rearranged into equation (7) and can be rearranged as:

According to equation (8), the temperature coefficient of the voltage VREF can be adjusted to a positive temperature coefficient by an increase in the value of N. The temperature coefficient of the voltage VREF can be adjusted to a negative temperature coefficient by an increase in the ratio of the voltage dividing circuit 24 (VA increase). When the value of N, the ratio of the voltage dividing circuit 24, and the ratio of the resistor R2 to R1 are appropriately selected, the bandgap reference circuit 200 can obtain an output voltage VREF having a zero temperature coefficient and a low sensitivity to temperature.

Furthermore, the bandgap reference circuit 200 of FIG. 2 can operate at a lower supply voltage level than the prior art. Go back to equation (1):

From equation (1), it can be found that to obtain a zero temperature coefficient, the voltage level of the output voltage VOUT of the conventional bandgap reference circuit is limited to 1.25V. However, referring to equation (8), the voltage level of the output voltage VREF of the bandgap reference circuit disclosed in the present invention can be reduced to less than 0.7V. Referring to Fig. 2, the resistor R2 is directly connected to the ground terminal instead of being connected to the bipolar transistor Q3 as shown in Fig. 1. Therefore, the output voltage VREF of the bandgap reference circuit 200 can be adjusted by selecting a different resistor R2. With the configuration of the bandgap reference circuit disclosed in the present invention, the voltage level of the output voltage VREF can be adjusted from 0V to 0.64V. Since the voltage level of the output voltage VREF drops, the supply power VDD The voltage level can be as low as 1V or less.

The technical and technical features of the present invention have been disclosed as above, and those skilled in the art can still make various substitutions and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention should be construed as not limited by the scope of the invention, and the invention is intended to be

200‧‧‧Gap reference circuit

22‧‧‧current source unit

24‧‧‧voltage circuit

M1, M2, M3, M4‧‧‧ PMOS transistors

OP‧‧‧Operational Amplifier

Q1, Q2, Q3‧‧‧ bipolar transistor

R1, R2, R3, R4‧‧‧ resistance

Claims (10)

A gap reference circuit includes: a first current source; a second current source; a third current source; a fourth current source; an operational amplifier electrically connected to the first to fourth current sources; a first bipolar transistor having an emitter electrically connected to the first current source, and a base and a collector electrically connected to a ground voltage; a voltage dividing circuit electrically connected to the first Between the emitter of the bipolar transistor and the base, the voltage dividing circuit provides a bias voltage proportional to the emitter-base voltage difference of the first bipolar transistor; a second double a polar transistor having a base for receiving the bias voltage, an emitter electrically coupled to the second current source, and a collector electrically coupled to the ground voltage; a third bipolar a transistor having a collector and a base electrically connected to the ground voltage; a first resistor electrically coupled between the third current source and an emitter of the third bipolar transistor; a second resistor electrically connected to the fourth current source and the connection Between ground voltages; The intersection of the fourth current source and the second resistor provides a bandgap reference voltage. A gap reference circuit according to claim 1, wherein the first current source is formed by a PMOS transistor having a source electrically connected to a supply source having an output electrically connected to the operational amplifier One of the gates and one of the emitters electrically connected to the first bipolar transistor. A bandgap reference circuit according to claim 2, wherein the second current source is formed by a PMOS transistor having a source electrically connected to the supply source, the output being electrically connected to the operational amplifier One of the terminals is gated, and has one of the emitters electrically connected to the second bipolar transistor and one of the first inputs of the operational amplifier. A gap reference circuit according to claim 3, wherein the third current source is formed by a PMOS transistor having a source electrically connected to the supply source, the output having an electrical connection to the operational amplifier a gate of the terminal, and one of the second input terminals electrically connected to the first resistor and the operational amplifier. A bandgap reference circuit according to claim 4, wherein the fourth current source is formed by a PMOS transistor having a source electrically connected to the supply source, the output having an electrical connection to the operational amplifier One of the terminals is gated, and has one electrically connected to one of the second resistors. The bandgap reference circuit of claim 1, wherein the voltage dividing circuit comprises: a plurality of resistors connected in series between the emitter of the first bipolar transistor and the base to provide the Bias voltage. The bandgap reference circuit of claim 6, wherein the temperature coefficient of the bandgap reference voltage is increased by increasing an emitter area of the third bipolar transistor and an emitter area of the second bipolar transistor And adjust to a positive value. A bandgap reference circuit according to claim 6 wherein the temperature coefficient of the bandgap reference voltage is adjusted to a negative value by increasing the bias voltage. The bandgap reference circuit of claim 6, wherein the temperature coefficient of the bandgap reference voltage is selected by selecting an emitter area of the third bipolar transistor and an emitter area of the second bipolar transistor And the voltage value of the bias voltage and the resistance ratio of the first resistor to the second resistor are adjusted to a real value of zero. According to the energy gap reference circuit of claim 5, wherein the voltage level of the power supply is less than 1V.