TWI514484B - Semicondutor device and method for manufacturing same - Google Patents

Description

Semiconductor device and manufacturing method thereof

The present invention relates to a semiconductor device and a method of fabricating the same.

At present, a semiconductor device having a wafer and an interposer is formed by first arranging a wafer on a top surface of an interposer, and then providing an encapsulant on a top surface side of the interposer, the encapsulant The wafer and the top surface exposed from the wafer are covered only to expose the bottom surface of the interposer and the side surfaces connecting the top surface and the bottom surface. However, the interposer of the semiconductor device obtained by the above method is liable to cause structural damage due to external force collision during process transportation. In addition, the interface between the encapsulant of the semiconductor device obtained by the above method and the interposer is only a part of the top surface of the interposer, and heat is easily generated during the operation of the wafer, thereby causing a gap between the encapsulant and the interposer. The thermal shear stress due to heat is large, which reduces the reliability of the semiconductor device.

In view of the above, it is necessary to provide a semiconductor device and a method of fabricating the same that can solve the above problems to improve the reliability of the semiconductor device.

A method of fabricating a semiconductor device, comprising the steps of: providing a carrier having a carrier surface; providing a plurality of interposers, each of the plurality of interposers having a conductive line formed thereon Glass substrate The bottom portion has a first top surface, a first bottom surface opposite to the first top surface, and a first annular side surface connecting the first top surface and the first bottom surface, and a plurality of interposers are spaced apart from the a first surface of the glass substrate of each of the interposers is closer to the carrier surface than the corresponding first top surface; a plurality of wafers are provided, and each of the plurality of wafers is mounted Provided on one of the interposers; an encapsulant disposed on a side of the carrying surface of the carrier, the encapsulant covering the plurality of wafers, the plurality of interposers, and exposed from the plurality of interposers a carrier surface; removing the carrier to obtain a package; and cutting the package to obtain a plurality of mutually separated semiconductor devices, each of the plurality of semiconductor devices including one of the intermediates a board, a plurality of the wafers and a protective body, wherein the protective body is a part of the encapsulant, each protective body has an opposite second top surface and a second bottom surface, and the second bottom surface is opposite to the second top surface Close to the first bottom surface, The second bottom surface coplanar with the first bottom surface.

A semiconductor device includes an interposer, a wafer, and a protective body. The interposer has a glass substrate formed with conductive traces. The glass substrate has a first top surface, a first bottom surface, and a first annular side surface connecting the first top surface and the first bottom surface. The wafer is mounted on a top surface of the interposer and electrically connected to a conductive line of the glass substrate. The protective body covers the wafer, a first top surface exposed from the wafer, and the first annular side surface, and exposes the first bottom surface. The protection body has opposite second top surfaces and second bottom surfaces, the second bottom surface is closer to the first bottom surface than the second top surface, and the second bottom surface is coplanar with the first bottom surface.

In the semiconductor device obtained by the method for fabricating a semiconductor device of the present invention, the protective body covers the wafer, the first top surface exposed from the wafer, and the first annular side surface to expose the first bottom surface So that the protective body can be protected In addition to the wafer protection, the interposer can be provided with more perfect and effective protection, so that the interposer is not easily damaged by external force during process transportation. In addition, since the first top surface and the first annular side surface of the interposer are covered by the protective body, thermal shear stress generated by heat between the protective body and the interposer can be reduced, and the semiconductor is improved. Device reliability. Furthermore, a plurality of semiconductor devices are simultaneously formed, and a plurality of mutually separated semiconductor devices can be obtained by cutting, and the production efficiency is also high.

10‧‧‧Carrier

101‧‧‧ receiving groove

11‧‧‧bearing rubber sheet

13‧‧‧Border

111‧‧‧ bearing surface

20‧‧‧Intermediary board

21‧‧‧ glass substrate

23‧‧‧First electrical connection pad

25‧‧‧Second electrical connection pad

211‧‧‧ first top surface

212‧‧‧ first bottom surface

213‧‧‧First annular side

30‧‧‧ wafer

31‧‧‧Active face

33‧‧‧Inactive surface

35‧‧‧electrode pads

37‧‧‧Electrical components

40‧‧‧Package colloid

50‧‧‧Package

60‧‧‧ solder balls

70‧‧‧ semiconductor devices

80‧‧‧Protection

81‧‧‧Second top

82‧‧‧second bottom surface

83‧‧‧Second annular side

1 is a top plan view of a carrier provided by an embodiment of the present technical solution.

Figure 2 is a cross-sectional view taken along line II-II of Figure 1.

Fig. 3 is a plan view showing a plurality of interposers provided on the carrier shown in Fig. 1;

Figure 4 is a cross-sectional view taken along line IV-IV of Figure 3.

Fig. 5 is an enlarged view of a portion V in Fig. 4.

Figure 6 is a plan view of a wafer after mounting a wafer on each of the interposers shown in Figure 3.

Figure 7 is a cross-sectional view taken along line VII-VII of Figure 6.

Figure 8 is an enlarged view of a portion VIII of Figure 7.

Figure 9 is a cross-sectional view taken after the frame of the carrier is removed from Figure 7.

Fig. 10 is a cross-sectional view showing the encapsulant provided on the side of the carrier shown in Fig. 9 adjacent to the interposer.

Figure 11 is a cross-sectional view of the carrier sheet of the carrier removed from Figure 10.

12 is a package obtained after forming a plurality of solder balls on the interposer shown in FIG. Cutaway view.

Figure 13 is a cross-sectional view of a plurality of mutually separated semiconductor devices obtained after the package shown in Figure 12 is cut.

Figure 14 is an enlarged view of a semiconductor device.

The method for fabricating the semiconductor device and the semiconductor device provided by the present technical solution will be further described in detail below with reference to the accompanying drawings and embodiments.

A method of fabricating a semiconductor device provided by an embodiment of the present technical solution includes the following steps:

In the first step, referring to FIG. 1 and FIG. 2, a carrier 10 having a receiving recess 101 is provided. The carrier 10 includes a carrier rubber sheet 11 and a hollow bezel 13. The carrier rubber sheet 11 has a bearing surface 111. The frame 13 is disposed on the bearing surface 111. The frame 13 cooperates with the supporting rubber plate 11 to form the receiving groove 101.

In the second step, referring to FIG. 3, FIG. 4 and FIG. 5, a plurality of interposers 20 are provided. Each of the interposers 20 has a glass substrate 21 formed with a conductive line, a plurality of first electrical connection pads 23 and a plurality of second electrical connection pads 25. The glass substrate 21 has a first top surface 211 , a first bottom surface 212 , and a first annular side surface 213 connecting the first top surface 211 and the first bottom surface 212 . The plurality of first electrical connection pads 23 are exposed on one side of the first top surface 211 of the glass substrate 21 and are electrically connected to the conductive lines in the glass substrate 21 . The plurality of second electrical connection pads 25 are exposed on one side of the first bottom surface 212 of the glass substrate 21 and are electrically connected to the conductive lines in the glass substrate 21.

Then, a plurality of interposers 20 are spacedly disposed on the bearing surface 111 of the carrier rubber sheet 11 exposed from the receiving recess 101 such that the first bottom surface of each of the interposing boards 20 212 is closer to the bearing surface 111 than the corresponding first top surface 211.

In the third step, referring to FIG. 6, FIG. 7, and FIG. 8, a plurality of wafers 30 are provided. Each wafer 30 has opposing active faces 31 and inactive faces 33. Each of the wafers 30 further includes a plurality of electrode pads 35 disposed on the active surface 31.

Then, each of the plurality of wafers 30 is separately mounted on a corresponding one of the interposers 20. Each of the plurality of electrode pads 35 of each of the wafers 30 is electrically connected to a first electrical connection pad 23 of the corresponding interposer 20 via a conductive member 37.

In the fourth step, referring to FIG. 9 and FIG. 10, the frame 13 is removed, and an encapsulant 40 is disposed on the side of the bearing surface 111 of the supporting rubber sheet 11. The encapsulant 40 covers the plurality of wafers 30, the plurality of interposers 20, and the bearing surface 111 of the carrier rubber sheet 11 exposed from the interposer 20. The material of the encapsulant 40 is an epoxy molding compound.

In the fifth step, the carrier rubber sheet 11 is removed to obtain a package body 50 as shown in FIG.

In a sixth step, referring to FIG. 12, a solder ball 60 is implanted on each of the plurality of second electrical connection pads 25 by a printed coating method. The material of the solder balls 60 generally includes mainly tin.

In a seventh step, referring to FIG. 13 and FIG. 14, the package 50 having the solder balls 60 is cut to obtain a plurality of semiconductor devices 70 separated from each other.

Each of the semiconductor devices 70 includes one of the interposer 20, one of the wafers 30, and a protective body 80. The protective body 80 is a part of the encapsulant 40, that is, the plurality of protective bodies 80 of the plurality of semiconductor devices 70 collectively constitute the encapsulant 40 . The protective body 80 covers the wafer 30, the first top surface 211 and the first annular side surface 213 exposed from the wafer 30, and exposes the first bottom surface 212. Each protection body 80 has a second top surface 81, a second bottom surface 82 opposite to the second top surface 81, and a second annular side surface 83 connected to the second top surface 81 and the second bottom surface 82. . The second bottom surface 82 is closer to the first bottom surface 212 than the second top surface 81 , and the second bottom surface 82 is coplanar with the first bottom surface 212 .

In the semiconductor device 70 obtained by the method of fabricating the semiconductor device 70 of the present invention, the protective body 80 covers the wafer 30, the first top surface 211 exposed from the wafer 30, and the first annular side surface 213. The first bottom surface 212 is exposed, so that the protective body 80 can provide more perfect and effective protection for the interposer 20, in addition to protecting the wafer 30, so that the interposer 20 is in the process of transportation. It is not easy to cause structural damage due to external force collision. In addition, since the first top surface 211 and the first annular side surface 213 of the interposer 20 are both covered by the protection body 80, heat generated by heat between the protection body 80 and the interposer 20 can be reduced. The shear stress increases the reliability of the semiconductor device 70. Furthermore, a plurality of semiconductor devices 70 are simultaneously formed, and a plurality of semiconductor devices 70 separated from each other can be obtained by dicing, and the production efficiency is also high.

In other embodiments, the sixth step described above may be performed after the step of obtaining a plurality of mutually separated semiconductor devices 70 by the dicing package 50, that is, after the package 50 is obtained, the package 50 is first etched to obtain a plurality of separations. The semiconductor device of the solderless ball 60, and then the solder ball 60 is implanted on each of the plurality of second electrical connection pads 25 of each semiconductor device.

In other embodiments, the frame 13 may also be omitted. In this case, the step of removing the frame 13 may also be omitted.

In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

20‧‧‧Intermediary board

211‧‧‧ first top surface

212‧‧‧ first bottom surface

213‧‧‧First annular side

30‧‧‧ wafer

60‧‧‧ solder balls

70‧‧‧ semiconductor devices

80‧‧‧Protection

81‧‧‧Second top

82‧‧‧second bottom surface

83‧‧‧Second annular side

Claims (8)

A method of fabricating a semiconductor device, comprising the steps of: providing a carrier having a carrier surface; providing a plurality of interposers, each of the plurality of interposers having a conductive line formed thereon a glass substrate having a first top surface, a first bottom surface opposite the first top surface, and a first annular side surface connecting the first top surface and the first bottom surface, and a plurality of interposers Arranging on the bearing surface at intervals such that the first bottom surface of the glass substrate of each interposer is closer to the bearing surface than the corresponding first top surface; providing a plurality of wafers and the plurality of wafers Each of the wafers is respectively mounted on a corresponding one of the interposers; an encapsulant is disposed on a side of the carrying surface of the carrier, the encapsulant covers the plurality of wafers, the plurality of interposers and the slave a plurality of interposer exposed contact surfaces; removing the carrier to obtain a package; and cutting the package to obtain a plurality of mutually separated semiconductor devices, each of the plurality of semiconductor devices Each of the semiconductor devices includes an interposer, a wafer, and a protective body. The protective body is a part of the encapsulant, and each of the protective bodies has an opposite second top surface and a second bottom surface. The second bottom surface is closer to the first bottom surface than the second top surface, and the second bottom surface is coplanar with the first bottom surface. The method of fabricating the semiconductor device of claim 1, wherein each of the interposers has a plurality of first electrical connection pads, and the plurality of first electrical connection pads are exposed to the glass substrate. a first top surface side, and electrically connected to the conductive lines in the glass substrate, each wafer has an active surface and a plurality of electrode pads disposed on the active surface, wherein the plurality of wafers are Each of the wafers is mounted on one of the interposers, each of the wafers Each of the plurality of electrode pads is electrically connected to a first electrical connection pad of the corresponding interposer through a conductive member. The method of fabricating a semiconductor device according to claim 1, wherein each of the interposers has a plurality of second electrical connection pads, and the plurality of second electrical connection pads are exposed to the glass substrate. a first bottom surface side, and electrically connected to the conductive line in the glass substrate, after the step of removing the carrier rubber sheet and before the step of cutting the package body, the manufacturing method of the semiconductor device further includes A step of implanting a solder ball on each of the plurality of second electrical connection pads. The method of fabricating a semiconductor device according to claim 1, wherein each of the interposers has a plurality of second electrical connection pads, and the plurality of second electrical connection pads are exposed to the glass substrate. a first bottom surface side, and electrically connected to the conductive line in the glass substrate, after the step of cutting the package body, the manufacturing method of the semiconductor device further includes a plurality of second electrical properties in each semiconductor device A step of implanting a solder ball on each of the second electrical connection pads in the connection pad. The method of manufacturing the semiconductor device according to the first aspect of the invention, wherein the carrier is a carrier having a receiving groove, the carrier comprises a carrier rubber plate and a hollow frame, the carrier tape The board has the bearing surface, the frame is disposed on the bearing surface, and the frame cooperates with the supporting rubber plate to form the receiving groove, and the plurality of interposers are spaced apart from the bearing surface. In the above step, each of the plurality of interposers is received in the receiving groove, and each of the plurality of wafers is configured on one of the interposers. Thereafter, before the step of providing an encapsulant on the side of the carrying surface of the carrier, the method of fabricating the semiconductor device further includes the step of removing the bezel. A semiconductor device comprising an interposer, a wafer and a protective body, the interposer having a glass substrate formed with a conductive line, the glass substrate having a first top surface, a first bottom surface, and a connection to the first a top surface and a first annular side of the first bottom surface, the wafer Formed on a top surface of the interposer and electrically connected to a conductive line of the glass substrate, the protective body covering the wafer, a first top surface exposed from the wafer, and the first ring a side surface exposing the first bottom surface, the protection body having opposite second top surfaces and a second bottom surface, wherein the second bottom surface is closer to the first bottom surface than the second top surface, and the second bottom surface is The first bottom surface is coplanar. The semiconductor device of claim 6, wherein the interposer further has a plurality of first electrical connection pads, the plurality of first electrical connection pads being exposed to the first top of the glass substrate a side of the surface, and electrically connected to the conductive line in the glass substrate, the wafer has an active surface and a plurality of electrode pads disposed on the active surface, each of the plurality of electrode pads The pads are electrically connected to a first electrical connection pad of the interposer through a conductive member. The semiconductor device of claim 6, wherein the interposer further has a plurality of second electrical connection pads, the plurality of second electrical connection pads being exposed to the first bottom surface of the glass substrate One side, and electrically connected to the conductive line in the glass substrate, the semiconductor device further includes a plurality of solder balls, each of the plurality of solder balls being disposed on one of the second electrical Connect the pad.