TWI478256B - Touch panel and manufacturing method thereof - Google Patents
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Description
本發明是有關於一種面板及其製作方法,且特別是關於一種觸控面板及其製作方法。The present invention relates to a panel and a method of fabricating the same, and more particularly to a touch panel and a method of fabricating the same.
近年來觸控技術被廣泛地應用在各式多媒體電子產品中,特別是隨身的移動式產品,如手機、電子書、平板電腦等。使用觸控技術作為輸入之手段可有效取代現有之鍵盤或滑鼠的輸入方法。除了便利性之外,更由於操作的直覺性,觸控的輸入方式技術已成為極受歡迎的人機介面與多媒體互動方式。In recent years, touch technology has been widely used in various multimedia electronic products, especially mobile products such as mobile phones, e-books, and tablet computers. The use of touch technology as an input method can effectively replace the input method of the existing keyboard or mouse. In addition to convenience, and because of the intuitive operation, touch input technology has become a very popular human-machine interface and multimedia interaction.
一般而言,觸控面板主要可分為電阻式與電容式。以電容式觸控面板為例,習知的電容式觸控面板包括基板、雙層導電層、絕緣層位於雙層導電層之間、與導電層電性連接之多條扇出走線以及與多條扇出走線電性連接之多個接墊。基板具有位於觸控區以及環繞此觸控區之周邊線路區。導電層以及位於雙層導電層之間的絕緣層位於基板之觸控區上,而扇出走線以及接墊位於基板之周邊線路區。In general, touch panels are mainly classified into resistive and capacitive. Taking a capacitive touch panel as an example, a conventional capacitive touch panel includes a substrate, a double-layer conductive layer, and a plurality of fan-out traces electrically connected between the two-layer conductive layer and the conductive layer. A plurality of pads electrically connected by the fan-out wires. The substrate has a peripheral line area located in the touch area and surrounding the touch area. The conductive layer and the insulating layer between the two layers of the conductive layer are located on the touch area of the substrate, and the fan-out traces and the pads are located in the peripheral line region of the substrate.
扇出走線多為導電良好的金屬材質,然其容易氧化。因此,為避免扇出走線氧化而影響觸控品質,需於扇出走線上覆蓋另一絕緣層。換句話說,現行技術需有兩道手續製作觸控區內以及周邊線路區之絕緣層。如此,造成製程的材料以及時間上的浪費。The fan-out traces are mostly made of conductive metal, but they are easily oxidized. Therefore, in order to avoid the oxidation of the fan-out trace and affect the touch quality, another insulation layer needs to be covered on the fan-out trace. In other words, the current technology requires two procedures to make the insulation layer in the touch area and the surrounding line area. In this way, the material of the process and the waste of time are caused.
此外,在現行周邊線路區中,與晶片之接腳接合的接 墊區是以扇出走線環繞導電層的方式製作而成。由於扇出走線以及導電層的厚度不一,造成接墊區表面不平整,因此晶片與觸控面板接合時的下壓力易造成接墊區下之膜層的損壞,進而使晶片之接腳的信賴性不佳,並影響觸控面板之觸控品質。In addition, in the current peripheral line area, the connection with the pins of the wafer is The pad area is made by fan-out traces surrounding the conductive layer. Because the fan-out traces and the thickness of the conductive layer are different, the surface of the pad region is uneven, so the downward pressure when the wafer is bonded to the touch panel is likely to cause damage to the film layer under the pad region, thereby making the pins of the wafer Poor reliability and affect the touch quality of the touch panel.
本發明提供一種觸控面板,其具有良好的觸控品質。The invention provides a touch panel with good touch quality.
本發明提供一種觸控面板的製作方法,其可製作出觸控品質良好的觸控面板。The invention provides a method for manufacturing a touch panel, which can produce a touch panel with good touch quality.
本發明提供一種觸控面板的製作方法,包括以下步驟。於一基板上形成一第一導電層,第一導電層包括多個彼此電性絕緣的第一感測電極以及位於第一感測電極之一側的多個第一接墊。於基板上形成多條扇出走線,各扇出走線分別與其中一個第一接墊電性連接,各第一感測電極分別與其中一條扇出走線電性連接,且部分的扇出走線未與第一感測電極電性連接。於基板上形成一絕緣層,以覆蓋部分的第一感測電極以及扇出走線,且絕緣層曝露出未與第一感測電極電性連接之扇出走線的部分區域。於基板上形成一第二導電層,第二導電層包括與第一感測電極交錯且彼此電性絕緣的多個第二感測電極以及覆蓋第一接墊的多個第二接墊,其中第一感測電極與第二感測電極電性絕緣,且未與第一感測電極電性連接之各扇出走線分別與其中一個第二感測電極電性連接。The invention provides a method for manufacturing a touch panel, which comprises the following steps. Forming a first conductive layer on a substrate, the first conductive layer includes a plurality of first sensing electrodes electrically insulated from each other and a plurality of first pads on one side of the first sensing electrodes. A plurality of fan-out wires are formed on the substrate, and each of the fan-out wires is electrically connected to one of the first pads, and each of the first sensing electrodes is electrically connected to one of the fan-out wires, and part of the fan-out wires are not connected. Electrically connected to the first sensing electrode. An insulating layer is formed on the substrate to cover a portion of the first sensing electrode and the fan-out trace, and the insulating layer exposes a portion of the fan-out trace that is not electrically connected to the first sensing electrode. Forming a second conductive layer on the substrate, the second conductive layer includes a plurality of second sensing electrodes interleaved with the first sensing electrodes and electrically insulated from each other, and a plurality of second pads covering the first pads, wherein The first sensing electrode is electrically insulated from the second sensing electrode, and each of the fan-out wires that are not electrically connected to the first sensing electrode is electrically connected to one of the second sensing electrodes.
在本發明之一實施例中,前述之絕緣層包括多個島狀 圖案以及一週邊圖案,各島狀圖案位於各第一感測電極與各第二感測電極交錯處,而週邊圖案覆蓋扇出走線,且週邊圖案曝露出未與第一感測電極電性連接之扇出走線的部分區域。In an embodiment of the invention, the foregoing insulating layer comprises a plurality of islands a pattern and a peripheral pattern, wherein each of the island patterns is located at an intersection of each of the first sensing electrodes and each of the second sensing electrodes, and the peripheral pattern covers the fan-out trace, and the peripheral pattern is not electrically connected to the first sensing electrode Part of the fan exit line.
在本發明之一實施例中,前述之各第一感測電極包括多個第一感測墊以及多個第一橋接部,各第一橋接部連接相鄰兩個第一感測墊,且延伸至週邊區的各第一橋接部分別與其中一條扇出走線電性連接,各島狀圖案分別覆蓋其中一個第一橋接部,而週邊圖案至少覆蓋扇出走線與第一橋接部連接的區域。In an embodiment of the present invention, each of the first sensing electrodes includes a plurality of first sensing pads and a plurality of first bridges, each first bridge connecting two adjacent first sensing pads, and Each of the first bridging portions extending to the peripheral region is electrically connected to one of the fan-out traces, and each of the island-shaped patterns respectively covers one of the first bridging portions, and the peripheral pattern covers at least the region where the fan-out trace is connected to the first bridging portion. .
在本發明之一實施例中,前述之各第二感測電極包括多個第二感測墊以及多個第二橋接部,各第二橋接部連接相鄰兩個第二感測墊,各第一橋接部分別與各第二橋接部交錯,且各島狀圖案分別位於各第一橋接部與各第二橋接部的交錯處,週邊圖案曝露出扇出走線與第二橋接部電性連接的區域,且未與第一橋接部電性連接之各扇出走線分別與延伸至週邊區的其中一個第二橋接部電性連接。In an embodiment of the present invention, each of the foregoing second sensing electrodes includes a plurality of second sensing pads and a plurality of second bridge portions, each of the second bridge portions connecting adjacent two second sensing pads, each of The first bridge portion is respectively interlaced with each of the second bridge portions, and each of the island patterns is located at an intersection of each of the first bridge portions and each of the second bridge portions, and the peripheral pattern exposes the fan-out trace and is electrically connected to the second bridge portion. Each of the fan-out regions that are not electrically connected to the first bridge portion is electrically connected to one of the second bridge portions extending to the peripheral region.
在本發明之一實施例中,前述之觸控面板的製作方法更包括在形成第一導電層之前,於基板上形成一黑矩陣以於基板上定義出一觸控區以及一週邊區,其中週邊區被黑矩陣所覆蓋,而觸控區未被黑矩陣所覆蓋。In one embodiment of the present invention, the method for fabricating the touch panel further includes forming a black matrix on the substrate to define a touch region and a peripheral region on the substrate before forming the first conductive layer, wherein The peripheral area is covered by the black matrix, and the touch area is not covered by the black matrix.
在本發明之一實施例中,前述之各第一感測電極以及各第二感測電極分別由觸控區延伸至週邊區以覆蓋部分的黑矩陣。In an embodiment of the invention, each of the first sensing electrodes and each of the second sensing electrodes respectively extend from the touch area to the peripheral area to cover a portion of the black matrix.
在本發明之一實施例中,前述之各扇出走線覆蓋延伸至週邊區的其中一個第一感測電極,而延伸至週邊區的第二感測電極覆蓋未與第一感測電極電性連接之其中一條扇出走線。In an embodiment of the invention, each of the fan-out traces covers one of the first sensing electrodes extending to the peripheral region, and the second sensing electrode extending to the peripheral region covers the electrical connection with the first sensing electrode. One of the connections is fanned out.
在本發明之一實施例中,前述之絕緣層包括位於觸控區內的多個島狀圖案以及位於週邊區內的一週邊圖案,各島狀圖案位於各第一感測電極與各第二感測電極交錯處,而週邊圖案覆蓋扇出走線,且週邊圖案曝露出未與第一感測電極電性連接之扇出走線的部分區域。In an embodiment of the invention, the insulating layer includes a plurality of island patterns in the touch area and a peripheral pattern in the peripheral area, and the island patterns are located at each of the first sensing electrodes and each of the second patterns. The sensing electrodes are staggered, and the peripheral pattern covers the fan-out traces, and the peripheral pattern exposes a partial region of the fan-out trace that is not electrically connected to the first sensing electrode.
在本發明之一實施例中,前述之各第一感測電極包括多個第一感測墊以及多個第一橋接部,各第一橋接部連接相鄰兩個第一感測墊,且延伸至週邊區的各第一橋接部分別與其中一條扇出走線電性連接,各島狀圖案分別覆蓋其中一個第一橋接部,而週邊圖案至少覆蓋扇出走線以及第一橋接部。In an embodiment of the present invention, each of the first sensing electrodes includes a plurality of first sensing pads and a plurality of first bridges, each first bridge connecting two adjacent first sensing pads, and Each of the first bridging portions extending to the peripheral region is electrically connected to one of the fan-out traces, and each of the island-shaped patterns respectively covers one of the first bridging portions, and the peripheral pattern covers at least the fan-out trace and the first bridging portion.
在本發明之一實施例中,前述之各第二感測電極包括多個第二感測墊以及多個第二橋接部,各第二橋接部連接相鄰兩個第二感測墊,各第一橋接部分別與各第二橋接部交錯,且各島狀圖案分別位於各第一橋接部與各第二橋接部的交錯處,未與第一橋接部電性連接之各扇出走線分別與延伸至週邊區的其中一個第二橋接部電性連接,且週邊圖案至少曝露出該些第二橋接部。In an embodiment of the present invention, each of the foregoing second sensing electrodes includes a plurality of second sensing pads and a plurality of second bridge portions, each of the second bridge portions connecting adjacent two second sensing pads, each of The first bridge portions are respectively interlaced with the second bridge portions, and the island patterns are respectively located at the intersection of the first bridge portions and the second bridge portions, and the fan-out lines that are not electrically connected to the first bridge portion are respectively respectively And electrically connecting to one of the second bridge portions extending to the peripheral region, and the peripheral pattern at least exposing the second bridge portions.
本發明另提供一種以前述製作方式製作而成的觸控面板。The present invention further provides a touch panel fabricated by the above-described manufacturing method.
基於上述,本發明改變絕緣層的設計,將位於週邊區以及觸控區的絕緣層整合於一道光罩製程,藉此縮減於製作觸控面板時絕緣層所需的光罩數量,因而降低觸控面板於製程的材料以及時間上的浪費。此外,藉由改變扇出走線與第一導電層以及第二導電層之間相對的配置方式,提供接墊區適於與晶片之接腳接合的表面,進而提升晶片之接腳的信賴性以及觸控面板之觸控品質。Based on the above, the present invention changes the design of the insulating layer, and integrates the insulating layer located in the peripheral region and the touch region into a mask process, thereby reducing the number of masks required for the insulating layer when the touch panel is fabricated, thereby reducing the touch. The control panel is a waste of materials and time in the process. In addition, by changing the arrangement between the fan-out traces and the first conductive layer and the second conductive layer, the surface of the pad region adapted to be bonded to the pins of the wafer is provided, thereby improving the reliability of the pins of the wafer and The touch quality of the touch panel.
為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.
圖1為本發明一實施例之觸控面板的製作流程圖。請參照圖1,本實施例之觸控面板的製作方法包括下列步驟。於一基板上形成一第一導電層(步驟S100)。於基板上形成多條扇出走線(步驟S200)。於基板上形成一絕緣層(步驟S300)。於基板上形成一第二導電層(步驟S400)。FIG. 1 is a flow chart of manufacturing a touch panel according to an embodiment of the invention. Referring to FIG. 1, the manufacturing method of the touch panel of this embodiment includes the following steps. A first conductive layer is formed on a substrate (step S100). A plurality of fan-out traces are formed on the substrate (step S200). An insulating layer is formed on the substrate (step S300). A second conductive layer is formed on the substrate (step S400).
以下將搭配圖2至圖6,對本發明一實施例之觸控面板的製作流程進行詳細地描述。圖2至圖6為本發明一實施例之觸控面板的製作流程的上視示意圖。請參照圖2,除了上述步驟S100、S200、S300、S400外,本實施例之觸控面板的製作方法可選擇性地包括設置一黑矩陣120於基板110上,以定義出一觸控區A1以及一週邊區A2,其中週邊區A2被黑矩陣120所覆蓋,而觸控區A1未被黑矩陣120所覆蓋。基板110可為透明的基板,其材質例如是 玻璃、石英、有機聚合物或是其他合適的材料。黑矩陣120的材質例如是樹脂(resin)、金屬氧化物或其他具有良好遮光效果與低反射特性的適當材質。The manufacturing process of the touch panel according to an embodiment of the present invention will be described in detail below with reference to FIG. 2 to FIG. 6 . 2 to FIG. 6 are schematic top views of a manufacturing process of a touch panel according to an embodiment of the invention. Referring to FIG. 2, in addition to the above steps S100, S200, S300, and S400, the method for fabricating the touch panel of the present embodiment may optionally include disposing a black matrix 120 on the substrate 110 to define a touch area A1. And a peripheral area A2, wherein the peripheral area A2 is covered by the black matrix 120, and the touch area A1 is not covered by the black matrix 120. The substrate 110 can be a transparent substrate, and the material thereof is, for example, Glass, quartz, organic polymers or other suitable materials. The material of the black matrix 120 is, for example, a resin, a metal oxide, or other suitable material having a good light-shielding effect and low reflection characteristics.
圖3至圖6分別繪示圖1中之步驟S100至S400之各膜層的製作方法。需說明的是,為清楚繪示各步驟所形成之膜層及各膜層之間的相對配置,以下將提供觸控面板之四個區域的放大圖及其剖面圖,其中前述四個區域包含位於觸控區A1的區域A、位於觸控區A1以及週邊區A2之交界的區域B以及區域C以及位於週邊區A2的區域D,且區域B以及區域C位於觸控面板的不同邊。3 to FIG. 6 respectively illustrate a method of fabricating each of the layers of steps S100 to S400 of FIG. 1. It should be noted that, in order to clearly illustrate the relative arrangement between the film layers formed in each step and the film layers, an enlarged view of the four regions of the touch panel and a cross-sectional view thereof are provided below, wherein the foregoing four regions include The area A located in the touch area A1, the area B located at the boundary between the touch area A1 and the peripheral area A2, and the area C located in the peripheral area A2, and the area B and the area C are located on different sides of the touch panel.
圖3A至圖3D分別為圖3中區域A、B、C、D的放大示意圖,而圖3A’至圖3D’分別為沿圖3A至圖3D中之剖線A-A’、B-B’、C-C’、D-D’的剖面示意圖。3A to 3D are enlarged views of the regions A, B, C, and D in FIG. 3, respectively, and FIGS. 3A' to 3D' are taken along the line A-A' and B-B in FIG. 3A to FIG. 3D, respectively. Schematic diagram of ', C-C', D-D'.
請參照圖3,於基板110上形成第一導電層130,第一導電層130包括彼此電性絕緣的多個第一感測電極132以及位於第一感測電極132之一側的多個第一接墊134。第一導電層130的材質以透明導電材質為佳。透明導電材質例如是金屬氧化物,如銦錫氧化物、銦鋅氧化物、鋁錫氧化物、鋁鋅氧化物、銦鍺鋅氧化物、或其它合適的氧化物、或者是上述至少二者之堆疊層。Referring to FIG. 3, a first conductive layer 130 is formed on the substrate 110. The first conductive layer 130 includes a plurality of first sensing electrodes 132 electrically insulated from each other and a plurality of first electrodes on one side of the first sensing electrodes 132. A pad 134. The material of the first conductive layer 130 is preferably a transparent conductive material. The transparent conductive material is, for example, a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable oxide, or at least two of the above Stack layers.
此外,位於第一感測電極132之一側的多個第一接墊134例如是位於週邊區A2,且各第一接墊134例如是沿一第一方向X排列且沿一第二方向Y延伸。第一感測電極132例如是沿第二方向Y排列且沿第一方向X由觸控區 A1延伸至週邊區A2。在本實施例中,第一方向X例如是垂直於第二方向Y。In addition, the plurality of first pads 134 located on one side of the first sensing electrodes 132 are located, for example, in the peripheral area A2, and each of the first pads 134 is, for example, arranged along a first direction X and along a second direction Y. extend. The first sensing electrodes 132 are, for example, arranged in the second direction Y and are in the first direction X by the touch area A1 extends to the peripheral area A2. In the present embodiment, the first direction X is, for example, perpendicular to the second direction Y.
請參照圖3A至圖3D及圖3A’至圖3D’,本實施例之第一感測電極132包括多個第一感測墊P1以及多個第一橋接部B1,其中各第一橋接部B1連接相鄰兩個第一感測墊P1。另外,各第一感測電極132具有一第一橋接部B1僅連接至一個第一感測墊P1,且此一第一橋接部B1往週邊區A2延伸以覆蓋部分的黑矩陣120。Referring to FIG. 3A to FIG. 3D and FIG. 3A′ to FIG. 3D′ , the first sensing electrode 132 of the embodiment includes a plurality of first sensing pads P1 and a plurality of first bridging portions B1 , wherein each first bridging portion B1 connects adjacent two first sensing pads P1. In addition, each of the first sensing electrodes 132 has a first bridge portion B1 connected to only one first sensing pad P1, and the first bridge portion B1 extends toward the peripheral region A2 to cover a portion of the black matrix 120.
請參照圖4,於基板110上形成多條扇出走線140。具體而言,於基板110之周邊區A2形成多條扇出走線140。各扇出走線140分別與其中一個第一接墊134電性連接,各第一感測電極132分別與其中一條扇出走線140電性連接,且部分的扇出走線140未與第一感測電極132電性連接。此外,扇出走線140的材質可以是導電良好的鋁、銅等金屬或金屬疊層或是單一金屬材料層。Referring to FIG. 4, a plurality of fan-out traces 140 are formed on the substrate 110. Specifically, a plurality of fan-out traces 140 are formed in the peripheral region A2 of the substrate 110. Each of the fan-out wires 140 is electrically connected to one of the first pads 134, and each of the first sensing electrodes 132 is electrically connected to one of the fan-out wires 140, and a portion of the fan-out wires 140 are not connected to the first sensing. The electrode 132 is electrically connected. In addition, the material of the fan-out wire 140 may be a metal or metal laminate such as aluminum or copper which is electrically conductive or a single metal material layer.
圖4A至圖4C分別為圖4中區域B、C、D的放大示意圖,而圖4A’至圖4C’分別為沿圖4A至圖4C中之剖線B-B’、C-C’、D-D’的剖面示意圖。請參照圖圖4A至圖4C及圖4A’至圖4C’,延伸至週邊區A2的各第一橋接部B1分別與其中一條扇出走線140電性連接,且各扇出走線140分別與其中一個第一接墊134電性連接。在本實施例中,扇出走線140與第一橋接部B1或第一接墊134電性連接的方法例如是直接搭接於第一橋接部B1或第一接墊134之上。換言之,第一橋接部B1與扇出走線140電性連接 的部分區域會位於扇出走線140與黑矩陣120之間(如圖4A’所示)。同理,第一接墊134與扇出走線140電性連接的部分區域會位於扇出走線140與黑矩陣120之間(如圖4C’所示)。4A to 4C are enlarged schematic views of regions B, C, and D in FIG. 4, respectively, and FIGS. 4A' to 4C' are taken along lines B-B' and C-C' in FIGS. 4A to 4C, respectively. Schematic diagram of the D-D'. Referring to FIG. 4A to FIG. 4C and FIG. 4A′ to FIG. 4C′ , each of the first bridging portions B1 extending to the peripheral area A2 is electrically connected to one of the fan-out traces 140 , and each of the fan-out traces 140 respectively A first pad 134 is electrically connected. In this embodiment, the method for electrically connecting the fan-out traces 140 to the first bridge portion B1 or the first pads 134 is directly overlapped on the first bridge portion B1 or the first pads 134, for example. In other words, the first bridge portion B1 is electrically connected to the fanout trace 140. A portion of the area will be located between the fanout trace 140 and the black matrix 120 (as shown in Figure 4A'). Similarly, a portion of the first pad 134 electrically connected to the fanout trace 140 will be located between the fanout trace 140 and the black matrix 120 (as shown in FIG. 4C').
請參照圖5,於基板110上形成絕緣層150,以覆蓋部分的第一感測電極132以及扇出走線140,且絕緣層150曝露出未與第一感測電極132電性連接之扇出走線140的部分區域。此外,絕緣層150的材質例如是無機材料、有機材料或上述之組合,其中無機材料例如是氧化矽、氮化矽、氮氧化矽、矽鋁氧化物或上述至少二種材料的堆疊層。當然,本實施例不以此為限,凡是可以提供絕緣特性的材料都可以選擇性地應用於本實施例以製作絕緣層150。Referring to FIG. 5, an insulating layer 150 is formed on the substrate 110 to cover a portion of the first sensing electrode 132 and the fan-out trace 140, and the insulating layer 150 exposes a fan that is not electrically connected to the first sensing electrode 132. A partial area of line 140. In addition, the material of the insulating layer 150 is, for example, an inorganic material, an organic material, or a combination thereof, wherein the inorganic material is, for example, tantalum oxide, tantalum nitride, lanthanum oxynitride, lanthanum aluminum oxide, or a stacked layer of at least two of the above materials. Of course, the present embodiment is not limited thereto, and any material that can provide insulating properties can be selectively applied to the present embodiment to fabricate the insulating layer 150.
本實施例之絕緣層150包括多個島狀圖案152以及一週邊圖案154,其中各島狀圖案152位於觸控區A1內,而週邊圖案154位於週邊區A2內。具體而言,各島狀圖案152位於各第一感測電極132上,而週邊圖案154覆蓋扇出走線140,且週邊圖案140曝露出未與第一感測電極132電性連接之扇出走線140的部分區域。The insulating layer 150 of the present embodiment includes a plurality of island patterns 152 and a peripheral pattern 154, wherein each of the island patterns 152 is located in the touch area A1, and the peripheral pattern 154 is located in the peripheral area A2. Specifically, the island patterns 152 are located on the first sensing electrodes 132, and the peripheral patterns 154 cover the fan-out traces 140, and the peripheral patterns 140 expose the fan-out traces that are not electrically connected to the first sensing electrodes 132. Part of the 140 area.
圖5A至圖5D分別為圖5中區域A、B、C、D的放大示意圖,而圖5A’至圖5D’分別為沿圖5A至圖5D中之剖線A-A’、B-B’、C-C’、D-D’的剖面示意圖。請參照圖5A及圖5A’,各島狀圖案152分別覆蓋其中一個第一橋接部B1。請參照圖5B及圖5B’,週邊圖案154至少覆蓋扇出走線140與第一橋接部B1連接的區域。在本實施例中, 週邊圖案154例如是足以覆蓋扇出走線140側壁且與第一橋接部B1接觸。請參照圖5C、圖5C’、圖5D、圖5D’,週邊圖案154至少曝露出未與第一橋接部B1搭接之扇出走線140的部分區域以及預留給晶片搭接之第一接墊的部分區域。5A to 5D are enlarged schematic views of regions A, B, C, and D in FIG. 5, respectively, and FIGS. 5A' to 5D' are respectively taken along lines A-A' and B-B in FIGS. 5A to 5D, respectively. Schematic diagram of ', C-C', D-D'. Referring to FIG. 5A and FIG. 5A', each of the island patterns 152 covers one of the first bridge portions B1. Referring to Figures 5B and 5B', the peripheral pattern 154 covers at least the area where the fan-out trace 140 is connected to the first bridge portion B1. In this embodiment, The peripheral pattern 154 is, for example, sufficient to cover the sidewall of the fan-out trace 140 and is in contact with the first bridge portion B1. Referring to FIG. 5C, FIG. 5C', FIG. 5D, FIG. 5D', the peripheral pattern 154 exposes at least a portion of the fan-out trace 140 that is not overlapped with the first bridge portion B1 and the first interface reserved for the wafer overlap. Part of the pad.
請參照圖6,於基板110上形成第二導電層160。第二導電層160包括多個第二感測電極162以及多個第二接墊164。各第二接墊164例如是分別覆蓋各第一接墊134,而各第二感測電極162例如是沿第一方向X排列且沿第二方向Y由觸控區A1延伸至週邊區A2。此外,第二導電層160的材質以透明導電材質為佳。透明導電材質例如是金屬氧化物,如銦錫氧化物、銦鋅氧化物、鋁錫氧化物、鋁鋅氧化物、銦鍺鋅氧化物、或其它合適的氧化物、或者是上述至少二者之堆疊層。Referring to FIG. 6, a second conductive layer 160 is formed on the substrate 110. The second conductive layer 160 includes a plurality of second sensing electrodes 162 and a plurality of second pads 164. Each of the second pads 164 covers, for example, each of the first pads 134, and each of the second sensing electrodes 162 is, for example, arranged in the first direction X and extends from the touch area A1 to the peripheral area A2 in the second direction Y. In addition, the material of the second conductive layer 160 is preferably a transparent conductive material. The transparent conductive material is, for example, a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable oxide, or at least two of the above Stack layers.
本實施例之第二感測電極162與各第一感測電極132交錯且彼此電性絕緣。在本實施例中,各第一感測電極132與各第二感測電極162電性絕緣的方法例如是藉由島狀圖案152位於各第一感測電極132與第二感測電極162的交錯處,達到兩者電性絕緣的效果。此外,前述未與第一感測電極132電性連接之各扇出走線140分別與其中一個第二感測電極162電性連接。在形成第二導電層160後,本實施例之觸控面板100即初步完成。當然,為避免觸控面板100之元件受到外在環境以及人為因素的影響而造成其損傷,可再額外配置其他保護裝置(如蓋板)。The second sensing electrode 162 of the embodiment is interleaved with each of the first sensing electrodes 132 and electrically insulated from each other. In this embodiment, the first sensing electrodes 132 are electrically insulated from the second sensing electrodes 162 , for example, by the island patterns 152 located at the first sensing electrodes 132 and the second sensing electrodes 162 . Interlaced to achieve the effect of electrical insulation between the two. In addition, each of the fan-out wires 140 that are not electrically connected to the first sensing electrode 132 are electrically connected to one of the second sensing electrodes 162 respectively. After the second conductive layer 160 is formed, the touch panel 100 of the present embodiment is initially completed. Of course, in order to prevent the components of the touch panel 100 from being damaged by the external environment and human factors, other protection devices (such as a cover) may be additionally disposed.
圖6A及圖6C分別為圖6中區域A、C、D的放大示意圖,而圖6A’及圖6C’分別為沿圖6A及圖6C中之剖線A-A’、C-C’、D-D’的剖面示意圖。請參照圖6A及圖6A’,本實施例之第二感測電極162包括多個第二感測墊P2以及多個第二橋接部B2,其中各第二橋接部B2連接相鄰兩個第二感測墊P2。此外,各第一橋接部B1分別與各第二橋接部B2交錯,且各島狀圖案152分別位於各第一橋接部B1與各第二橋接部B2的交錯處。請參照圖6B及圖6B’,未與第一橋接部B1電性連接之各扇出走線140分別與延伸至週邊區A2的其中一個第二橋接部B2電性連接,且週邊圖案154至少曝露出該些第二橋接部B2。換言之,本實施例之第二橋接部B2可覆蓋週邊圖案154所曝露之各扇出走線140,而第二橋接部B2的側壁可不與週邊圖案154的側壁連接,但本發明不以此為限。在其他實施例中,第二橋接部B2的側壁可實質上與週邊圖案154的側壁連接。請參照圖6C及圖6C’,覆蓋第一接墊134的多個第二接墊164例如是具有與第一接墊134實質上相同的輪廓。此外,第二接墊164的面積例如是大於第一接墊134的面積,但本發明不以此為限。在其他實施例中,第二接墊164的面積亦可以與第一接墊134的面積實質上相同。6A and 6C are enlarged views of the regions A, C, and D in FIG. 6, respectively, and FIGS. 6A' and 6C' are taken along the line A-A', C-C' in FIG. 6A and FIG. 6C, respectively. Schematic diagram of the D-D'. Referring to FIG. 6A and FIG. 6A ′, the second sensing electrode 162 of the embodiment includes a plurality of second sensing pads P2 and a plurality of second bridge portions B2 , wherein each second bridge portion B2 is connected to two adjacent nodes. Two sensing pads P2. Further, each of the first bridge portions B1 is interlaced with each of the second bridge portions B2, and each of the island patterns 152 is located at an intersection of each of the first bridge portions B1 and each of the second bridge portions B2. Referring to FIG. 6B and FIG. 6B′, each fan-out trace 140 that is not electrically connected to the first bridge portion B1 is electrically connected to one of the second bridge portions B2 extending to the peripheral region A2, and the peripheral pattern 154 is exposed at least. The second bridges B2 are formed. In other words, the second bridging portion B2 of the embodiment may cover the fan-out traces 140 exposed by the peripheral pattern 154, and the sidewalls of the second bridging portion B2 may not be connected to the sidewalls of the peripheral pattern 154, but the invention is not limited thereto. . In other embodiments, the sidewalls of the second bridge B2 can be substantially connected to the sidewalls of the perimeter pattern 154. Referring to FIGS. 6C and 6C', the plurality of second pads 164 covering the first pads 134 have, for example, substantially the same contour as the first pads 134. In addition, the area of the second pad 164 is greater than the area of the first pad 134, for example, but the invention is not limited thereto. In other embodiments, the area of the second pad 164 may also be substantially the same as the area of the first pad 134.
相較於習知技術需以兩道光罩製程分別製作觸控區內以及周邊區之絕緣層,造成製程的材料以及時間上的浪費,本實施例可將位於週邊區以及觸控區的絕緣層整合於一道光罩製程,藉此縮減於製作觸控面板100時絕緣層150 所需的光罩數量,因而降低觸控面板100於製程的材料以及時間上的浪費。此外,本實施例利用在週邊區A2形成第一接墊134與第二接墊16彼此重疊的接墊區,提供較為平整且適於與晶片之接腳接合處(參照圖6C或是圖6C’中之箭頭10指向的區域)。如此,當觸控面板與晶片接合(bonding)時,接墊區可承受較大的接合壓力,進而可提升接合製程的良率、晶片之接腳的信賴性以及觸控面板之觸控品質。Compared with the prior art, the insulating layer in the touch area and the peripheral area is separately formed by two mask processes, which causes waste of materials and time in the process. In this embodiment, the insulating layer located in the peripheral area and the touch area can be disposed. Integrated into a mask process, thereby reducing the insulating layer 150 when the touch panel 100 is fabricated The number of masks required, thus reducing the material and time waste of the touch panel 100 in the process. In addition, in this embodiment, a pad region in which the first pad 134 and the second pad 16 are overlapped with each other is formed in the peripheral region A2 to provide a flat and suitable pin joint with the wafer (refer to FIG. 6C or FIG. 6C). 'The area pointed by arrow 10'. In this way, when the touch panel and the wafer are bonded, the pad region can withstand a large bonding pressure, thereby improving the bonding process yield, the reliability of the chip pins, and the touch quality of the touch panel.
綜上所述,本發明在形成第一導電層後以及在形成第二導電層之前,以一道光罩製程完成位於觸控區內用以使第一感測電極以及第二感測電極電性絕緣之島狀圖案以及用以保護週邊區之扇出走線的週邊圖案。因此,本實施例可縮減製作絕緣層之光罩數量,進而降低製程的材料以及時間。此外,利用在週邊區形成由第一接墊與第二接墊彼此重疊所構成的接墊區,提供較為平整且適於與晶片之接腳接合處。如此,當觸控面板與晶片接合時,接墊區可承受較大的接合壓力,進而可提升接合製程的良率、晶片之接腳的信賴性以及觸控面板之觸控品質。In summary, the present invention is used in a touch mask process to form the first sensing electrode and the second sensing electrode after forming the first conductive layer and before forming the second conductive layer. An island pattern of insulation and a peripheral pattern for protecting the fan-out traces of the peripheral area. Therefore, the embodiment can reduce the number of masks for making the insulating layer, thereby reducing the material and time of the process. In addition, by forming a pad region formed by overlapping the first pad and the second pad in the peripheral region, a relatively flat and suitable pin connection to the wafer is provided. In this way, when the touch panel is bonded to the wafer, the pad region can withstand a large bonding pressure, thereby improving the bonding process yield, the reliability of the chip pins, and the touch quality of the touch panel.
雖然本發明已以實施方式揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.
100‧‧‧觸控面板100‧‧‧ touch panel
110‧‧‧基板110‧‧‧Substrate
120‧‧‧黑矩陣120‧‧‧Black matrix
130‧‧‧第一導電層130‧‧‧First conductive layer
132‧‧‧第一感測電極132‧‧‧First sensing electrode
134‧‧‧第一接墊134‧‧‧first mat
140‧‧‧扇出走線140‧‧‧fan out
150‧‧‧絕緣層150‧‧‧Insulation
152‧‧‧島狀圖案152‧‧‧ island pattern
154‧‧‧週邊圖案154‧‧‧ surrounding patterns
160‧‧‧第二導電層160‧‧‧Second conductive layer
162‧‧‧第二感測電極162‧‧‧Second sensing electrode
164‧‧‧第二接墊164‧‧‧second mat
10‧‧‧箭頭10‧‧‧ arrow
A1‧‧‧觸控區A1‧‧‧ touch area
A2‧‧‧週邊區A2‧‧‧ surrounding area
X‧‧‧第一方向X‧‧‧ first direction
Y‧‧‧第二方向Y‧‧‧second direction
P1‧‧‧第一感測墊P1‧‧‧First sensing pad
P2‧‧‧第二感測墊P2‧‧‧Second sensing pad
B1‧‧‧第一橋接部B1‧‧‧First Bridge
B2‧‧‧第二橋接部B2‧‧‧Second Bridge
A、B、C、D‧‧‧區域A, B, C, D‧‧‧ areas
A-A’、B-B’、C-C’、D-D’‧‧‧剖線A-A’, B-B’, C-C’, D-D’‧‧‧
圖1為本發明一實施例之觸控面板的製作流程圖。FIG. 1 is a flow chart of manufacturing a touch panel according to an embodiment of the invention.
圖2至圖6為本發明一實施例之觸控面板的製作流程的上視示意圖。2 to FIG. 6 are schematic top views of a manufacturing process of a touch panel according to an embodiment of the invention.
圖3A至圖3D分別為圖3中區域A、B、C、D的放大示意圖。3A to 3D are enlarged schematic views of regions A, B, C, and D in Fig. 3, respectively.
圖3A’至圖3D’分別為沿圖3A至圖3D中之剖線A-A’、B-B’、C-C’、D-D’的剖面示意圖。3A' to 3D' are schematic cross-sectional views taken along lines A-A', B-B', C-C', and D-D' in Figs. 3A to 3D, respectively.
圖4A至圖4C分別為圖4中區域B、C、D的放大示意圖。4A to 4C are enlarged schematic views of regions B, C, and D in Fig. 4, respectively.
圖4A’至圖4C’分別為沿圖4A至圖4C中之剖線B-B’、C-C’、D-D’的剖面示意圖。4A' to 4C' are schematic cross-sectional views taken along lines B-B', C-C', and D-D' in Figs. 4A to 4C, respectively.
圖5A至圖5D分別為圖5中區域A、B、C、D的放大示意圖。5A to 5D are enlarged schematic views of regions A, B, C, and D in Fig. 5, respectively.
圖5A’至圖5D’分別為沿圖5A至圖5D中之剖線A-A’、B-B’、C-C’、D-D’的剖面示意圖。5A' to 5D' are schematic cross-sectional views taken along lines A-A', B-B', C-C', and D-D' in Figs. 5A to 5D, respectively.
圖6A及圖6C分別為圖6中區域A、C、D的放大示意圖。6A and 6C are enlarged schematic views of regions A, C, and D in Fig. 6, respectively.
圖6A’及圖6C’分別為沿圖6A及圖6C中之剖線A-A’、C-C’、D-D’的剖面示意圖。6A' and 6C' are schematic cross-sectional views taken along lines A-A', C-C', and D-D' in Figs. 6A and 6C, respectively.
100‧‧‧觸控面板100‧‧‧ touch panel
120‧‧‧黑矩陣120‧‧‧Black matrix
132‧‧‧第一感測電極132‧‧‧First sensing electrode
140‧‧‧扇出走線140‧‧‧fan out
152‧‧‧島狀圖案152‧‧‧ island pattern
154‧‧‧週邊圖案154‧‧‧ surrounding patterns
160‧‧‧第二導電層160‧‧‧Second conductive layer
162‧‧‧第二感測電極162‧‧‧Second sensing electrode
164‧‧‧第二接墊164‧‧‧second mat
A1‧‧‧觸控區A1‧‧‧ touch area
A2‧‧‧週邊區A2‧‧‧ surrounding area
X‧‧‧第一方向X‧‧‧ first direction
Y‧‧‧第二方向Y‧‧‧second direction
A、B、C、D‧‧‧區域A, B, C, D‧‧‧ areas
Claims (20)
Priority Applications (1)
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TW101124438A TWI478256B (en) | 2012-07-06 | 2012-07-06 | Touch panel and manufacturing method thereof |
Applications Claiming Priority (1)
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TW101124438A TWI478256B (en) | 2012-07-06 | 2012-07-06 | Touch panel and manufacturing method thereof |
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TWI478256B true TWI478256B (en) | 2015-03-21 |
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KR102694369B1 (en) * | 2016-06-20 | 2024-08-14 | 삼성디스플레이 주식회사 | Electronic device and method of manufacturing of the same |
CN111831167B (en) * | 2019-04-15 | 2024-06-04 | 万达光电科技股份有限公司 | Manufacturing method of capacitive touch panel and capacitive touch panel |
TWI729493B (en) * | 2019-09-12 | 2021-06-01 | 友達光電股份有限公司 | Pixel array substrate |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWM355426U (en) * | 2008-11-18 | 2009-04-21 | Emerging Display Tech Corp | Capacitance touch panel |
JP2010231533A (en) * | 2009-03-27 | 2010-10-14 | Citizen Electronics Co Ltd | Transparent electrode substrate and touch panel provided therewith |
TW201115209A (en) * | 2009-10-19 | 2011-05-01 | Au Optronics Corp | Touch substrate and touch display panel |
TW201128504A (en) * | 2010-02-03 | 2011-08-16 | Wintek Corp | Capacitive touch sensor and its fabrication method and capacitive touch panel |
US20110199320A1 (en) * | 2010-02-18 | 2011-08-18 | Samsung Mobile Display Co., Ltd. | Touch screen panel and manufacturing method thereof |
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWM355426U (en) * | 2008-11-18 | 2009-04-21 | Emerging Display Tech Corp | Capacitance touch panel |
JP2010231533A (en) * | 2009-03-27 | 2010-10-14 | Citizen Electronics Co Ltd | Transparent electrode substrate and touch panel provided therewith |
TW201115209A (en) * | 2009-10-19 | 2011-05-01 | Au Optronics Corp | Touch substrate and touch display panel |
TW201128504A (en) * | 2010-02-03 | 2011-08-16 | Wintek Corp | Capacitive touch sensor and its fabrication method and capacitive touch panel |
US20110199320A1 (en) * | 2010-02-18 | 2011-08-18 | Samsung Mobile Display Co., Ltd. | Touch screen panel and manufacturing method thereof |
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