TWI450261B - Lcd panel with the dual gate structure and the driving method of the same - Google Patents

Description

Double gate liquid crystal display panel driving structure and driving method

The present invention relates to a driving structure and a driving method of a double gate liquid crystal display panel, in particular to a driving structure and a driving method for a double gate liquid crystal display panel of a single point plus double dot inversion mode of a pixel array.

Liquid crystal display (LCD) has the advantages of low radiation, small size and low energy consumption. It has gradually replaced traditional cathode ray tube (CRT) displays, and is widely used in notebook computers, personal digital assistants (PDAs), and flat-panel televisions. , or information products such as mobile phones. How to improve display quality and reduce production costs has gradually become a major issue in the development of liquid crystal displays.

The pixel structure of the liquid crystal display panel can be mainly divided into a single gate (Single Gate) pixel structure and a dual gate (Dual Gate) pixel structure according to different driving modes. At the same resolution, compared to the single-gate pixel structure, the number of scan lines of a liquid crystal display panel using a double-gate pixel structure is doubled, and the number of data lines is reduced to one-half. Therefore, a liquid crystal display panel using a dual gate pixel structure uses more gate drive wafers and fewer source drive wafers. Since the cost and power consumption of the gate driving chip are lower than that of the source driving chip, the double gate pixel structure design can greatly reduce the production cost and power consumption.

A schematic diagram of the structure of the driving circuit of a general double-gate liquid crystal display device is referred to FIG. Show. The dual gate liquid crystal display device includes a source driving circuit 200, a timing controller 210, a gate driving circuit 220, and a liquid crystal display panel 300. The liquid crystal display panel 300 includes a scanning line unit G disposed in a horizontal direction and parallel to each other, a data line D′ and a pixel array P disposed in a vertical direction and parallel to each other, wherein the data line D′ has a total of m strips. The mth data line D' is D'm, and the scan line unit G has n, so the nth scan line unit G is Gn, and each scan line unit Gn includes a first scan line Gon and a second The scan line Gsn, the pixel array P contains a plurality of pixels Px. In the above, the source driving circuit 200 can generate the data signal SD', wherein the gate driving circuit 220 can generate the scan signal SG, and the timing controller 210 can generate the driving source driving circuit 200 and the gate driving The control signals required by the circuit 220, such as the latch pulse signal TP and the image data signal DATA, etc. The gate driving circuit 220 can sequentially output the scan signal SG to the scan line unit G according to the received latch pulse signal TP, and the source drive circuit 200 can respectively output the corresponding image according to the received image data signal DATA. Data signal SD' like grayscale value to data line D'. Therefore, under the operation of the circuit as described above, the liquid crystal display panel 300 can control the image display of each pixel Px based on the input material signal SD', thereby displaying the image on the liquid crystal display panel 300. In the liquid crystal display panel 300, each pixel Px in the pixel array P has a thin film transistor (TFT) 512 as a switch.

In a liquid crystal display panel, each pixel itself must be driven in a polarity inversion manner, but in the case of a pixel array, adjacent pixels in the array do not have to be driven with the same polarity. The pixel array polarity inversion methods used now include frame inversion, column inversion, column inversion, and dot inversion. The conventional single-point inversion method means that each pixel in each frame has the opposite polarity of the voltage of the pixels around it, and the two-point inversion method refers to inverting the pixel in a vertical direction. Its voltage polarity reverses its voltage polarity in units of two pixels along the horizontal direction. For example, in patent The double dot inversion method is mentioned in US20080068516A1. The liquid crystal display panel in Fig. 1 adopts a single point plus two-point polarity inversion method. Specifically, as shown in FIG. 1, the polarities of the pixels Px connected to the odd-numbered scanning line units G1, G3, G5, . . . are [+--++--...+], and even-numbered scanning lines. The polarities of the pixels Px connected by the units G2, G4, G6, ... are [-++--++...-] in order. The single-point plus double-dot inversion method is combined with the double-gate pixel structure to make the pixel Px connected to the left and right sides of the same data line D' have different voltage polarities in the same frame, thereby causing a picture The problem of uneven display is displayed, which leads to unsatisfactory picture quality.

Please refer to FIG. 2 at the same time. FIG. 2 is a waveform diagram of the scan line turn-on sequence and the data line output signal in the prior art. The inversion period t is defined as the time sum of the positive signal and the negative signal outputted by the data line D', and each inversion period t includes a first time period t1 and a second time period t2. For the prior art in FIG. 1 and FIG. 2, when the first scan line Go1 in the first scan line unit G1 is turned on, the time at which each data line D' outputs the data signal is referred to as an initial first time period. T1'; when the second scan line Gs1 in the first scan line unit G1 and the first scan line Go2 in the second scan line unit G2 turn on the scan, the data line D' outputs the data signal for the second time period T2, which is twice the initial first time period t1'; when the second scan line Gs2 in the second scan line unit G2 and the first scan line Go3 in the third scan line unit G3 turn on the scan, the data line The time at which D' outputs the data signal is the first time period t1, which is also twice the initial first time period t1'; and so on, all subsequent time periods [t2-t1-t2...] are initial Two times a period of time t1'. Therefore, the data signal outputted by the initial first time period t1' and the data signal outputted by the subsequent time period [t2-t1-t2...] may be asymmetrical, so that the picture display quality is not ideal. At the same time, under the requirement of panel cost, taking into account the power consumption factor, based on the pixel single point plus double point inversion structure described above, the pixel poles connected to the left and right sides of the same data line are made. The opposite is true, so the positive and negative inversion frequency of the data line output signal is large, which cannot achieve the purpose of more power saving. In addition, in the patent US Pat. No. 6,750,835 B2, the use of the scanning line to select the driving mode for the purpose of power saving is mentioned. However, in the above-mentioned prior art structure, the power saving by the scanning line is limited.

In order to solve the above problems, the present invention provides a dual gate liquid crystal display panel, the structure comprising a plurality of scan line units, a plurality of data lines and a pixel array. The scan line unit includes a first scan line and a second scan line. The data line and the scan line unit are perpendicular to each other. The pixel array includes a first pixel unit, a second pixel unit, and a third pixel unit, wherein the first pixel unit and the third pixel unit each include a row of pixels and are electrically connected to a data line, and second The pixel unit includes a plurality of rows of pixels and is electrically connected to the same data line by two rows of pixels.

In an embodiment of the present invention, the first pixel unit is a first row of pixels, the second pixel unit is a second row to a penultimate row of pixels, and the third pixel unit is a first row of pixels. Specifically, the first data line is electrically connected to a first pixel unit, and the first data line is electrically connected to a third pixel unit, and the second data line is connected to the second data line. Each of the left and right sides of each data line is electrically connected to a second pixel unit. At the same time, the polarity of the first row and the second row of pixels are opposite, and the first row of the last line is opposite to the polarity of the pixel of the second to last row to achieve the effect of single point inversion of the first pixel unit and the third pixel unit. Located in the second data line to the second last data line, the left and right pixels on both sides of each data line have the same polarity to achieve the effect of double-point inversion of the second pixel unit.

At the same time, the driving method based on the structure of the double gate liquid crystal display panel is as follows: firstly, an odd number of scanning line units are sequentially turned on, and at the same time, a data signal is outputted through the data line to the drawing. The output signal of the odd data lines is positive, and the output signals of the even data lines are negative; then the even scan lines are turned on, and the data signals are output to the pixels through the data lines, wherein the odd data lines are output. The signal is negative polarity, and the even data line output signals are positive polarity; so that the first pixel unit and the third pixel unit are single-point inversion, and the second pixel unit is double-point inversion.

In one embodiment of the present invention, the odd-numbered scan line units constitute a plurality of scan line groups, and the even-numbered scan line units constitute a plurality of scan line groups, and then are loop-turned in the order of the scan line groups. At the same time, the time sum of the positive signal and the negative signal input once for the data line is defined as a reverse period, and the inversion period includes a first time period and a second time period, and the odd data lines are output in the first time period. Positive polarity, even data line output negative polarity, in the second time period, odd data lines output negative polarity, even data lines output positive polarity.

In one embodiment of the present invention, each of the odd-numbered scan line units is a set of scan line groups, and each of the two even-numbered scan line units is a set of scan line groups.

In another embodiment of the present invention, each of the three odd-numbered scan line units is a set of scan line groups, and each of the three even-numbered scan line units is a set of scan line groups.

In combination with the liquid crystal display panel structure and the driving method thereof, the present invention solves the asymmetry of the data signals outputted by the data lines in the liquid crystal display panel due to the initial first time period and the subsequent time period, and the left and right sides of each data line. The problem of poor display of the picture caused by the polarity of the connected pixels of the electrical connection, and simultaneously changing the scanning line opening order by dividing the odd-numbered scanning line unit and the even-numbered scanning line unit in all the scanning line units into a plurality of scanning line groups Reduce the inversion frequency of the data line output signal to achieve more power saving.

200‧‧‧Source drive circuit

210‧‧‧ Timing Controller

210‧‧‧ gate drive circuit

100, 300‧‧‧ LCD panel

512‧‧‧film transistor

G, G1~Gn‧‧‧ scan line unit

Go1~Gon‧‧‧ first scan line

Gs1~Gsn‧‧‧Second scan line

S1, S2, S3...‧‧‧ scan line group

D’, D, D’1~D’m, D1~Dm+1‧‧‧ data lines

P‧‧‧ pixel array

Px‧‧‧ pixels

110‧‧‧ first pixel unit

120‧‧‧Second pixel unit

121‧‧‧ odd line pixels in the second pixel unit 120

122‧‧‧ even line pixels in the second pixel unit 120

130‧‧‧ Third pixel unit

Fig. 1 is a schematic view showing the driving structure of a double gate liquid crystal display device in the prior art.

Fig. 2 is a waveform diagram of the scanning sequence of the scanning line and the output signal of the data line in Fig. 1.

Fig. 3 is a schematic view showing the driving structure of a double gate liquid crystal display device in the present case.

Fig. 4 is a view showing the structure of the liquid crystal display panel of Fig. 3.

Fig. 5 is a waveform diagram showing the scanning line opening sequence and the data line output signal in the present case.

Fig. 6 is a waveform diagram showing another scan line turn-on sequence and a data line output signal in the present case.

The present invention will be further described with reference to the accompanying drawings and embodiments in which the same elements are given the same reference numerals.

Please refer to FIG. 3, which is a schematic structural diagram of a driving circuit of a liquid crystal display device with a double gate structure according to the present invention. The dual gate liquid crystal display device includes a source driving circuit 200, a timing controller 210, a gate driving circuit 220, and a liquid crystal display panel 100. The liquid crystal display panel 100 includes a scanning line unit G disposed in a horizontal direction and parallel to each other, a data line D and a pixel array P disposed in a vertical direction and parallel to each other, wherein the data line D in the present case has a total of m+ There is one, so the m+1th data line D is Dm+1, and the scan line unit G has n, so the nth scan line unit G is Gn, and the pixel array P includes a plurality of pixels Px. The pixels Px are disposed in a region formed by the intersection of the scanning line unit G and the parallel data line D, and the pixels Px are electrically connected to the corresponding scanning line unit G and the data line D, respectively. In the above, the source driving circuit 200 can generate a data signal SD, wherein the gate driving circuit 220 can generate a scanning signal. The SG, in turn, the timing controller 210 can generate control signals required to drive the source driving circuit 200 and the gate driving circuit 220, such as the latch pulse signal TP and the image data signal DATA. The gate driving circuit 220 can sequentially output the scan signal SG to the scan line unit G according to the received latch pulse signal TP, and the source drive circuit 200 can respectively output the corresponding image according to the received image data signal DATA. Data signal SD like grayscale value to data line D. Therefore, under the operation of the circuit as described above, the liquid crystal display panel 100 can control the image display of each pixel Px according to the input data signal SD, thereby displaying the image on the liquid crystal display panel 100.

Please refer to FIG. 4 again. FIG. 4 is a schematic structural view of the liquid crystal display panel 100 in FIG. Each of the scan line units Gn includes a first scan line Gon and a second scan line Gsn, that is, the first scan line unit G1 includes a first scan line Go1 and a second scan line Gs1, and the second scan line unit G2 The first scan line Go2 and the second scan line Gs2 are included, and the nth scan line unit Gn includes the first scan line Gon and the second scan line Gsn, and each scan line unit Gn corresponds to the electrically connected pixel. Array P. In addition, the pixel array P is divided into three groups of pixel units, which are a first pixel unit 110, a second pixel unit 120, and a third pixel unit 130. First, the pixel unit 110 is defined to include a first line. The pixel Px is the first row of pixels Px of the pixel array P, and the first pixel Px included in the first pixel unit 110 is electrically connected to the first data line D1, and continues Electrically connected to the first scan lines Go1, Go2, ... Gon in each scan line unit G. Next, the second pixel unit 120 is defined to include the second row of pixels Px to the second to last row (ie, the 2m-1th row) pixel Px (which does not include the first row and the last row of pixels Px), wherein the second pixel The prime unit 120 further includes an odd line pixel 121 and an even line pixel 122. In the above, the odd line pixels 121 in the second pixel unit 120 are electrically connected to the second data line D2 to the mth data line Dm, respectively, and are respectively located on the left side of the data lines D, and Simultaneously electrically connected to the second of each scan line unit G Scanning lines Gs1, Gs2, ..., Gsn; the even number of pixels 122 in the second pixel unit 120 are electrically connected to the second data line D2 to the mth data line Dm, respectively, and are respectively located The right side of the data lines are electrically connected to the first scan lines Go1, Go2, ..., Gon in each of the scan line units G, respectively. Finally, the third pixel unit 130 is defined to include a second m-line pixel Px, which is the last row of pixels Px of the pixel array P, which is electrically connected to the m+1th data line Dm+1, and respectively electrically The second scan lines Gs1, Gs2, ..., Gsn in each of the scan line units G are connected. In other words, in the structure of the liquid crystal display panel 100, the first data line D1 is electrically connected to the first pixel unit 110, that is, the first pixel Px in the pixel array P, m. The +1 data line Dm+1 is electrically connected to the third pixel unit 130, that is, the last row of pixels Px in the pixel array P, and the left side of each data line in the middle data line D2~Dm respectively The odd row pixels 121 of the second pixel unit 120 are electrically connected to each other, and the right side is electrically connected to the even line pixels 122 of the second pixel unit 120, respectively.

As shown in Fig. 4, the following describes the inversion mode of the liquid crystal display device in the present case. The conventional dot inversion method is a single dot inversion method, that is, the pixel polarity of each pixel and its surrounding pixels are opposite. The two-dot inversion method refers to inverting the polarity of the voltage in a single pixel in the vertical direction, and inverting the polarity of the voltage in units of two pixels in the horizontal direction. In the present case, the double gate liquid crystal display panel driving structure is matched with a single point plus double dot inversion method, that is, the polarity of the first row and the second row of pixels Px in the present case is opposite, and the first row of the last line and the second row of pixels are the last (ie, the 2m-1 row) Px has the opposite polarity to reach the first pixel unit 110 electrically connected to the first data line D1 and the third picture electrically connected to the last first data line Dm+1. The unit cell 130 is in a single dot inversion manner, and the left and right pixels Px disposed on the two sides of the data line D2 to the second to last data line Dm have the same polarity to reach the second The pixel unit 120 is double-point inverted. Specifically, as shown in FIG. 4, with the odd scanning line unit G1 The polarity of the pixel Px connected by G3, G5, ... is [+--++--++...+], and the pixel Px connected to the even-numbered scanning line units G2, G4, G6, ... The polarity is [-++--++--...-]. In this way, the above-mentioned driving architecture is matched with the single-point plus double-dot inversion method described above, and the odd-numbered pixels 121 on the left and right sides of the same data line D in the second pixel unit 120 are respectively held in the data lines D2 to Dm and The even-numbered line pixels 122 have the same voltage polarity.

Referring to FIG. 5 again, the inversion period T is first described as the time sum of the positive signal and the negative signal input once for the data line D, and each inversion period T includes a first time period T1 and a second period. Time period T2, where T1 or T2 is a half inversion period T/2. In the first time period T1 shown in the figure, the data signals output by all the odd data lines D1, D3, D5, ... are the same as the first polarity, and all the even data lines D2, D4, D6.. The output data signal is the same as the second polarity; in the second time period T2, all the data signals output by the odd data lines D1, D3, D5... are inverted to the second polarity, and all the even data are The data signals output by the lines D2, D4, D6, . . . are inverted to a first polarity, and the first polarity and the second polarity are two different polarities opposite to each other.

The first embodiment of the present invention will be specifically described below. Please refer to FIG. Two odd-numbered scan line units (for example, the first scan line unit G1 and the third scan line unit G3) are taken as one scan line group, and two even-numbered scan line units are simultaneously (for example, the second scan line) The unit G2 and the fourth scanning line unit G4) function as one scanning line group. As shown in FIG. 5, first, the first scanning line unit G1 and the third scanning line unit G3 are used as the first scanning line group S1; the second scanning line unit G2 and the fourth scanning line unit G4 are used as The second scan line group S2; the fifth scan line unit G5 and the seventh scan line unit G7 are used as the third scan line group S3; and so on, the remaining scan line is single The elements G6, G8, G9, ... Gn are grouped according to the above rules. Then, scanning lines are sequentially turned on in accordance with the order of the scan line groups S1, S2, S3, . Specifically, as shown in the figure, first, the first scan line Go1 in the first scan line unit G1 of the first scan line group S1 is turned on, and each data line D is in the first scan line unit G1. Each pixel Px connected to the first scan line Go1 is charged with a data signal. After the data signal is charged, the first scan line Go1 in the first scan line unit G1 is turned off, and then the first scan line is turned on. The second scan line Gs1 in the cell G1, and each data line D is charged with a data signal for each pixel Px connected to the second scan line Gs1 in the first scan line unit G1, and the data signal is charged. After that, the second scan line Gs1 in the first scan line unit G1 is turned off; then the first scan line Go3 in the third scan line unit G3 in the first scan line group S1 is turned on, and each data is simultaneously The line D charges the pixel Px connected to the first scan line Go3 in the third scan line unit G3, and after the data signal is charged, the first of the third scan line unit G3 is turned off. Scanning line Go3, then turning on the second scan line Gs3 in the third scan line unit G3, and each data line D The pixel Px connected to the second scan line G3 in the third scan line unit G3 is filled with the data signal, and after the data signal is charged, the second scan line Gs3 in the third scan line unit G3 is turned off; Then, the second scan line group S2 and the third scan line group S3 are sequentially turned on, and the subsequent scan line groups S4, S5, S6, ... are successively driven according to the above method, and the corresponding data signals are charged. However, the data signals output by all the odd data lines D1, D3, D5, ... in the first time period T1 in which each odd scan line group S1, S3, S5, ... is turned on are the first polarity, in the figure The positive polarity, and the data signals output by all the even data lines D2, D4, D6, ... are the second polarity, and the second polarity is opposite to the first polarity, which is negative polarity. Further, the data signals output by all the odd data lines D1, D3, D5, ... in the second time period T2 in which each of the even scan line groups S2, S4, S6, ... are turned on are the second pole The data signal output by all the even data lines D2, D4, D6, ... is the first polarity, and the first polarity and the second polarity are two opposite positive and negative polarities. In addition, each first time period T1 is equal to the length of each second time period T2, and is a half inversion period T/2.

In summary, the polarity of the left and right sides of the data line D caused by the asymmetry of the initial first time period t1' and the subsequent time period [t2-t1-t2...] in the second figure is different. The problem of uneven visual display is displayed. The driving method of the present case ensures that the data line D is symmetrical in all time periods [T1-T2-T1-T2...], thereby improving the display visual effect of the liquid crystal panel. Uneven problem. And in combination with the scanning line unit G, the scanning line groups S1, S2, S3, ... are sequentially turned on, so that the inversion frequency 1/T of the data line D output signal is reduced, that is, the two-two scanning line units are divided into two. One group reduces the inversion frequency 1/T of the data line D output signal by one-half, that is, the power consumption on the data line D is saved by half.

According to the above method, the second embodiment of the present invention will be specifically described. Please refer to FIG. 3 and FIG. 6 at the same time. Three odd-numbered scan line units (for example, the first scan line unit G1, the third scan line unit G3, and the fifth scan line unit G5) are taken as one scan line group, and three even-numbered scan line units are simultaneously (For example, the second scanning line unit G2, the fourth scanning line unit G4, and the sixth scanning line unit G6) as one scanning line group. As shown in FIG. 6, first, the first scanning line unit G1, the third scanning line unit G3, and the fifth scanning line unit G5 are used as the first scanning line group S1; the second scanning line unit G2. The fourth scanning line unit G4 and the sixth scanning line unit G6 are the second scanning line group S2; the seventh scanning line unit G7, the ninth scanning line unit G9, and the eleventh scanning line unit G11 are the third Scan line groups S3; and so on, the remaining scan line units G8, G10, ... Gn are grouped according to the above rules. Then follow these The scanning line groups S1, S2, S3, ... are sequentially turned on to scan each scanning line. As shown in the figure, the first scan line Go1 in the first scan line unit G1 of the first scan line group S1 is first turned on, and the first scan in the first scan line unit G1 is performed on each data line D. The pixel Px connected to the line Go1 is filled with the data signal. After the data signal is charged, the first scan line Go1 in the first scan line unit G1 is turned off, and then the first scan line unit G1 is turned on. The second scanning line Gs1, at the same time, each data line D is charged with a data signal for each pixel Px connected to the second scanning line Gs1 in the first scanning line unit G1, and after the data signal is charged, the data is turned off. a second scan line Gs1 in the first scan line unit G1; then turn on the first scan line Go3 in the third scan line unit G3 in the first scan line group S1, and each data line D The pixel Px connected to the first scan line Go3 in the third scan line unit G3 is filled with the data signal, and after the data signal is charged, the first scan line Go3 in the third scan line unit G3 is turned off. Then, the second scan line Gs3 in the third scan line unit G3 is turned on, and each data line D scans the third scan line. The pixel Px connected to the second scan line Gs3 in the unit G3 is charged with the data signal, and after the data signal is charged, the second scan line Gs3 in the third scan line unit G3 is turned off; a first scan line Go5 of the fifth scan line unit G5 of one scan line group S1, and a pixel Px connected to the first scan line Go5 of the fifth scan line unit G5 by each data line D Filling in the data signal, after the data signal is charged, the first scan line Go5 in the fifth scan line unit G5 is turned off, and then the second scan line Gs5 in the fifth scan line unit G5 is turned on, and each The data line D is charged with the data signal of the pixel Px connected to the second scan line Gs5 of the fifth scanning line unit G5. After the data signal is charged, the fifth of the fifth scanning line unit G5 is turned off. Second scan line Gs5; secondly, the second scan line group S2 and the third scan line group S3 are sequentially turned on, and the subsequent scan line groups S4, S5, S6, ... are successively driven according to the above method, and are charged accordingly. Data signal. Of course The data signals output by all the odd data lines D1, D3, D5... in the first time period T1 in which each odd scanning line group S1, S3, S5... is turned on are the first polarity, and the positive electrode in the figure is The data signal output by all the even data lines D2, D4, D6, ... is the second polarity, and the second polarity is opposite to the first polarity, which is negative polarity. The data signals output by all the odd data lines D1, D3, D5, ... in the second time period T2 in which each of the even scan line groups S2, S4, S6, ... is turned on are the second polarity, and all The data signals output by the even data lines D2, D4, D6, ... are the first polarity, and the first polarity and the second polarity are two opposite positive and negative polarities. In addition, each first time period T1 is equal to the length of each second time period T2, and is a half inversion period T/2.

In summary, the initial first time period t1' of the second picture of the previous case is asymmetrical with the subsequent time period [t2-t1-t2...], causing uneven display visual effects, and the driving method of the present case It is ensured that the data line D is symmetrical over all time periods [T1-T2-T1-T2...], thereby improving the display visual unevenness problem of the liquid crystal panel. And the scanning line unit Gn is grouped and then the scanning line groups S1, S2, S3, ... are sequentially turned on, so that the inversion frequency 1/T of the data line D output signal is reduced, that is, the three scanning line units are divided into three. One group makes the inversion frequency 1/T of the data line D output signal lower by one third, that is, the power consumption on the data line D is saved by two-thirds.

The driving structure is improved with the single-point plus double-dot inversion method to improve the polarity of the voltage stored in the pixel Px connected to the left and right sides of the intermediate data line D, and each of the first time period T1 and each second time The equalization of the segment T2 improves the problem that the output signal of the data line is asymmetrical with the subsequent time period [t2-t1-t2...] in the initial first time period t1', thus improving the display quality. At the same time, the odd-numbered scanning line units G1, G3, G5, ... and the even-numbered scanning line units G2, G4, G6, ... in the scanning line unit G are divided. After the group is scanned as a plurality of scan line groups S1, S2, S3, ..., and sequentially in the order of the scan line groups S1, S2, S3, ..., the inversion frequency of the data line D can be reduced. /T, to achieve more power saving purposes.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the scope of the present invention. Anyone skilled in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope defined by the scope of the claims shall prevail.

D1~Dm+1‧‧‧ data line

G1~Gn‧‧‧ scan line unit

110‧‧‧ first pixel unit

120‧‧‧Second pixel unit

130‧‧‧ Third pixel unit

Claims (13)

A driving structure of a dual-gate liquid crystal display panel is improved in that it comprises a plurality of scanning line units, each of which includes a first scanning line and a second scanning line, wherein the odd-numbered scanning line units are The scanning line group is composed of two or three odd-numbered scanning line units as a group of scanning line groups, and the even-numbered scanning line units are composed of a plurality of scanning line groups, and each two or three even-numbered scanning lines The unit is a set of scan line groups, and the scan unit of the odd strip is opened before the scan line unit of the even strip; a plurality of parallel data lines are perpendicular to the scan line units; a pixel array comprising three a pixel unit, which is a first pixel unit, a second pixel unit, and a third pixel unit, wherein the first pixel unit and the third pixel unit each include a line of pixels, and the second pixel unit includes multiple lines A pixel; wherein the first pixel unit and the third pixel unit are electrically connected to one data line, and the pixels in the second pixel unit are electrically connected to the same data line. The driving structure of the double gate liquid crystal display panel according to claim 1, wherein the first pixel unit is a first line of pixels, and the second pixel unit is a second line to a second to last line pixel. The third pixel unit is the last row of pixels. The driving structure of the double-gate liquid crystal display panel according to claim 2, wherein the first data line is electrically connected to a row of the first pixel unit, and the first data line of the last number is electrically connected to the third row. a pixel unit, and electrically connecting a row of the second pixel unit to each of the left and right sides of each of the second data line to the second to last data line. The driving structure of the double-gate liquid crystal display panel according to claim 3, wherein the first row and the second row of pixels have opposite polarities, and the first row of the last row is opposite to the polarity of the second-to-last row of pixels to achieve The effect of the single pixel inversion of the first pixel unit and the third pixel unit. The driving structure of the double-gate liquid crystal display panel according to claim 3, wherein the second data line to the second-to-last data data line are disposed on the left and right pixels on both sides of each data line. The polarity is the same to achieve the effect of double-point inversion of the second pixel unit. A driving method for a dual-gate liquid crystal display panel according to claim 1, wherein the method further comprises: firstly turning on odd-numbered scanning line units, and simultaneously charging a data signal to the pixel through the data line, wherein the odd-numbered strips The data line input signal is positive polarity, and the even number of data line input signals are negative polarity, wherein the odd-numbered scan line unit is composed of a plurality of scan line groups, and the scan line group is every two odd-numbered scan line units a group; then successively turn on even-numbered scanning line units, and simultaneously charge the data signal to the pixel through the data line, wherein the odd-numbered data line input signals are negative polarity, and the even-numbered data lines input signals are positive polarity; The first pixel unit and the third pixel unit are inverted in a single point, and the second pixel unit is double-point inversion. The driving method of the double-gate liquid crystal display panel according to claim 6, wherein the scan line group is replaced by a group of scan line units of every three odd-numbered strips. The driving method of the double gate liquid crystal display panel according to claim 6, wherein the even number of scanning line units are constituted by a plurality of scanning line groups. The driving method of the double gate liquid crystal display panel according to claim 8, wherein the scan line group is a group of two even-numbered scan line units. The driving method of the double-gate liquid crystal display panel according to claim 8, wherein the scan line group is a group of every three even-numbered scan line units. The driving method of the double gate liquid crystal display panel according to claim 6 or 8, wherein a plurality of scanning line groups of the odd-numbered scanning line units and a plurality of scanning line groups of the even-numbered scanning line units are turned on . The driving method of the double gate liquid crystal display panel according to claim 6, wherein the data lines are each The time sum of inputting the positive signal and the negative signal once is an inversion period, and the inversion period includes a first period of time and a second period of time. The driving method of the double gate liquid crystal display panel according to claim 12, wherein, in the first period of the inversion period, the odd data lines output positive polarity, and the even data lines output negative polarity; In the second period of the inversion period, the odd data lines output negative polarity, and the even data lines output positive polarity.