TWI395307B - Semiconductor element module and manufacturing method thereof - Google Patents

Description

Semiconductor component module and method of manufacturing same

The present invention relates to a semiconductor element module and a method of manufacturing the same, and is applicable to, for example, a semiconductor element such as a power transistor having a large output.

Insulated Gate Bipolar Transistor (hereinafter referred to as IGBT), etc., a power semiconductor element having a large output and a large amount of heat is required to ensure the reliability, life, and the like of the function, and must be cooled. In recent years, the use of motors for electric vehicles has increased, and applications have been demanded to increase output while improving reliability and life.

Patent Document 1: Japanese Patent Publication No. 6-188363

Patent Document 2: International Publication No. 98/43301

As a module structure of a power semiconductor element, for example, an element is directly or indirectly mounted on a metal substrate having excellent heat dissipation properties, and a wire bond is formed by wire bonding. In the case of this structure, there is a problem that the upper side of the element is opened, and there is a problem that sufficient cooling ability cannot be obtained. In addition, the method of forming the wire with the external terminal by the wire bonding method is complicated and difficult, and there are also problems of a large number of engineering and a large process cost (Patent Document 1).

In addition, a metal substrate with excellent heat dissipation is sandwiched between power semiconductors. A module structure that can dissipate heat from the upper and lower sides, but in the case of the structure, in order to alleviate the stress accompanying heat generation, the metal substrate (external terminal) and the component are not joined, but are crimped. Contact, 俾 forming an electrical connection, and thus electrical connection with the component is insufficient, it is difficult to apply to the component of the large output, and is thermally connected to the component (here, the components when the different components are joined to each other) The heat conduction state between the two is not sufficient as a thermal connection, and there is a problem that the desired heat dissipation property cannot be obtained (Patent Document 2).

In addition, in the above-mentioned module structure, the limits of heat resistance, thermal cycle resistance, and vibration resistance of solder or thin wires for wiring, resin for encapsulation, etc., are the limits of the reliability of the entire module, and cannot be satisfied. The heat resistance, thermal cycle resistance, and vibration resistance required for automobiles and the like cannot ensure sufficient reliability. For example, even if the components inside the module are alive, the wiring may be damaged, and the function as a whole module may be impaired, thereby reducing reliability and life.

Further, in the above-described module structure or the like, when the substrate and the element are to be bonded, or the bonding substrate and the heat sink are to be bonded together, there is a problem in that heat dissipation and reliability are achieved. For example, when an adhesive is used for bonding, there is a problem that the thermal conductivity is slightly inferior, and there is a problem that the number of engineering is increased. When the bonding is performed using diffusion bonding or anodic bonding, in addition to restrictions on the material of the bonding target, the bonding is caused by With the heating, it takes time to cool, and there is a problem that heat affects the module (thermal stress).

The present invention has been made in view of the above-described problems, and an object of the invention is to provide a semiconductor element module and a method for manufacturing the same that are excellent in electrical connection and thermal connection, and can ensure sufficient cooling performance and high reliability.

In the semiconductor device module according to the first aspect of the invention, at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first one is sealed. In the semiconductor element module of the outer peripheral portion between the insulating substrate and the second insulating substrate, the semiconductor element is a plurality of electrode surfaces having a part of a surface formed on one side of the semiconductor element, and the first insulating substrate And a first wiring surface formed on one surface of the first insulating substrate corresponding to the electrode surface of the semiconductor element, and the normal electrode is connected to the electrode surface of the semiconductor element and the first wiring surface The surface of one side of the semiconductor element is bonded to the first insulating substrate, and the other surface of the semiconductor element is bonded to the second insulating substrate by a normal temperature bonding method, and the semiconductor element is mounted on the first semiconductor substrate. 1 an insulating substrate and the second insulating substrate.

In order to solve the above-described problem, the semiconductor element module of the second aspect of the invention is characterized in that at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first one is sealed. A semiconductor element module having an outer peripheral portion between the insulating substrate and the second insulating substrate, wherein the semiconductor element has a plurality of electrode faces formed on a part of both surfaces of the semiconductor device, and the first insulating substrate is Having a corresponding to the above semiconductor element a first wiring surface formed on one surface of the first insulating substrate, and the second insulating substrate having the electrode surface corresponding to the other side of the semiconductor element. On the second wiring surface on one side of the second insulating substrate, the surface of one side of the semiconductor element is bonded to the first wiring surface of the semiconductor element and the first wiring surface by a normal temperature bonding method. In the first insulating substrate, the surface of the other side of the semiconductor element and the second insulating substrate are bonded to the electrode surface and the second wiring surface on the other side of the semiconductor element by a normal temperature bonding method. The semiconductor element is mounted on the first insulating substrate and the second insulating substrate.

In order to solve the above-described problem, the semiconductor element module of the third aspect of the invention is characterized in that at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first one is sealed. The semiconductor element module of the outer peripheral portion between the insulating substrate and the second insulating substrate is characterized in that the semiconductor element has a plurality of integrated electrode faces formed on one surface of the semiconductor element, and the first insulating layer The substrate is a first wiring surface formed on one surface of the first insulating substrate corresponding to the electrode surface of the semiconductor element, and the electrode surface of the semiconductor element is bonded to the first surface by a normal temperature bonding method. Wiring surface, and bonding the above half at room temperature bonding The surface of the other side of the conductor element and the second insulating substrate are mounted on the first insulating substrate and the second insulating substrate.

In the semiconductor device module according to the fourth aspect of the invention, at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first one is sealed. A semiconductor element module having an outer peripheral portion between the insulating substrate and the second insulating substrate, wherein the semiconductor element has all of the plurality of integrated electrode faces formed on both surfaces of the semiconductor element, and the first insulating substrate a first wiring surface formed on one surface of the first insulating substrate, and the second insulating substrate having another electrode corresponding to the semiconductor element. The electrode surface formed on one side of the second insulating substrate and the electrode surface formed on one side of the semiconductor element and the first wiring surface are joined by a normal temperature bonding method. Bonding the electrode surface on the other side of the semiconductor element and the second wiring surface by a normal temperature bonding method Element attached to the first insulating substrate and the second insulating substrate.

The semiconductor device module according to any one of the first to fourth aspects of the present invention, wherein At least one of the first insulating substrate and the second insulating substrate is connected to the first wiring surface or the second wiring surface, and is connected to the outside, and the connecting wiring penetrates the thickness direction. The first insulating substrate or the second insulating substrate is formed.

The semiconductor element module according to the invention of the present invention, wherein the first insulating substrate or the second insulating substrate is at least one of the first insulating substrate or the second insulating substrate. One of the connection wirings that are connected to the first wiring surface or the second wiring surface and that is connectable to the outside, and the connection wiring is pulled out from the first insulating substrate or the second insulating substrate in the lateral direction. At least one of the surfaces is formed to penetrate the outer peripheral portion between the first insulating substrate and the second insulating substrate in the side surface direction, or the first insulating substrate or the second insulating substrate is pulled in the side surface direction. At least one of the first insulating substrate or the second insulating substrate penetrates in a side surface direction by forming a groove formed in at least one surface.

The semiconductor element module according to the invention of the present invention, wherein the electrode surface, the first wiring surface or the second At least one of the wiring faces is a surface that is formed flat.

The semiconductor element module according to the invention of the present invention, wherein the electrode surface, the first wiring surface, or the second At least one of the wiring faces is made of metal.

In order to solve the above-described problem, the semiconductor element module of the ninth aspect of the invention is characterized in that at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and sealed by The semiconductor element module in which the member seals the outer peripheral portion of the first insulating substrate and the second insulating substrate is characterized in that the semiconductor element has a flat or substantially comprehensive metal flat surface formed on both surfaces of the semiconductor element. In the electrode surface, the first insulating substrate is a metal flat first wiring surface which is formed on one surface of the first insulating substrate in accordance with one electrode surface of the semiconductor element, and the sealing member is It is a first through wiring that is connected to the first wiring surface and that is provided through the sealing member. The second insulating substrate is a metal flat second wiring surface that is formed on one surface of the second insulating substrate, and the second wiring is provided on the other side of the semiconductor element. The second through wiring made of metal and the second through wiring that is connected to the second insulating substrate and the third through wiring that is connected to the second insulating substrate and that is connected to the second insulating substrate are used. Bonding the first insulating substrate and the above-described dense film by a room temperature bonding method In the sealing member, the first wiring surface and the first through wiring are joined, and the electrode surface of the semiconductor element, the first wiring surface, and the second wiring surface are joined by a normal temperature bonding method, and the semiconductor element is mounted on the semiconductor element. The first insulating substrate and the second insulating substrate.

In the semiconductor device module according to the invention of the present invention, the semiconductor device module according to the first aspect of the invention, the first wiring surface, the second wiring surface or At least one surface of the electrode surface of the semiconductor element is provided with a deformable fine plurality of columnar electrodes, and at least one of the first wiring surface or the second wiring surface is joined via the plurality of columnar electrodes by a room temperature bonding method. And an electrode surface of the above semiconductor element.

In the semiconductor element module according to the above aspect of the invention, the semiconductor element module according to the above aspect of the invention, wherein the first wiring surface side of the columnar electrode, the second wiring surface side, or the The shoulder portion of the periphery of at least one joint portion on the electrode surface side of the semiconductor element is formed in a circular shape.

The semiconductor element module according to any one of the invention of the present invention, wherein the first insulating substrate and the second insulating layer are not disposed. In the case of the substrate or the wiring that penetrates the first insulating substrate or the second insulating substrate in the thickness direction, the outer surface of at least one of the first insulating substrate or the second insulating substrate is cooled by a normal temperature bonding method. The semi-guide Cooling means for the body element module.

In the method for manufacturing a semiconductor element module according to the thirteenth aspect of the invention, at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and sealed. A method of manufacturing a semiconductor element module in an outer peripheral portion between the first insulating substrate and the second insulating substrate, wherein a plurality of electrode faces are formed on a surface of one side of the semiconductor element, and the first insulating layer is formed One surface of one side of the substrate is formed with a first wiring surface corresponding to the electrode surface of the semiconductor element, and one side of the semiconductor element is bonded to the electrode surface of the semiconductor element and the first wiring surface by a normal temperature bonding method. And the surface of the other insulating substrate, and the surface of the other side of the semiconductor element and the second insulating substrate are joined by a normal temperature bonding method, and the semiconductor element is mounted on the first insulating substrate and the second substrate Insulating substrate.

In the method for manufacturing a semiconductor element module according to the fourteenth aspect of the invention, at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and sealed. A method of manufacturing a semiconductor element module in an outer peripheral portion between the first insulating substrate and the second insulating substrate, wherein a plurality of electrode faces are formed on a part of both surfaces of the semiconductor element, and the first insulating substrate is formed on the first insulating substrate One side of the side, formed corresponding to the upper side The first wiring surface of the electrode surface on one side of the semiconductor element is formed on one surface of the second insulating substrate, and a second wiring surface corresponding to the electrode surface on the other side of the semiconductor element is formed. The electrode surface on one side of the semiconductor element and the first wiring surface are joined to the first insulating substrate by the normal temperature bonding method on the one surface side of the semiconductor element, and the electrode surface on the other side of the semiconductor element The second wiring surface is bonded to the first insulating substrate and the second insulating substrate by bonding the surface of the other side of the semiconductor element and the second insulating substrate by a normal temperature bonding method.

In the method for manufacturing a semiconductor element module according to the fifteenth aspect of the invention, at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and sealed. In the method of manufacturing a semiconductor element module of the outer peripheral portion between the first insulating substrate and the second insulating substrate, the surface of one side of the semiconductor element is entirely integrated to form a plurality of electrode faces, and the first electrode is formed. a first wiring surface corresponding to the electrode surface on one side of the semiconductor element is formed on one surface of the insulating substrate, and the electrode surface and the first wiring surface of the semiconductor element are bonded by a normal temperature bonding method. The surface of the other side of the semiconductor element and the second insulating substrate are joined by a room temperature bonding method, and the semiconductor element is mounted on the first insulating substrate and the second insulating substrate.

In the method for manufacturing a semiconductor element module according to the sixteenth aspect of the invention, at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and sealed. A method of manufacturing a semiconductor element module in an outer peripheral portion between the first insulating substrate and the second insulating substrate, wherein a plurality of electrode faces are formed on all surfaces of the semiconductor element, and the first insulating layer is formed a first wiring surface corresponding to the electrode surface on one side of the semiconductor element is formed on one surface of the substrate, and the other side of the semiconductor element is formed on one surface of the second insulating substrate. The electrode surface of the electrode surface is joined to the first wiring surface on one side of the semiconductor element by a normal temperature bonding method, and the electrode on the other side of the semiconductor element is bonded by a room temperature bonding method. a surface of the second wiring surface, and the semiconductor element is mounted on the first insulating substrate and the second insulating layer Board.

The method of manufacturing a semiconductor element module according to any one of the aspects of the present invention, wherein the first insulating substrate or the first insulating substrate or At least one of the second insulating substrates is connected to the first wiring surface or the second wiring surface, and is connected to the first insulating substrate or the second insulating substrate in the thickness direction to be connected to the outside.

In order to solve the above-described problem, the semiconductor element module of the eighteenth aspect of the invention The method of manufacturing a semiconductor element module according to any one of the first aspect of the present invention, wherein the method of manufacturing the semiconductor element module is connected to at least one of the first wiring surface or the second wiring surface, and The externally connectable connection wiring is formed by pulling the surface of at least one of the first insulating substrate or the second insulating substrate toward the side surface to form a wiring, and the outer periphery between the first insulating substrate and the second insulating substrate a portion is formed by penetrating the wiring in a side surface direction, or a surface of at least one of the first insulating substrate or the second insulating substrate is pulled in a side surface direction to form a groove, and wiring is formed in the groove, and the first At least one of the insulating substrate or the second insulating substrate is formed to penetrate the wiring in the side surface direction.

In the method of manufacturing a semiconductor element module according to the invention of the present invention, the method of manufacturing the semiconductor device module according to the present invention, wherein the electrode surface is formed flat, At least one surface of the first wiring surface or the second wiring surface.

In the method of manufacturing a semiconductor device module according to the invention of the present invention, the method of manufacturing the semiconductor device module according to the present invention, wherein the electrode surface is made of a metal, At least one of the first wiring surface or the second wiring surface.

In order to solve the above-described problem, in the method of manufacturing a semiconductor element module according to the twenty-first aspect of the invention, at least one or more semiconductor elements are sandwiched between high heat. A method of manufacturing a semiconductor element module in which an outer peripheral portion of the first insulating substrate and the second insulating substrate is sealed by a sealing member between a conductive first insulating substrate and a highly thermally conductive second insulating substrate is characterized in that a flat electrode surface made of metal is formed on the entire surface of the semiconductor element, and a metal surface is formed on one surface of the first insulating substrate, and a metal surface corresponding to one electrode surface of the semiconductor element is formed on one surface of the first insulating substrate. The flat first wiring surface penetrates the sealing member to form a first metal through wiring connected to the first wiring surface, and the other side of the semiconductor element is formed on one surface of the second insulating substrate The metal second flat wiring surface of the electrode surface penetrates the second insulating substrate, and the metal second through wiring connected to the second wiring surface and the second insulating substrate penetrates the second insulating substrate The third through wiring made of metal connected to the first through wiring is joined to the first insulating substrate and the sealing structure by a normal temperature bonding method. And bonding the first wiring surface and the first through wiring, and bonding the electrode surface of the semiconductor element to the first wiring surface and the second wiring surface by a normal temperature bonding method, and mounting the semiconductor element on the first 1 an insulating substrate and the second insulating substrate.

In the method for manufacturing a semiconductor element module according to the twenty-second aspect of the invention, the method according to any one of the items 15 to 21 In the method of manufacturing a conductor element module, at least one surface of the first wiring surface, the second wiring surface, or the electrode surface of the semiconductor element is provided with a deformable fine plural columnar electrode, and a room temperature bonding method is used. At least one of the first wiring surface or the second wiring surface is bonded to the electrode surface of the semiconductor element via the plurality of columnar electrodes.

In the method of manufacturing a semiconductor device module according to the twenty-second aspect of the invention, the method of manufacturing the semiconductor device module according to the above aspect of the invention, wherein the first wiring surface side of the columnar electrode The shoulder portion on the side of the wiring surface or the side of at least one joint portion on the electrode surface side of the semiconductor element is formed in a circular shape.

In the method of manufacturing a semiconductor element module according to the invention of the present invention, the method of manufacturing the semiconductor device module according to the invention of the present invention, wherein the When the insulating substrate and the second insulating substrate or the wiring that penetrates the first insulating substrate or the second insulating substrate in the thickness direction is on the outer surface of at least one of the first insulating substrate or the second insulating substrate The cooling means for cooling the semiconductor element module is joined using a room temperature bonding method.

According to the present invention, the electrode surface is formed on the surface of the semiconductor element, and the wiring surface on the side of the ceramic substrate corresponding to the high thermal conductivity is formed and joined to each other by the normal temperature bonding method, so that the electrical connection can be made electrically. A semiconductor element module having a highly heat-dissipating structure. Again, by room temperature Since the joining method is joined, the joining strength between the joining members becomes the same as that of the watch body, high rigidity can be obtained, and heating is not required in the process, so that thermal stress does not occur, and heat cycle resistance can be improved. Vibration resistance and durability and reliability of the semiconductor component module are also improved. Further, in this configuration, the wiring work is simplified and the mounting work of the semiconductor element is simplified, and the number of parts required can be reduced, so that the process cost of the process can be greatly reduced.

Hereinafter, a semiconductor element module and a method of manufacturing the same according to the present invention will be described with reference to FIGS. 1 to 8.

(Example 1)

Fig. 1 is a structural diagram showing an example of an embodiment of a semiconductor element module of the present invention.

In addition, the semiconductor element module 1 of the present embodiment has a configuration in which the IGBT 2 and the diode 3 are provided as a semiconductor element, but at least one or more semiconductor elements may be provided inside, and in particular, Applicable to semiconductor components with large heat generation.

As shown in Fig. 1, the semiconductor element module 1 of the present embodiment has an IGBT 2 having a flat electrode surface formed on both surfaces, a diode 3, and an electrode surface of the IGBT 2 and the diode 3 The flat wiring circuit layers 4 and 5 (second wiring surface) are formed on one surface of the highly thermally conductive flat ceramic substrate 7 (second insulating substrate) and the IGBT 2 The flat wiring circuit layer 6 (first wiring surface) to which the other electrode surface of the diode 3 is bonded is formed on the highly thermally conductive flat ceramic substrate 8 (first insulating substrate) on one surface, and is sandwiched At the outer edge portion of the ceramic substrates 7, 8, the sealing member 11 used for the inside is sealed, and these members are directly joined by a normal temperature bonding method.

In addition, the room temperature bonding method (also referred to as surface activation bonding method) refers to an inert surface layer which is deficient in an activity such as an oxide or an impurity on the surface of the material by irradiation with an ion beam or the like in a vacuum. The bonding method in which the cleaned atomic surface of the reaction is exposed on the surface of the material and the surface of the material between the atomic surfaces is pressed, even at room temperature, utilizes a phenomenon of strong chemical bonding. According to this room temperature bonding method, it is possible to obtain the same bonding strength as the surface of the material without using an adhesive. Moreover, since it is carried out at normal temperature, there is also an advantage that thermal stress is not left in the joined material. Further, direct bonding techniques such as anodic bonding and diffusion bonding are difficult to bond to an insulating material or to a metal, and it is difficult to obtain a reliable bonding strength.

Here, each constituent member will be described in more detail below.

The IGBT 2 is a structure in which at least one or more transistor structures are formed in advance on a semiconductor substrate. Further, the collector electrode surface 2c of the electrode of the transistor is formed on the surface of one surface of the IGBT 2, and the emitter electrode surface 2e and the gate electrode surface 2g of the electrode of the transistor are formed on the other side. The surface of one side, so that the combined area is preferably about to be comprehensive. Similarly, the diode 3 is also formed in advance on the semiconductor substrate by at least one In the upper diode structure, the electrode surface 3c which is the electrode of the diode is formed on the surface of one surface of the diode 3, and the electrode surface 3e which is the electrode of the diode is formed. The surface on the other side is comprehensive.

The collector electrode surface 2c disposed on the surface of the IGBT 2, the emitter electrode surface 2e, the gate electrode surface 2g, and the electrode surface 3c disposed on the surface of the diode 3, and the electrode surface 3e are formed by the ceramic substrate 7, 8 The bonding method of the room temperature bonding method is such that the surfaces are polished and planarized.

The ceramic substrate 7 is formed on the inner surface thereof at a position corresponding to the emitter electrode surface 2e of the IGBT 2, the gate electrode surface 2g, and the electrode surface 3e of the diode 3, and is formed to correspond to the emitter electrode surface 2e, the gate electrode. The wiring circuit layers 4, 5 of the pattern of the electrode surface 2g and the electrode surface 3e. The wiring circuit layers 4 and 5 are connected to the through wirings 9 and 10 (second through electrodes) provided to penetrate the ceramic substrate 7 in the thickness direction, and the through wirings 9 and 10 serve as electrode terminals for external wiring. Further, the ceramic substrate 8 has a pattern corresponding to the collector electrode surface 2c and the electrode surface 3c at a position corresponding to the collector electrode surface 2c of the IGBT 2 and the electrode surface 3c of the diode 3 on the inner surface thereof. Wiring circuit layer 6. The wiring layer 6 is connected to the through wiring 12 (second and third through electrodes) provided in the ceramic substrate 7 so as to penetrate the sealing member 11 in the thickness direction, and the through wiring 12 serves as an electrode terminal for external wiring.

The wiring circuit layers 4, 5, and 6 disposed on the inner surface of the ceramic substrates 7, 8 are also bonded to the IGBT 2 and the diode 3 at room temperature bonding, and thus the surfaces are polished and planarized. Moreover, the wiring circuit layer 4, 5 and 6 are formed to have a thickness of 10 to 100 μm, and function not only as an electrical function of the wiring but also as a heat conduction member for heat dissipation. Specifically, in the IGBT 2, the heat generation of the diode 3 is conducted to the highly thermally conductive ceramic substrates 7, 8 via the metal wiring circuit layers 4, 5, and 6 excellent in heat conduction, and is radiated to the outside.

Therefore, as the wiring circuit layers 4, 5, and 6, the through electrodes 9, 10, and 12 may be polycrystalline germanium or the like. For the above reasons, the metal is particularly preferably copper having low electrical resistance and excellent thermal conductivity. Further, the ceramic substrates 7, 8 are preferably made of a semiconductor material such as germanium (Si) or a material having a thermal expansion coefficient close to the substrate of the semiconductor element. For example, aluminum nitride (AlN) or the like is preferred. For example, since the thermal expansion coefficient (about 5 × 10 ^-6 /K) of AlN is close to the thermal expansion coefficient of Si (3.5 × 10 ^-6 /K), the heat can be alleviated even when the semiconductor element module is operated at a high temperature. The problem of stress.

Further, since the ceramic substrates 7, 8 and the sealing member 11 are penetrated, the through electrodes 9, 10, and 12 are provided, and the wiring is connected to the wiring circuit layers 4, 5, and 6, so that the wiring distance can be shortened and the module can be reduced. The inductance and the number of capacitors of the control circuit of the semiconductor element can be reduced.

Further, the collector electrode surface 2c of the IGBT 2, the emitter electrode surface 2e, the gate electrode surface 2g, and the electrode surface 3c disposed on the surface of the diode 3, the electrode surface 3e, and the corresponding electrode are bonded by the normal temperature bonding method. The wiring circuit layers 4, 5, and 6 of the electrode faces are attached to the ceramic substrates 7, 8 on the side of the ceramic substrates 7, 8 and are mechanically, electrically, and thermally connected.

Moreover, as shown in Fig. 1, it will become a through-distribution of the external electrode terminal. Each of the wires 9, 10, and 12 is provided on the side of the ceramic substrate 7, and is disposed on one side of all the external electrode terminals, so that the connection to the external wiring is simplified. At this time, as shown in the following third embodiment, it is possible to join the cooling means such as the cooling fins without the penetration of the wirings 9, 10, and 12 on the ceramic substrate 8 side, and the application of the structure for improving the cooling performance of the entire module is improved. easily. In addition, in the case where such a matter is not considered, the through wiring 12 may be provided as in the ceramic substrate 8, and may be connected to the wiring circuit layer 6.

Further, the sealing member 11 is bonded to the outer edge portions of the ceramic substrates 7, 8 and functions as a seal inside the module, and is bonded to the ceramic substrates 7, 8 by a room temperature bonding method. When the IGBT 2 and the diode 3 are sandwiched by the ceramic substrates 7 and 8, the IGBT 2 and the diode 3 are interposed, and the IGBT 2, the diode 3, and the sealing member 11 are formed. The gap (the portion of the symbol 13) is in a vacuum state or a state in which an inert gas such as argon (Ar) is sealed, or in order to keep the IGBT 2, the diode 3, and a resin filled with a polyoxin grease or the like. Agent 13. It is preferable to enclose the filler 13 if cooling (heat dissipation) is also considered.

As described above, the semiconductor element module 1 of the present embodiment is formed on the electrode surface of the IGBT 2 and the both sides of the diode 3 via the normal temperature bonding method via the high thermal conductivity wiring circuit layers 4, 5, and 6. The IGBT 2 is sandwiched between the ceramic substrates 7 and 8 on the ceramic substrates 7 and 8 having high thermal conductivity, and the diodes 3 are mounted in a planar manner.

Therefore, it is not necessary to provide an excessive intermediate layer on the joint surface, and since the joint is firmly bonded by the joint, it is possible to form a joint interface having a small thermal resistance. The heat conductivity between the members can be improved, and high heat dissipation can be obtained. Further, most of the surface of the IGBT 2 and the diode 3 are in close contact with the highly thermally conductive wiring layers 4, 5, and 6 with the thermally conductive ceramic substrates 7, 8 so that the IGBT 2 and the diode 3 can be used. Most of the two surfaces are used as heat transfer surfaces, and can be constructed as a two-sided cooling module to achieve higher heat dissipation.

Further, the solder electrodes or the thin wires are not used, and the electrode faces of the IGBT 2 and the diode 3 are directly bonded to the wiring circuit layers 4, 5, and 6 of the ceramic substrates 7, 8 by the room temperature bonding method, so that the bonding strength can be obtained. The body of the material is as strong as the material, and the vibration resistance of the mounting portion (wiring portion) of the IGBT 2 and the diode 3 can be greatly improved, and the wiring can be maintained at a high temperature to improve the heat resistance. In addition, the engineering can be reduced, and the process cost can be reduced.

As a result, the temperature of the operating temperature of the semiconductor element can be increased, and the in-plane temperature can be made uniform, and in particular, the durability and reliability of the wiring portion for the high-temperature heat cycle can be improved. Further, since heating is not required at the time of bonding, there is no thermal deformation, and thermal stress does not occur, so that the reliability of the semiconductor element module itself can be improved.

Further, since the ceramic substrates 7, 8 are thinner in thickness and the IGBT 2 and the diode 3 are planarly mounted on the ceramic substrates 7, 8, the thickness is greatly reduced when the module is formed into a module. The module itself can be made a streamlined one. For example, when the thickness of the ceramic substrate is 2 mm and the thickness of the semiconductor element is 1 mm, the thickness of the entire module is about 5 mm (= 2 × 2 mm + 1 mm), which can be reduced to about a conventional module. 1/10 thickness.

Further, in the present embodiment, the semiconductor element has a configuration in which electrode faces are provided on both surfaces, and an element having an electrode surface on one side may be used. At this time, a wiring surface corresponding to the electrode surface of the semiconductor element and a through wiring to the external electrode terminal are formed on one of the ceramic substrates. The wiring surface is not formed on the other ceramic substrate, and the ceramic substrate and the semiconductor element may be bonded at room temperature bonding.

Further, in the present embodiment, the electrode faces are polished and planarized and joined, but they may not necessarily be flat. For example, when the semiconductor element is bonded to the planarized ceramic substrate at room temperature bonding, the electrode portion slightly protruding from the bonding surface may be crushed to make the conduction conductive.

Further, in the present embodiment, the electrode surface is formed over the entire surface of the surface of the semiconductor element, or instead, the surface is entirely used as an electrode, and a part of the surface is used as an electrode, or a full or a part of the surface is formed to form a plurality of electrodes. The configuration may be as follows (see the following (9) and (c)). For example, a plurality of gate electrodes and emitter electrodes are formed on one side, and a plurality of sets are formed on the other side. The electrode electrode, or the other side, is fully or approximately fully formed to form an electrode face as a common collector electrode. At this time, the semiconductor element is directly bonded to the ceramic substrate at room temperature by a portion other than the electrode, so that firm bonding and high heat dissipation can be achieved. Moreover, in this case, a wiring surface corresponding to the electrode pattern of the semiconductor element may be formed on the ceramic substrate, and a configuration in which only the through electrode is formed may be formed at a position corresponding to the electrode. Also, it is also possible to crush the semiconductor element or the insulating substrate by crimping. The electrode surface formed by the material and the wiring surface are formed to form a conduction.

Further, in the present embodiment, the configuration in which the through wirings 9, 10, and 12 serving as the external electrode terminals are formed in the thickness direction of the ceramic substrates 7, 8 is replaced by the through wiring as the wiring circuit layers 4, 5, The connection wiring which is connected to the external electrode terminal is connected to the surface of at least one of the ceramic substrates 7 and 8 to form a wiring, and the sealing member 11 which becomes the outer peripheral portion between the ceramic substrates 7 and 8 faces to the side. The direction is formed by passing through the wiring, or the surface of at least one of the ceramic substrates 7, 8 is drawn in the lateral direction to form a groove, and the wiring is formed in the groove, and at least one side of the ceramic substrates 7 and 8 faces the side surface. It may be formed by passing through the wiring.

(Example 2)

Fig. 2 is a structural diagram showing another example of the embodiment of the semiconductor element module of the present invention. The same components as those of the semiconductor element module shown in the first embodiment (first embodiment) are denoted by the same reference numerals, and the description thereof will not be repeated.

As shown in Fig. 2(a), the semiconductor element module 21 of the present embodiment has approximately the same configuration as that of the first embodiment, but corresponds to the collector electrode surface 2c disposed on the surface of the IGBT 2, and the emitter electrode surface 2e. The gate electrode surface 2g and the electrode surface 3c disposed on the surface of the diode 3, and the wiring circuit layers 22, 23, and 24 of the ceramic substrates 7, 8 formed by the electrode surface 3e are different.

The wiring circuit layers 22, 23 (second wiring surface) are matched with the first embodiment. Similarly, the line circuit layers 4 and 5 are formed on the inner surface of the ceramic substrate 7 corresponding to the emitter electrode surface 2e of the IGBT 2, the gate electrode surface 2g, and the electrode surface 3e of the diode 3 as corresponding to the emitter. The pattern of the electrode surface 2e, the gate electrode surface 2g, and the electrode surface 3e is connected to the through wirings 9, 10 provided through the ceramic substrate 7. In addition, similarly to the wiring circuit layer 6 of the first embodiment, the wiring circuit layer 24 (first wiring surface) is provided on the inner surface of the ceramic substrate 8 in accordance with the collector electrode surface 2c and the diode 3 of the IGBT 2. The position of the electrode surface 3c is formed as a pattern corresponding to the collector electrode surface 2c and the electrode surface 3c, and is connected to the through wiring 12 provided in the ceramic substrate 7 through the sealing member 11.

However, in the present embodiment, in order to alleviate the stress at the joint interface due to the difference in the expansion ratio between the diode 3 and the ceramic substrates 7, 8 due to the IGBT 2, as shown in the second (b), the wiring is flat. The circuit layer vertically forms the plurality of groove portions 22a (23a, 24a) having a high aspect ratio, and on the surface side of the wiring circuit layer 22 (23, 24), a plurality of columnar electrodes having a rectangular parallelepiped shape, a polygonal column shape or a columnar shape are formed. 22b (23b, 24b), a junction surface of a square, polygonal or circular dot-shaped wiring circuit layer 22b (23b, 24b) is bonded to the electrode faces of the IGBT 2 and the diode 3 (the IGBT 2 is omitted). Illustration of the electrode face of the diode 3). The columnar electrode 22b (23b, 24b) is a predetermined cross-sectional area in which the tip end is flat, and the length is set to a predetermined length, and electrical connection and thermal connection are ensured in the longitudinal direction, and the direction is perpendicular to the longitudinal direction. [The horizontal direction in the second drawing (b)] is an elastically deformable structure. Therefore, it also functions as a wiring for the IGBT 2 and the diode 3, and also serves as a heat conduction structure for heat dissipation. In the function of the device, when the IGBT 2 is generated by thermal expansion and the diode 3 is displaced, the convex portion 22b (23b, 24b) is elastically deformed without damaging the electrical connection and the thermal connection, and relieving the stress. structure.

Further, as the wiring circuit layer 22 (23, 24), the wiring circuit layer 31 shown in Fig. 3(a) has a truncated quadrangular pyramid shape, and a truncated polygonal pyramid or a cutting head. A structure of a conical shape (a trapezoidal rotating body shape) may be used. In other words, the plurality of groove portions 31a having a high aspect ratio are formed in a flat wiring circuit layer, and a plurality of truncated quadrangular pyramid shapes are formed on the surface of the wiring circuit layer 31, and a truncated polygonal pyramid shape or The conical columnar electrode 31b of the tangent type has a configuration in which the joint surface of the square, polygonal or circular dot-shaped columnar electrode 31b is joined to the electrode faces of the IGBT 2 and the diode 3 (the IGBT 2 is omitted). Illustration of the electrode face of the diode 3). The columnar electrode 31b has a predetermined cross-sectional area in which the tip end thereof is flat, and the length is set to a predetermined length, and electrical connection and thermal connection are ensured in the longitudinal direction, and the direction is perpendicular to the longitudinal direction [third ( a) Horizontal direction in the figure] Structure that is elastically deformable. Therefore, it also functions as a wiring of the IGBT 2 and the diode 3, and also functions as a heat conduction member for heat dissipation, and when the IGBT 2 is generated by thermal expansion and the diode 3 is displaced, the columnar electrode 31b The structure is elastically deformed without damaging the electrical connection or the thermal connection and relieving the stress.

Here, the state at the time of elastic deformation of the wiring circuit layer 31 of the above-described structure will be described.

The IGBT 2 and the diode 3 generate heat at the time of use, and by the heat generation, the substrate itself is thermally expanded to cause a misalignment. In particular, in the case of a large output IGBT 2, the diode 3 has a large offset due to thermal expansion, and in the conventional module structure, it cannot correspond to the offset, which may damage the electrical connection or the thermal connection. It has a great impact on its reliability and life. For example, the size of the semiconductor element is 10 mm square, and the temperature rise due to heat generation is 500 ° C, and the thermal expansion coefficient of Si constituting the substrate of the semiconductor element is approximately 3.5 × 10 ^-6 /K, which constitutes the electrode surface and wiring. The thermal expansion coefficient of Cu in the circuit layer is about 17×10 ^-6 /K, and the thermal expansion coefficient of AlN constituting the ceramic substrate is about 5×10 ^-6 /K, and when the maximum offset amount is to be obtained, it is expected to be in Si. The -AlN interface is about 7.5 μm and is about 65 μm at the Si-Cu interface, which causes a large misalignment in the Si-Cu interface.

On the other hand, in the present embodiment, the substrate of the IGBT 2, the diode 3 is thermally expanded, and even if there is a misalignment due to the thermal expansion, the wiring circuit layer 22, 23, 24, 31 using the above configuration is used. The columnar electrodes 22b, 23b, 24b, and 31b are elastically deformed to correspond to the offset, so that electrical connection or thermal connection is not impaired, and reliability and life can be ensured.

Moreover, it is not limited to the wiring circuit layer 31 shown in Fig. 3(a), and as shown in Fig. 3(b), the plurality of tapered columnar electrodes 32b which are independent via the groove portion 32a are used. As shown in FIG. 3(c), the wiring circuit layer 32 is formed by using a plurality of columnar electrodes 33b and 33c which are independent via the groove portion 33a, and adjacent columnar electrodes 33b. The top side of 33c may be a wiring circuit layer 33 that is different from each other. Further, the top of the tapered columnar electrode 32b of the wiring circuit layer 32 shown in the third (b) diagram may be reversed, and it may be shown in the second (b) The columnar electrodes 22b, 23b, and 24b of the wiring circuit layers 22, 23, and 24 of the figure may be formed as separate columnar electrodes via the grooves 22a, 23a, and 24a.

Further, in the columnar electrode structure shown in Fig. 2(b) and Figs. 3(a) to 3(c), the shoulder portion of the periphery of the joint portion has an approximately right angle or a surface to be joined. The determined tilt angle. For example, in the second (b) diagram, the IGBT 2 of the columnar electrode 22b (23b, 24b) and the shoulder portion of the periphery of the junction portion on the side of the diode 3 are electrodes of the IGBT 2 and the diode 3 to be bonded. Face, become about right angle. In such a configuration, the stress relaxation is also sufficient. However, as illustrated in the second (c) diagram, the shoulder portion of the peripheral portion of the joint portion of the columnar electrode 22b (23b, 24b) is formed into a circular shape having a predetermined curvature. The shape (so-called R shape) can alleviate the stress. In this case, in the columnar electrode 22b (23b, 24b), R may be provided on the shoulder portion of the periphery of the joint portion on the electrode surface side of the diode 3, and the wiring of the ceramic substrate 7, 8 may be provided. R may be provided on the shoulder portion of the periphery of the joint portion on the face side.

The columnar electrode itself is a microfabrication technique such as etching by means of laser or electron beam or a stamping die by molding, as described in the following Example 4, except at the periphery of the joint portion of the columnar electrode. When R is partially formed, in the formation of the columnar electrode or once the columnar electrode is formed, R is formed at the shoulder portion of the periphery of the joint portion of the columnar electrode by the heat of the laser or electron beam, or a columnar electrode is formed. In the meantime, by using the stamp in which the extrusion die of R is formed, R can be formed on the shoulder portion of the periphery of the joint portion of the columnar electrode.

Further, in the present embodiment, the groove portions 22a, 23a, 24a, 31a are In the same manner, the portion of the reference numeral 13 of the first embodiment may be in a vacuum state or a state in which an inert gas is sealed, or a filler such as a resin such as polysulfoxide grease may be enclosed in consideration of improving thermal conductivity.

(Example 3)

Fig. 4 is a structural diagram showing another example of the embodiment of the semiconductor element module of the present invention. Incidentally, the same components as those of the semiconductor element modules shown in the first and second embodiments (first and second) are denoted by the same reference numerals, and the description thereof will not be repeated.

In the semiconductor element module of the present embodiment, the ceramic substrate 8 of the semiconductor element modules 1 and 21 of the first and second embodiments (first and second) is directly bonded to the metal having excellent heat dissipation by the room temperature bonding method. The heat sink 41 (cooling means) is formed.

Specifically, the bonding surfaces of the ceramic substrate 8 and the heat sink 41 of the semiconductor element modules 1 and 21 are activated by physical sputtering such as ion beam irradiation, and are bonded to each other at a normal temperature, and are directly bonded. Further, as the cooling means, for example, a heat sink may be provided, for example, a cooling module for providing a flow path through which a cooling material such as water flows, or a cooling circuit may be previously assembled by forming a flow path or the like on the substrate itself. The construction of the substrate itself is also possible.

As described in the first and second embodiments, in the IGBT 2 disposed inside, the wiring of the diode 3 can be provided by the through wirings 9, 10, 12 provided on one ceramic substrate 7 side. According to the configuration, the ceramic substrate 8 on the other side is a cooling means such as a heat sink 41 that can be joined. Moreover, by the normal temperature bonding method, it is possible to directly bond the ceramic without using an intermediate material. Between the substrate 8 and the heat sink 41, the physical bonding strength is increased and the thermal connection is also increased, and high thermal conductivity between the ceramic substrate 8 and the heat sink 41 can be obtained.

Further, as described above, the bonding process by the room temperature bonding method is performed at a normal temperature, so that the influence of heat on the module is not generated, and thermal stress does not occur. Further, when the dissimilar materials are joined to each other, a strong bond can be made. Moreover, the intermediate material to which the bonding is bonded is required by the bonding material, but in this case, the physical bonding strength is high and the thermal connection is also high, and it can be obtained between the ceramic substrate 8 and the heat sink 41. High thermal conductivity.

In the present embodiment, the heat sink 41 is provided on the outer surface of the ceramic substrate 8 in which the through wiring penetrating in the thickness direction is not disposed, and conversely, when the through wiring is disposed only on the ceramic substrate 8 side, The heat sink 41 may be provided on the outer surface of the ceramic substrate 7 in which the through wiring penetrating in the thickness direction is not disposed. Further, in place of such a through wiring, when the connection wiring drawn in the side surface direction of the ceramic substrates 7 and 8 is provided, the ceramic substrates 7 and 8 do not have the through wiring, and thus the heat sink 41 is mounted on the ceramic substrate 7. Both sides of 8 can also be.

(Example 4)

Hereinafter, a method of manufacturing the semiconductor element modules 1, 21 shown in the first and second embodiments (Fig. 1, 2) will be described with reference to Figs. 5 to 8 . Here, FIG. 5 is an exploded view showing the components constituting the semiconductor element modules 1 and 21 of the first and second embodiments, and the outline of the manufacturing method will be described. In the drawings, FIGS. 6 to 8 are diagrams showing a detailed manufacturing sequence of the manufacturing method. Therefore, each manufacturing process will be described with reference to Fig. 5. In addition, the same components as those of the semiconductor element modules 1 and 21 shown in the first and second embodiments are denoted by the same reference numerals.

(1) Production of each component

The IGBT 2, the diode 3, the ceramic substrate 7, the ceramic substrate 8, and the sealing member 11 are separately prepared in advance.

The IGBT 2 and the diode 3 are formed by a normal semiconductor process, and at least one or more of a transistor structure and a diode structure are formed on a semiconductor substrate, and a transistor structure is formed on both surfaces of the semiconductor substrate. Electrode surface of the diode structure (collector electrode surface 2c, emitter electrode surface 2e, gate electrode surface 2g, electrode surface 3c, electrode surface 3e). The electrode faces are formed to have as large an area as possible, for example, the collector electrode faces 2c, and the electrode faces 3c are formed on one side of one side of the IGBT 2 and the diodes 3, and the electrode faces 3e are formed on the electrodes. The other side of the body 3 is fully integrated. Further, the emitter electrode surface 2e formed on the other side of the IGBT 2 and the gate electrode surface 2g are also formed to have a large area as much as possible while being insulated from each other. These electrode faces have a function of not only ensuring electrical connection but also ensuring thermal connection, and also having heat transfer of the IGBT 2 and the diode 3.

Further, when a part of the surface is used as an electrode or a configuration in which a plurality of electrodes are formed on the entire surface or a part of the surface (see the following 9th (b) and (c)), an electrode corresponding to the semiconductor element is formed on the ceramic substrate. Figure The wiring surface of the case or only the through electrode is formed at a position corresponding to the electrode. At this time, the semiconductor element is also bonded to the ceramic substrate at a normal temperature to directly bond the portion other than the electrode, so that firm bonding and high heat dissipation can be achieved.

Moreover, the ceramic substrate 7 and the ceramic substrate 8 are formed into a flat plate shape by a process using a normal ceramic. Further, on the surface of one surface of the ceramic substrate 7 and the ceramic substrate 8 (the inner surface after the module is formed), wiring circuit layers are formed at positions corresponding to the electrode faces of the IGBT 2 and the diode 3, respectively. 4, 5, 6 (or wiring circuit layers 22, 23, 24), and through wirings 9, 10, 12 connected to the wiring circuit layers 4, 5, 6 (or wiring circuit layers 22, 23, 24) are continuous The ceramic substrate 7 is formed. That is, the wiring circuit layers 4, 5, and 6 (or the wiring circuit layers 22, 23, 24) are modularized, and the electrode faces of the IGBT 2, the diode 3, and the through wirings 9, 10, 12 are respectively In the same way, it is patterned. Further, the sealing member 11 used inside the sealing module is also formed into a hollow flat plate shape by a usual ceramic process. The sealing member 11 also penetrates the main body of the sealing member 11 to form a through wiring 12 that is connected to the wiring circuit layer 6 (24).

For example, as shown in Fig. 6(a), the wiring circuit layers 4, 5 are formed on the surface of the ceramic substrate 7 directly by the film forming process. As the film forming process, for example, a general film forming process such as CVD (Chemical Vapor Deposition), plating, or sputtering is used. More specifically, after the film is formed on the entire surface of the ceramic substrate 7, a part of the surface of the ceramic substrate 7 is removed by etching or the like, and patterned to form wiring circuit layers 4a and 5a corresponding to the electrode faces of the IGBT 2 and the diode 3, Alternatively, the wiring circuit layers 4a, 5a corresponding to the electrode faces of the IGBT 2 and the diode 3 may be selectively formed by masking and patterned.

Or, as shown in FIG. 6(b), the wiring circuit layers 4, 5 are formed by patterning the metal foil to form wiring circuit layers 4b, 5b corresponding to the electrode faces of the IGBT 2 and the diode 3, and The wiring circuit layers 4b and 5b of the metal foil may be bonded to the surface of the ceramic substrate 7 by a normal temperature bonding method, or the metal foil may be bonded to the surface of the ceramic substrate 7 by a normal temperature bonding method, and then removed by etching or the like. A part of the wiring circuit layers 4b and 5b corresponding to the IGBT 2 and the electrode surface of the diode 3 may be formed by patterning. Further, when the metal foil is bonded to the ceramic substrate 7, when the intermediate bonding strength is to be increased, the intermediate layer 7a may be formed between the metal foil and the ceramic substrate 7. Examples of the material of the intermediate layer include metals such as gold (Au), platinum (Pt), titanium (Ti), and aluminum (Al).

The wiring circuit layer 6 of the ceramic substrate 8 may be formed in the same manner as the wiring circuit layers 4 and 5 described above. However, the wiring circuit layer 6 does not need to correspond to the IGBT 2 and the electrode of the diode 3 as the wiring circuit layers 4 and 5. The patterning is performed on the surface, so that the wiring circuit layer 6 can be formed on the ceramic substrate 8 by a film forming process, or a metal foil to be the wiring circuit layer 6 can be separately formed, and the metal foil can be used. Bonding at room temperature may be performed on the surface of the ceramic substrate 8 in an all-round manner.

Further, when the wiring circuit layers 22, 23, 24, and 31 shown in the second embodiment are formed, a plurality of vertical grooves having a high aspect ratio in the thickness direction are formed on the flat wiring circuit layers formed on the ceramic substrates 7, 8. Further, it is also possible to form a plurality of fine columnar electrode structures. For example, as shown in Figure 6(c) In the case where the wiring circuit layers 4a, 5a, and 9a are processed, a micro-aspect ratio is used, such as etching by a laser or an electron beam 51 or a micro-machining technique such as a stamping press. The plurality of fine vertical grooves are formed in a flat wiring circuit layer having a thickness of 10 to 100 μm, and may be formed into a plurality of fine columnar electrode structures.

Further, for example, when a metal foil is used as the wiring circuit layers 4b, 5b, and 9b, a plurality of vertical vertical grooves having a high aspect ratio are formed in advance on the metal foil, and the metal foil is bonded to the metal foil by a normal temperature bonding method. On the ceramic substrate 7, 8 side, a plurality of fine columnar electrode structures may be formed. Further, a plurality of fine columnar electrode structures can be formed by extrusion processing or selectively growing a metal foil in a specific range. Further, a plurality of fine columnar electrode structures themselves may be formed by lamination of the room temperature bonding method.

Further, the wiring circuit layers 22, 23, 24, and 31 of the columnar electrode structure are appropriately formed into a deformable shape in accordance with the use condition (for example, use temperature, electrode material, etc.), and are preferably elastically deformable shapes and sizes. . Further, the aspect ratio of the columnar electrode structure is 5:1 or more, and preferably 10:1 or more.

By using the wiring circuit layers 22, 23, 24, 31 of the above-described columnar electrode structure, stress during heat generation is alleviated, and reliable electrical connection and thermal connection of the wiring circuit layers 22, 23, 24, 31 can be ensured.

In the IGBT 2, the diode 3, the ceramic substrate 7, and the ceramic substrate 8 which are produced, the sealing member 11 is joined by a room temperature bonding method, and the bonding surface is polished in order to make a more reliable and stronger bonding. flattened. Specifically, in IGRT2, the collector electrode surface 2c and the emitter electrode are included. The surface of the surface of the surface 2e and the gate electrode surface 2g is the surface of the element including the electrode surface 3c and the electrode surface 3e in the diode 3, the wiring circuit layers 4 and 5 on the ceramic substrate 7, and the wiring circuit in the ceramic substrate 8. The polishing and planarization of the surface of the layer 6 or the like is performed by, for example, a CMP (Chemical Mechanical Polish) apparatus 52 (see Fig. 6(d)). Such polishing and planarization are performed, for example, by a chemical mechanical processing method such as CMP or a mechanical grinding method such as a back grinder. Further, since the joint strength of the room temperature bonding method is affected by the surface roughness of the joint surface, it is preferable to planarize the surface as smoothly as possible by CMP or the like, whereby the joint is not bonded at the junction. There is a void, and a stronger joint strength can be obtained.

(2) Bonding of members to each other

The IGBT 2, the diode 3, the ceramic substrate 7, the ceramic substrate 8, and the sealing member 11 which are produced and joined, and the bonding surface is polished and planarized are bonded in the following order.

(2I) IGBT 2, bonding of the diode 3 to the ceramic substrate 8

When the IGBT 2 is fabricated, the IGBT 2 is polished and planarized, and the diode 3 and the ceramic substrate 8 are placed in a vacuum chamber of a processing apparatus that is joined at room temperature, as shown in Fig. 7(a) In the first place, the bonding surface of these is cleaned by physical sputtering such as the argon ion beam 53 or the like, and the activation treatment is activated.

Specifically, in a high vacuum, removal is formed by physical sputtering or the like. In the inert layer on the joint surface (for example, a product which is adhered to the surface or a product which is formed by the material, the bond is broken by a bond or the like, and the surface of the material is in a state of lack of reactivity, etc.) At the same time as the surface of the joint surface is cleaned, a dangling bond is formed on the surface of the joint surface, that is, the surface on which the active surface is exposed is exposed to the surface of the joint surface. As means for physical sputtering, an ion beam of an inert atom (for example, argon or the like), a high-speed neutral atom beam (Fast Atom Beam: FAB), a plasma, or the like is used. Further, the IGBT 2, the diode 3, and the ceramic substrate 8 may be placed at opposite positions in advance, and the surface may be subjected to physical sputtering to be activated.

Further, after the positions of the mutually joined joints are adjusted to each other, as shown in steps S1 and 7(b) of Fig. 5, the surfaces are brought into contact with each other, and the load F is applied to be pressed. By surface activation, a dangling bond is formed on the joint surface, and by dangling, the dangling bond forms a bond. Thereby, the electrode surface 2c of the IGBT 2 and the electrode surface 3c of the diode 3 are firmly bonded to the wiring circuit layer 6 of the ceramic substrate 8 by the normal temperature bonding, and electrical conduction and thermal conduction are formed. In such a room temperature bonding method, the bonding surfaces are bonded to each other between the dangling bonds, and a strong bonding strength can be obtained. Moreover, since bonding is performed at room temperature, there is no deformation due to heat.

(2II) Bonding of Ceramic Substrate 8 and Sealing Member 11

When the ceramic substrate 8 to which the IGBT 2 and the diode 3 are bonded and the sealing member 11 are joined, the bonding surface of the members is activated in the vacuum chamber in the same manner as in the above (2I). Relative activation After the joint faces are adjusted to each other, they are in contact with each other, and a load is applied to press them together [step S2 of Fig. 5, Fig. 8(a)]. Thereby, the ceramic substrate 8 and the sealing member 11 are firmly joined by the normal temperature bonding. At this time, the through wiring 12 provided in the sealing member 11 is also firmly bonded to the wiring circuit layer 6 of the ceramic substrate 8 to form electrical conduction and thermal conduction. The sealing member 11 is bonded to the inside of the sealing module by joining the ceramic substrate 7 described below, and functions to seal and protect the IGBT 2 and the diode 3. Further, in the outer edge portion of the ceramic substrate 8, in the same manner as the sealing member 11, an outer peripheral wall having a function of sealing the inside of the module is formed, and the IGBT 2 and the diode 3 may be bonded to the inner side of the outer peripheral wall.

(2III) IGBT 2, diode 3, bonding of sealing member 11 and ceramic substrate 7

Finally, when the IGBT 2, the diode 3, the sealing member 11 and the ceramic substrate 7 bonded to the ceramic substrate 8 are bonded, similarly to the above (2I), the bonding faces of these members are performed in the vacuum chamber. After the activation treatment, the positions of the bonded surfaces are adjusted to each other, and then they are brought into contact with each other, and a load is applied thereto to be pressure-bonded (step S3 in Fig. 5, Fig. 8(b)). Thereby, the ceramic substrate 7 and the sealing member 11 (or the outer peripheral wall) are firmly joined by the normal temperature bonding, and the emitter electrode surface 2e of the IGBT 2, the gate electrode surface 2g, and the electrode surface 3e of the diode 3, Corresponding to these electrode faces, the wiring circuit layers 4, 5 of the patterned ceramic substrate 7 are firmly bonded to each other to form electrical conduction and thermal conduction.

When the inside of the module is to be vacuum-sealed, the joint caused by the normal temperature joining method of the sealing member 11 is performed under a vacuum gas atmosphere, and thus the sealing member 11 (or the outer peripheral wall) itself functions as a gas-tight function, and in the above ( After the joining of 2III), the inside of the module naturally becomes a vacuum seal. Further, when the inside of the module is to be sealed with a resin, the predetermined introduction holes are provided in advance on the ceramic substrates 7, 8 after the bonding, and the resin is introduced from the introduction hole to the mold by press-fitting or vacuum-absorbing the fluid insulating resin. The interior of the group is sealed with resin inside the module.

In the above manufacturing procedure, the IGBT 2 and the diode 3 are mounted inside the ceramic substrates 7, 8 to form the semiconductor element modules 1, 21 of the present invention.

In the present embodiment, as an example, the bonding of the (2I) IGBT 2, the diode 3, and the ceramic substrate 8 (joining and mounting of the collector electrode or the like) → (2II) the ceramic substrate 8 and Manufacture of the sealing member 11 (forming a sealing portion) → (2III) IGBT 2, diode 3, bonding of sealing member 11 and ceramic substrate 7 (joining and mounting of emitter electrode, gate electrode, etc.) The order is not necessarily the order in the present invention, but may be, for example, the order of replacing (2I) and (2III). Further, as shown in FIG. 4, after the module is formed, the heat sink 41 may be bonded to the ceramic substrate 8 side by the normal temperature bonding method in the same manner.

As described above, in the method of manufacturing the semiconductor element module of the present invention, only the IGBT 2 and the flat electrode surface of the diode 3 are planarly bonded to the flat wiring circuit layers 4, 5, and 6 (or the wiring of the ceramic substrates 7 and 8). Circuit layer 22, 23, 24), the wiring work and the installation work are completed. Therefore, compared with the prior art, the module process can be greatly simplified, and the number of components required can be reduced, and the process cost can be greatly reduced.

In addition, as an example of the arrangement of the electrode surfaces of the semiconductor element such as the IGBT 2 and the diode 3 (the IGBT 2 is taken as an example in the ninth diagram), the examples are shown in the 9th (a)th to the ninth ( d) The composition of the figure. Specifically, all the electrode faces (the emitter electrode face 2e, the gate electrode face 2g, and the collector electrode face 2c) are arranged in a large area as much as possible on the entire side of one side of the IGBT 2 (refer to the ninth (a) In the same manner, a plurality of (see the 9th (b)th) electrode faces (the emitter electrode surface 2e, the gate electrode surface 2g, and the collector electrode surface 2c) are disposed on one surface of one side of the IGBT 2, respectively. Similarly, on the one side of the IGBT 2, the area of all the electrode faces (the emitter electrode face 2e, the gate electrode face 2g, and the collector electrode face 2c) may be arranged as a part of one surface (see ninth). (c) Figure]. Further, on both surfaces of the IGBT 2, an electrode surface having the same pattern as that of the above-described arrangement example is formed, or a part of the electrode surface (the emitter electrode surface 2e and the gate electrode surface 2g) is placed on one side of the IGBT 2; Further, the remaining electrode surface (collector electrode surface 2c) may be formed on one surface of the other side of the IGBT 2 (see Fig. 9(d)). In this case, a wiring surface corresponding to the electrode pattern of the semiconductor element may be formed on the ceramic substrate side, or only a through electrode may be formed at a position corresponding to the electrode surface.

The present invention is applied to a semiconductor device module in which a plurality of semiconductor elements such as a power transistor having a large output and a large amount of heat are supplied in one package Manufacturing method. Such a semiconductor component module is also applicable to an electric motor module of an electric vehicle.

1, 21‧‧‧ semiconductor component module

2‧‧‧IGBT (semiconductor component)

2c, 2e, 2g‧‧‧ electrode faces

3‧‧‧ diode (semiconductor component)

3c, 3e‧‧‧ electrode faces

4, 5, 6‧‧‧ wiring circuit layer

7, 8‧‧‧Ceramic substrate

9, 10, 12‧‧‧through wiring

11‧‧‧ Sealing members

13‧‧‧Resin

22, 23, 24, 31‧‧‧ wiring circuit layer

41‧‧‧ Heat sink

Fig. 1 is a cross-sectional view showing an example (Example 1) of an embodiment of a semiconductor element module of the present invention.

2(a) to 2(c) are cross-sectional views showing another example (Embodiment 2) of the embodiment of the semiconductor element module of the present invention.

3(a) to 3(c) are cross-sectional views showing a modification of the semiconductor element module shown in the second embodiment.

Fig. 4 is a configuration diagram showing another example (Embodiment 3) of the embodiment of the semiconductor element module of the present invention.

Fig. 5 is a schematic view showing a method of manufacturing the semiconductor element module shown in the first and second embodiments.

6(a) to 6(d) are detailed views for explaining the method of manufacturing the semiconductor element module shown in the first and second embodiments.

7(a) to 7(b) are detailed views for explaining the method of manufacturing the semiconductor element module shown in the first and second embodiments.

8(a) to 8(b) are detailed views for explaining the method of manufacturing the semiconductor element module shown in the first and second embodiments.

9(a) to 9(d) are diagrams showing several examples of arrangement of electrode faces in a semiconductor element using the semiconductor element module of the present invention.

1‧‧‧Semiconductor component module

2‧‧‧IGBT (semiconductor component)

2c, 2e, 2g‧‧‧ electrode faces

3‧‧‧ diode (semiconductor component)

3c, 3e‧‧‧ electrode faces

4, 5, 6‧‧‧ wiring circuit layer

7, 8‧‧‧Ceramic substrate

9, 10, 12‧‧‧through wiring

11‧‧‧ Sealing members

13‧‧‧Resin

Claims (24)

A semiconductor element module in which at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating substrate and the second insulating substrate are sealed The semiconductor element module of the outer peripheral portion is characterized in that the semiconductor element is a plurality of electrode faces having a part of a surface formed on one side of the semiconductor element, and the first insulating substrate has a corresponding semiconductor element The electrode surface formed on one surface of the first insulating substrate, and the electrode surface of the semiconductor element and the first wiring surface are bonded to the semiconductor element by a normal temperature bonding method. a surface on the side and the first insulating substrate, and a surface on the other side of the semiconductor element and the second insulating substrate are joined by a normal temperature bonding method, and the semiconductor element is mounted on the first insulating substrate and the second insulating layer Substrate. A semiconductor element module in which at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating substrate and the second insulating substrate are sealed The semiconductor element module of the outer peripheral portion is characterized in that the semiconductor element has a plurality of electrode faces formed on a part of both surfaces of the semiconductor device, and the first insulating substrate has one corresponding to the semiconductor element. The electrode surface on the side is formed on one side of the first insulating substrate In the first wiring surface of the one surface, the second insulating substrate has a second wiring surface which is formed on one surface of the second insulating substrate and has the electrode surface corresponding to the other side of the semiconductor element. The electrode surface on one side of the semiconductor element and the first wiring surface are joined to the first insulating substrate by the normal temperature bonding method on one surface of the semiconductor element, and the electrode on the other side of the semiconductor element The second wiring surface is joined to the second wiring surface by a normal temperature bonding method to bond the surface of the semiconductor element to the second insulating substrate, and the semiconductor element is mounted on the first insulating substrate and the second insulating substrate. A semiconductor element module in which at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating substrate and the second insulating substrate are sealed The semiconductor element module of the outer peripheral portion is characterized in that the semiconductor element has a plurality of integrated electrode faces formed on one surface of the semiconductor element, and the first insulating substrate has a semiconductor corresponding to the semiconductor The electrode surface of the element is formed on the first wiring surface on one side of the first insulating substrate, and the electrode surface and the first wiring surface of the semiconductor element are bonded by a normal temperature bonding method, and the first wiring surface is joined by a normal temperature bonding method. Bonding the surface of the other side of the semiconductor element to the second insulating substrate, and mounting the semiconductor element on the first insulating substrate and the second insulating base board. A semiconductor element module in which at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating substrate and the second insulating substrate are sealed The semiconductor element module of the outer peripheral portion is characterized in that the semiconductor element has all of the plurality of integrated electrode faces formed on both surfaces of the semiconductor element, and the first insulating substrate has a corresponding semiconductor element The electrode surface on one side of the first insulating substrate is formed on one surface of the first insulating substrate, and the second insulating substrate has the electrode surface corresponding to the other side of the semiconductor element. The second wiring surface formed on one surface of the second insulating substrate is joined to the first wiring surface on one side of the semiconductor element by a normal temperature bonding method, and the semiconductor is bonded by a normal temperature bonding method. The electrode surface on the other side of the element and the second wiring surface, the semiconductor element is mounted on the first Substrate and the second insulating substrate. The semiconductor element module according to any one of the first aspect, wherein the first insulating substrate or the second insulating substrate has at least one of the first wiring surface or the The second wiring surface is connected to the externally connectable wiring, and the connection wiring penetrates the first insulating substrate in the thickness direction. Or the second insulating substrate is formed. The semiconductor element module according to any one of the first aspect, wherein the first insulating substrate or the second insulating substrate has at least one of the first wiring surface or the The second wiring surface is connected to the externally connectable wiring, and the connection wiring is formed by pulling the surface of at least one of the first insulating substrate or the second insulating substrate in the side surface direction, and is formed in the side surface direction. The outer peripheral portion between the first insulating substrate and the second insulating substrate is formed by drawing a groove formed on a surface of at least one of the first insulating substrate or the second insulating substrate in a side surface direction. At least one of the first insulating substrate or the second insulating substrate is penetrated in the side surface direction. The semiconductor element module according to any one of the first to fourth aspect, wherein the electrode surface, at least one of the first wiring surface or the second wiring surface, forms a surface flatly By. The semiconductor element module according to any one of the first to fourth aspect, wherein at least one of the electrode surface, the first wiring surface, or the second wiring surface is made of metal . A semiconductor element module belonging to a first insulating substrate in which at least one or more semiconductor elements are sandwiched between high thermal conductivity and high thermal conductivity The semiconductor element module in which the first insulating substrate and the outer peripheral portion of the second insulating substrate are sealed by a sealing member between the second insulating substrates is characterized in that the semiconductor element has a semiconductor element formed thereon. a flat electrode surface of the entire surface of the entire surface of the first insulating substrate, and the first insulating substrate having a surface corresponding to one side of the semiconductor element and having a surface formed on one side of the first insulating substrate In the flat first wiring surface, the sealing member has a first through wiring that is connected to the first wiring surface and that is provided through the sealing member, and the second insulating substrate has a semiconductor corresponding to the semiconductor. The electrode surface on the other side of the element is formed on a metal flat second wiring surface formed on one surface of the second insulating substrate, and is connected to the second wiring surface, and is provided through the second insulating substrate. The second through wiring made of metal and the third through wiring connected to the first through wiring and the third through metal provided in the second insulating substrate In the wiring, the first insulating substrate and the sealing member are joined by the normal temperature bonding method, and the first wiring surface and the first through wiring are bonded to each other, and the electrode surface of the semiconductor element and the first wiring are bonded by a normal temperature bonding method. The surface of the second wiring surface and the second wiring surface are mounted on the first insulating substrate and the second insulating substrate. The semiconductor element module according to any one of the third aspect, wherein the first wiring surface, the second wiring surface, or the semiconductor element At least one surface of the electrode surface of the device is provided with a plurality of deformable fine plural columnar electrodes, and at least one of the first wiring surface or the second wiring surface is bonded to the above-mentioned plurality of columnar electrodes by a room temperature bonding method The electrode surface of the semiconductor element. The semiconductor element module according to claim 10, wherein at least one joint portion of the columnar electrode on the first wiring surface side, the second wiring surface side, or the electrode surface side of the semiconductor element The shoulder portion of the circumference forms a circle. The semiconductor element module according to claim 5, wherein the first insulating substrate and the second insulating substrate are not disposed, or the first insulating substrate or the second insulating substrate is penetrated in a thickness direction. At the time of wiring, a cooling means for cooling the semiconductor element module is provided on the outer surface of at least one of the first insulating substrate or the second insulating substrate by a room temperature bonding method. A method of manufacturing a semiconductor device module, wherein at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating substrate and the first portion are sealed A method of manufacturing a semiconductor element module in an outer peripheral portion between two insulating substrates, wherein a plurality of electrode faces are formed on a surface of one side of the semiconductor element, and one surface of one side of the first insulating substrate is formed. Corresponding to The first wiring surface of the semiconductor element on the electrode surface of the semiconductor element is bonded to the first insulating substrate by the normal temperature bonding method to the surface of the semiconductor element and the first wiring surface. The semiconductor element is mounted on the first insulating substrate and the second insulating substrate by bonding the surface of the other side of the semiconductor element to the second insulating substrate by a room temperature bonding method. A method of manufacturing a semiconductor device module, wherein at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating substrate and the first portion are sealed In a method of manufacturing a semiconductor element module in an outer peripheral portion between two insulating substrates, a plurality of electrode faces are formed on a part of both surfaces of the semiconductor element, and a surface is formed on one surface of the first insulating substrate. a second wiring surface corresponding to the electrode surface on the other side of the semiconductor element is formed on one surface of the second insulating substrate on the first wiring surface of the electrode surface on one side of the semiconductor element, and The electrode surface on one side of the semiconductor element and the first wiring surface are joined to the first insulating substrate by the normal temperature bonding method on one surface of the semiconductor element, and the electrode on the other side of the semiconductor element The other surface of the semiconductor element is bonded to the second wiring surface by the normal temperature bonding method The surface of the second insulating substrate, to serve the semiconductor element 1 is mounted on the first insulating The edge substrate and the second insulating substrate. A method of manufacturing a semiconductor device module, wherein at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating substrate and the first portion are sealed A method of manufacturing a semiconductor element module in an outer peripheral portion between two insulating substrates, wherein a surface of one side of the semiconductor element is entirely formed, and a plurality of electrode faces are formed on one side of the first insulating substrate. Forming a first wiring surface corresponding to the electrode surface on one side of the semiconductor element, bonding the electrode surface of the semiconductor element and the first wiring surface by a normal temperature bonding method, and bonding the semiconductor by a normal temperature bonding method The surface of the other side of the element and the second insulating substrate are mounted on the first insulating substrate and the second insulating substrate. A method of manufacturing a semiconductor device module, wherein at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating substrate and the first portion are sealed In a method of manufacturing a semiconductor element module in an outer peripheral portion between two insulating substrates, a plurality of electrode faces are formed on all surfaces of the semiconductor element, and one surface of one side of the first insulating substrate is formed. a first wiring surface corresponding to the electrode surface on one side of the semiconductor element, a second wiring surface corresponding to the electrode surface on the other side of the semiconductor element is formed on one surface of the second insulating substrate, and the electrode surface on one side of the semiconductor element is bonded to the above-described semiconductor element by a normal temperature bonding method. In the first wiring surface, the electrode surface and the second wiring surface on the other side of the semiconductor element are joined by a normal temperature bonding method, and the semiconductor element is mounted on the first insulating substrate and the second insulating substrate. . In the method of manufacturing a semiconductor element module according to any one of the first to the first insulating substrate or the second insulating substrate, the first wiring and the first wiring are formed. The surface or the second wiring surface is connected to each other, and the first insulating substrate or the second insulating substrate is penetrated in the thickness direction to be connected to the outside. The method of manufacturing a semiconductor element module according to any one of the first aspect of the invention, wherein the first wiring surface or the second wiring surface is connected to at least one of the first wiring surface and the second wiring surface The connectable connection wiring is formed by pulling the surface of at least one of the first insulating substrate or the second insulating substrate toward the side surface to form a wiring, and the outer peripheral portion between the first insulating substrate and the second insulating substrate The wiring is formed to penetrate the wiring in the side surface direction, or the surface of at least one of the first insulating substrate or the second insulating substrate is pulled in the side surface direction to form a groove, and the wiring is formed in the groove, and the first insulation is formed. At least a substrate or the second insulating substrate One side is formed by penetrating the wiring in the side direction. The method of manufacturing a semiconductor element module according to any one of the first to sixth aspect, wherein at least one of the electrode surface, the first wiring surface, or the second wiring surface is formed flat. surface. The method of manufacturing a semiconductor element module according to any one of the first to sixth aspect of the present invention, wherein at least one of the electrode surface, the first wiring surface, or the second wiring surface is made of a metal . A method of manufacturing a semiconductor element module, wherein at least one or more semiconductor elements are sandwiched between a highly thermally conductive first insulating substrate and a highly thermally conductive second insulating substrate, and the first insulating layer is sealed by a sealing member. In a method of manufacturing a semiconductor element module of a substrate and an outer peripheral portion of the second insulating substrate, a flat electrode surface made of metal is formed on both surfaces of the semiconductor element in a comprehensive or substantially uniform manner, and the first insulating substrate is formed on the first insulating substrate. A metal first flat wiring surface corresponding to one electrode surface of the semiconductor element is formed on one side of the semiconductor element, and the first through wiring made of metal connected to the first wiring surface is formed through the sealing member. a metal flat second wiring surface corresponding to the other electrode surface of the semiconductor element is formed on one surface of the second insulating substrate, and penetrates the second insulating substrate and the second wiring surface a second through wiring made of a metal and a third through wiring that is connected to the first through wiring and that is connected to the first through wiring, and the first insulating substrate is bonded to the first insulating substrate by a normal temperature bonding method. In the sealing member, the first wiring surface and the first through wiring are joined, and the electrode surface of the semiconductor element, the first wiring surface, and the second wiring surface are joined by a normal temperature bonding method, and the semiconductor element is mounted. The first insulating substrate and the second insulating substrate. The method of manufacturing a semiconductor element module according to any one of the first aspect of the invention, wherein the first wiring surface, the second wiring surface, or an electrode of the semiconductor element At least one surface of the surface is provided with a plurality of deformable fine plural columnar electrodes, and at least one of the first wiring surface or the second wiring surface is bonded to the semiconductor element via the plurality of columnar electrodes by a room temperature bonding method Electrode surface. The method of manufacturing a semiconductor device module according to claim 22, wherein at least one of the first wiring surface side, the second wiring surface side, or the electrode surface side of the semiconductor element of the columnar electrode is used. The shoulder portions of the circumference of the joint form a circle. The method of manufacturing a semiconductor device module according to claim 17, wherein the first insulating substrate and the second insulating substrate are not disposed, or the first insulating substrate is penetrated in a thickness direction or 2nd In the wiring of the insulating substrate, a cooling means for cooling the semiconductor element module is joined to the outer surface of at least one of the first insulating substrate or the second insulating substrate by a room temperature bonding method.