TWI392028B - 用以補償ｍｏｓｆｅｔ積體電路中之製程導致的性能變異之方法 - Google Patents

用以補償ｍｏｓｆｅｔ積體電路中之製程導致的性能變異之方法 Download PDF

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Publication number
TWI392028B
TWI392028B TW097102499A TW97102499A TWI392028B TW I392028 B TWI392028 B TW I392028B TW 097102499 A TW097102499 A TW 097102499A TW 97102499 A TW97102499 A TW 97102499A TW I392028 B TWI392028 B TW I392028B
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TW
Taiwan
Prior art keywords
integrated circuit
circuit design
transistor
variation
analyzed
Prior art date
Application number
TW097102499A
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English (en)
Chinese (zh)
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TW200849408A (en
Inventor
莫羅茲 維特
普雷曼尼克 迪潘克
辛海 基歇爾
林錫偉
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希諾皮斯股份有限公司
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Publication of TW200849408A publication Critical patent/TW200849408A/zh
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Publication of TWI392028B publication Critical patent/TWI392028B/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30—Devices controlled by electric currents or voltages
    • H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H10D48/36—Unipolar devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00—Bonding of wafers, substrates or parts of devices

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
TW097102499A 2007-06-01 2008-01-23 用以補償ｍｏｓｆｅｔ積體電路中之製程導致的性能變異之方法 TWI392028B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/757,338 US7949985B2 (en) 2007-06-01 2007-06-01 Method for compensation of process-induced performance variation in a MOSFET integrated circuit

Publications (2)

Publication Number Publication Date
TW200849408A TW200849408A (en) 2008-12-16
TWI392028B true TWI392028B (zh) 2013-04-01

Family

ID=40087455

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097102499A TWI392028B (zh) 2007-06-01 2008-01-23 用以補償ｍｏｓｆｅｔ積體電路中之製程導致的性能變異之方法

Country Status (7)

Country Link
US (2) US7949985B2 (https=)
EP (1) EP2153239A4 (https=)
JP (1) JP5261479B2 (https=)
KR (1) KR101159305B1 (https=)
CN (1) CN101675348A (https=)
TW (1) TWI392028B (https=)
WO (1) WO2008150555A1 (https=)

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US7949985B2 (en) * 2007-06-01 2011-05-24 Synopsys, Inc. Method for compensation of process-induced performance variation in a MOSFET integrated circuit
US8176444B2 (en) * 2009-04-20 2012-05-08 International Business Machines Corporation Analyzing multiple induced systematic and statistical layout dependent effects on circuit performance
US20120042292A1 (en) * 2010-08-10 2012-02-16 Stmicroelectronics S.A. Method of synthesis of an electronic circuit
US8776005B1 (en) 2013-01-18 2014-07-08 Synopsys, Inc. Modeling mechanical behavior with layout-dependent material properties
US8832619B2 (en) * 2013-01-28 2014-09-09 Taiwan Semiconductor Manufacturing Co., Ltd. Analytical model for predicting current mismatch in metal oxide semiconductor arrays
US9665675B2 (en) 2013-12-31 2017-05-30 Texas Instruments Incorporated Method to improve transistor matching
CN105740572B (zh) * 2016-02-26 2019-01-15 联想(北京)有限公司 一种电子设备
EP3760196B1 (en) * 2018-02-28 2024-12-18 Petroeuroasia Co., Ltd. Reduced coenzyme q10-containing composition and method for producing same
CN119997585B (zh) * 2025-04-14 2025-07-22 合肥晶合集成电路股份有限公司 一种半导体器件的制作方法

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US6583017B2 (en) * 1999-02-19 2003-06-24 Taiwan Semiconductor Manufacturing Company Self aligned channel implant, elevated S/D process by gate electrode damascene
TW200416994A (en) * 2002-08-21 2004-09-01 Ibm Method to improve performance of microelectronic circuits
US20060107243A1 (en) * 2004-11-18 2006-05-18 Agere Systems Inc. Method of making a semiconductor device by balancing shallow trench isolation stress and optical proximity effects
US20060142987A1 (en) * 2004-12-24 2006-06-29 Matsushita Electric Industrial Co., Ltd. Circuit simulation method and circuit simulation apparatus
US20070028195A1 (en) * 2005-07-29 2007-02-01 International Business Machines Corporation Methodology for layout-based modulation and optimization of nitride liner stress effect in compact models
US20070057340A1 (en) * 2005-09-13 2007-03-15 Jung Myung J Semiconductor device and method of fabricating thereof

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US7949985B2 (en) 2007-06-01 2011-05-24 Synopsys, Inc. Method for compensation of process-induced performance variation in a MOSFET integrated circuit

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3882391A (en) * 1973-06-25 1975-05-06 Ibm Testing the stability of MOSFET devices
US5748543A (en) * 1995-06-21 1998-05-05 Samsung Electronics Co., Ltd. Self repairing integrated circuit memory devices and methods
US6583017B2 (en) * 1999-02-19 2003-06-24 Taiwan Semiconductor Manufacturing Company Self aligned channel implant, elevated S/D process by gate electrode damascene
TW490808B (en) * 1999-12-22 2002-06-11 Nippon Electric Co Semiconductor device and method of fabricating the same
TW200416994A (en) * 2002-08-21 2004-09-01 Ibm Method to improve performance of microelectronic circuits
US20060107243A1 (en) * 2004-11-18 2006-05-18 Agere Systems Inc. Method of making a semiconductor device by balancing shallow trench isolation stress and optical proximity effects
US20060142987A1 (en) * 2004-12-24 2006-06-29 Matsushita Electric Industrial Co., Ltd. Circuit simulation method and circuit simulation apparatus
US20070028195A1 (en) * 2005-07-29 2007-02-01 International Business Machines Corporation Methodology for layout-based modulation and optimization of nitride liner stress effect in compact models
US20070057340A1 (en) * 2005-09-13 2007-03-15 Jung Myung J Semiconductor device and method of fabricating thereof

Also Published As

Publication number Publication date
US20080297237A1 (en) 2008-12-04
JP2010529649A (ja) 2010-08-26
JP5261479B2 (ja) 2013-08-14
EP2153239A4 (en) 2011-08-17
US8219961B2 (en) 2012-07-10
KR20090133129A (ko) 2009-12-31
EP2153239A1 (en) 2010-02-17
US7949985B2 (en) 2011-05-24
KR101159305B1 (ko) 2012-06-25
WO2008150555A1 (en) 2008-12-11
TW200849408A (en) 2008-12-16
US20110219351A1 (en) 2011-09-08
CN101675348A (zh) 2010-03-17

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