TWI389453B - Light emitting diode drive - Google Patents
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Description
本發明係有關一種發光二極體驅動裝置,尤其是利用時脈輸入信號的正緣與/或負緣以驅動複數個發光二極體串。The invention relates to a light-emitting diode driving device, in particular to use a positive edge and/or a negative edge of a clock input signal to drive a plurality of light-emitting diode strings.
由於發光二極體(Light Emitting Diode,LED)具有較高的光電轉換效率,同時操作穩定性高且可以脈衝寬度調變(Pulse Width Modulation,PWM)進行亮度控制,所以已應用至許多電子裝置的光源或顯示元件,比如顯示器的背光源、照明、廣告看版、大型顯示器的影像像素。Light Emitting Diode (LED) has been applied to many electronic devices because of its high photoelectric conversion efficiency, high operational stability, and brightness control by Pulse Width Modulation (PWM). Light source or display element, such as the backlight of the display, lighting, advertising viewing, image pixels of a large display.
發光二極體的發光機制係利用驅動電流,亦即驅動電流愈大,則發光二極體的亮度愈高,因此,發光二極體最好是以串接方式連接,而以定電流進行驅動,以提高發光二極體的亮度的均一性。隨著發光二極體的數目增加,且受限於發光二極體的配線,通常將串接的發光二極體再以並聯方式連接,以形成較大的面光源或顯示器。The illuminating mechanism of the illuminating diode uses the driving current, that is, the higher the driving current, the higher the brightness of the illuminating diode. Therefore, the illuminating diode is preferably connected in series and driven at a constant current. To improve the uniformity of the brightness of the light-emitting diode. As the number of light-emitting diodes increases and is limited by the wiring of the light-emitting diodes, the series-connected light-emitting diodes are typically connected in parallel to form a larger surface light source or display.
習用技術的作法是使用複數個可串接的驅動器,每個驅動器連接複數個串接的發光二極體串,藉接收資料輸入信號、時脈輸入信號、輸出致能信號以及栓鎖輸入信號,以驅動發光二極體串,同時將資料輸入信號、時脈輸入信號、輸出致能信號以及栓鎖輸入信號傳送到下一級的驅動器,以驅動所連接的發光二極體串,並以此類推。The conventional technique is to use a plurality of serially connectable drivers, each of which is connected to a plurality of serially connected LED strings, and receives a data input signal, a clock input signal, an output enable signal, and a latch input signal. To drive the LED string, and simultaneously transmit the data input signal, the clock input signal, the output enable signal, and the latch input signal to the driver of the next stage to drive the connected LED string, and so on. .
然而,習用技術的缺點是,發光二極體驅動器需要四個輸入信號以四個輸出信號,所以需要數目眾多的連接線,而不同長度的連接線會產生信號延遲,影響整體發光二極體的發光表現。習用技術的另一缺點是,資料輸入信號係依據時脈輸入信號,亦即每一時脈輸入信號只可擷取單一輸入資料,對於發光二極體的數量愈來愈多的應用領域而言,輸入資料的速度已不敷需求,而如果是增加時脈輸入信號的頻率以提高輸入資料量,則發光二極體驅動器需在高頻率下操作,對於發光二極體驅動器的電氣動作非常不利,影響驅動的穩定性。However, the disadvantage of the conventional technology is that the LED driver requires four input signals to four output signals, so a large number of connecting lines are required, and different lengths of the connecting lines generate signal delays, which affect the overall light emitting diode. Luminous performance. Another disadvantage of the conventional technology is that the data input signal is based on the clock input signal, that is, each clock input signal can only capture a single input data. For an application field where the number of light-emitting diodes is increasing, The speed of inputting data is insufficient, and if the frequency of the clock input signal is increased to increase the amount of input data, the LED driver needs to operate at a high frequency, which is very disadvantageous for the electrical action of the LED driver. Affect the stability of the drive.
因此需要一種不需提高時脈頻率而能增加輸入資料量的發光二極體驅動裝置,且只需要較少的控制信號,以解決上述習用技術的缺點。Therefore, there is a need for a light-emitting diode driving device which can increase the amount of input data without increasing the clock frequency, and requires only a small number of control signals to solve the disadvantages of the above-mentioned conventional techniques.
本發明之主要目的在提供一種發光二極體驅動裝置,用以接收時脈輸入信號以及資料輸入信號,產生複數個發光二極體驅動信號,以驅動複數個發光二極體串,且本發明的發光二極體驅動裝置包括時脈反相單元、觸發信號產生單元、內部振盪器、栓鎖信號產生單元、移位暫存器單元、栓鎖暫存器單元、PWM處理單元以及發光二極體驅動單元,其中內部振盪器或外部輸入振盪器產生振盪信號,觸發信號產生單元在時脈輸入信號的正緣與/或負緣產生觸發信號,提供移位暫存器單元擷取資料輸入信號,而栓鎖信號產生單元接收時脈輸入信號以及內部或外部振盪信號,並產生栓鎖信號,提供栓鎖暫存器單元擷取移位暫存器單元的輸出信號,PWM處理單元接收時脈切換開關信號而將栓鎖暫存器單元的輸出信號經過PWM處理單元,再傳送至發光二極體驅動單元,發光二極體驅動單元驅動連接電源的發光二極體串。The main object of the present invention is to provide a light emitting diode driving device for receiving a clock input signal and a data input signal, generating a plurality of light emitting diode driving signals to drive a plurality of light emitting diode strings, and the present invention The LED driving device comprises a clock inversion unit, a trigger signal generating unit, an internal oscillator, a latch signal generating unit, a shift register unit, a latch register unit, a PWM processing unit, and a light emitting diode a driving unit, wherein the internal oscillator or the external input oscillator generates an oscillating signal, and the trigger signal generating unit generates a trigger signal at a positive edge and/or a negative edge of the clock input signal, and provides a shift register unit to acquire the data input signal And the latch signal generating unit receives the clock input signal and the internal or external oscillating signal, and generates a latch signal, and provides a latch register unit to capture the output signal of the shift register unit, and the PWM processing unit receives the clock Switching the switch signal and passing the output signal of the latch register unit to the PWM processing unit, and then transmitting to the LED driving unit to emit light The diode drive unit drives a string of light-emitting diodes connected to the power source.
本發明的發光二極體驅動裝置可以串接方式連接,只需將每個發光二極體驅動裝置的資料輸出信號與時脈輸出信號分別連接到下一發光二極體驅動裝置的資料輸入信號與時脈輸入信號,簡化電路板設計並且可以增加發光二極體驅動裝置的串接級數,即可用以增加發光二極體串的數目,而不需其他控制信號,因此簡化整體系統配線,並降低系統成本,同時提高系統的可靠度。The LED driving device of the present invention can be connected in series, and only needs to connect the data output signal and the clock output signal of each LED driving device to the data input signal of the next LED driving device. And the clock input signal, simplifying the circuit board design and increasing the number of series of LEDs, which can be used to increase the number of LED strings without additional control signals, thus simplifying overall system wiring. And reduce system costs while improving system reliability.
以下配合圖式及元件符號對本發明之實施方式做更詳細的說明,俾使熟習該項技藝者在研讀本說明書後能據以實施。The embodiments of the present invention will be described in more detail below with reference to the drawings and the <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt;
參閱第一圖,本發明發光二極體驅動裝置的示意圖。如第一圖所示,本發明的發光二極體驅動裝置接收時脈輸入信號CKI以及資料輸入信號DI,產生複數個發光二極體驅動信號,用以驅動複數個連接電源VDD的發光二極體串2,並輸出時脈輸出信號CKO以及資料輸出信號DO,其中每個發光二極體串2包括複數個串接的發光二極體,且時脈輸入信號CKI係資料輸入信號DI所需的基頻信號。Referring to the first figure, a schematic diagram of a light-emitting diode driving device of the present invention. As shown in the first figure, the LED driving device of the present invention receives the clock input signal CKI and the data input signal DI, and generates a plurality of LED driving signals for driving a plurality of LEDs connected to the power supply VDD. The body string 2, and outputs a clock output signal CKO and a data output signal DO, wherein each of the light-emitting diode strings 2 includes a plurality of serially connected light-emitting diodes, and the clock input signal CKI is required for the data input signal DI The fundamental frequency signal.
要注意的是,為方便說明本發明的特徵,本實施例以三串的發光二極體當作示範性實例來做說明,但並非用以限定本發明範圍,因此實質上,發光二極體串的數目可為任意正整數。It should be noted that, in order to facilitate the description of the features of the present invention, the present embodiment is described by using three strings of light-emitting diodes as exemplary examples, but is not intended to limit the scope of the present invention, and thus substantially, the light-emitting diode The number of strings can be any positive integer.
本發明的發光二極體驅動裝置包括時脈反相單元10、觸發信號產生單元20、內部振盪器30、栓鎖信號產生單元40、時脈切換開關50、移位暫存器單元60、拴鎖暫存器單元70以及發光二極體驅動單元90,其中時脈反相單元10接收外部輸入的時脈輸入信號CKI,產生時脈輸出信號CKO,觸發信號產生單元20接收時脈輸入信號CKI,並在時脈輸入信號CKI的正緣與/或負緣時產生時脈觸發信號CKT,如第二圖的波形所示。The LED driving device of the present invention includes a clock inversion unit 10, a trigger signal generating unit 20, an internal oscillator 30, a latch signal generating unit 40, a clock switch 50, a shift register unit 60, and The latch register unit 70 and the LED driving unit 90, wherein the clock inverting unit 10 receives the externally input clock input signal CKI, generates a clock output signal CKO, and the trigger signal generating unit 20 receives the clock input signal CKI. And generating a clock trigger signal CKT at the positive edge and/or the negative edge of the clock input signal CKI, as shown by the waveform of the second figure.
內部振盪器30產生振盪信號OSC,時脈切換開關50接收振盪信號OSC以及外部時脈信號CKE,並選擇振盪信號OSC或外部時脈信號CKE當作時脈切換開關信號CKS,栓鎖信號產生單元40接收時脈切換開關信號CKS以及時脈輸入信號CKI,並在時脈輸入信號CKI的相位未改變且經超過預設時間後,產生栓鎖信號LAT,該栓鎖信號LAT為脈衝信號。The internal oscillator 30 generates an oscillation signal OSC, and the clock switch 50 receives the oscillation signal OSC and the external clock signal CKE, and selects the oscillation signal OSC or the external clock signal CKE as the clock switching switch signal CKS, and the latch signal generating unit The receiving switch switch signal CKS and the clock input signal CKI are received, and after the phase of the clock input signal CKI has not changed and the preset time is exceeded, a latch signal LAT is generated, and the latch signal LAT is a pulse signal.
移位暫存器單元60包括複數個移位暫存器,每個移位暫存器可為D型正反器,且每個移位暫存器的時脈輸入端clk接收時脈觸發信號CKT。該等移位暫存器中的第一移位暫存器的資料輸入端D接收資料輸入信號DI,在資料輸出端Q產生輸出信號,並且傳送至下一移位暫存器的資料輸入端D,以此類推。該等移位暫存器中的最後移位暫存器的資料輸出端Q係產生資料輸出信號DO。The shift register unit 60 includes a plurality of shift registers, each shift register can be a D-type flip-flop, and the clock input clk of each shift register receives the clock trigger signal. CKT. The data input terminal D of the first shift register in the shift register receives the data input signal DI, generates an output signal at the data output terminal Q, and transmits to the data input terminal of the next shift register. D, and so on. The data output terminal Q of the last shift register in the shift register generates a data output signal DO.
拴鎖暫存器單元70包括複數個拴鎖暫存器,每個拴鎖暫存器可為D型正反器。每個拴鎖暫存器的時脈輸入端clk接收栓鎖信號LAT,該等拴鎖暫存器中的第一拴鎖暫存器的資料輸入端D連接第一移位暫存器的資料輸出端Q,該等拴鎖暫存器中的下一拴鎖暫存器的資料輸入端D連接該下一移位暫存器的資料輸出端Q,以此類推。The shackle register unit 70 includes a plurality of shackle registers, and each shackle register can be a D-type flip flop. The clock input end clk of each shackle register receives the latch signal LAT, and the data input terminal D of the first shackle register in the shackle register is connected to the data of the first shift register The output terminal Q, the data input terminal D of the next latch register in the latch registers is connected to the data output terminal Q of the next shift register, and so on.
發光二極體驅動單元90連接該等發光二極體串2以及每個拴鎖暫存器的資料輸出端Q,並藉資料輸出端Q的信號以驅動該等發光二極體串2的發光二極體。The light-emitting diode driving unit 90 is connected to the light-emitting diode strings 2 and the data output terminal Q of each latch register, and drives the light-emitting diode string 2 by the signal of the data output terminal Q. Diode.
參閱第三圖與第四圖,本發明發光二極體驅動裝置的資料輸入信號波形圖。如第三圖與第四圖所示,本發明的資料輸入信號DI包括依序排列的複數個命令位元以及複數個驅動資料。命令位元至少包括選擇位元,而驅動資料可為影像資料或亮度資料,其中選擇位元可在時脈輸入信號CKI的起始正緣或負緣時擷取,而驅動資料係在時脈輸入信號CKI的正緣與負緣擷取。要注意的是,第三圖與第四圖是以起始正緣T0當作示慢性實例來表示選擇位元的擷取時間點,但本發明也可使用時脈輸入信號CKI的起始負緣當作擷取時間點。Referring to the third and fourth figures, the data input signal waveform diagram of the light-emitting diode driving device of the present invention. As shown in the third and fourth figures, the data input signal DI of the present invention includes a plurality of command bits arranged in sequence and a plurality of driving data. The command bit includes at least a selection bit, and the driving data may be image data or brightness data, wherein the selection bit may be captured at the beginning positive or negative edge of the clock input signal CKI, and the driving data is in the clock. The positive and negative edges of the input signal CKI are taken. It should be noted that the third and fourth figures show the time point of selection of the selected bit by using the starting positive edge T0 as a chronic instance, but the present invention can also use the initial negative of the clock input signal CKI. The edge is taken as a point in time.
選擇位元代表後續驅動資料的種類,如果選擇位元為高位準,則該等驅動資料為複數個影像資料,如果選擇位元為低位準,則該等驅動資料為複數個亮度資料。要注意的是,也可以在選擇位元為高位準,指定後續的驅動資料為亮度資料,而在選擇位元為低位準,指定後續的驅動資料為影像資料。每個驅動資料係用以驅動相對應的發光二極體串,例如紅色發光二極體串、綠色發光二極體串以及藍色發光二極體串,而第三圖與第四圖中的預設時間Ta係提供栓鎖信號產生單元40,用以產生栓鎖信號LAT。The selected bit represents the type of the subsequent driving data. If the selected bit is a high level, the driving data is a plurality of image data. If the selected bit is a low level, the driving data is a plurality of brightness data. It should be noted that it is also possible to select the subsequent driving data as the brightness data, and select the subsequent driving data as the low level, and specify the subsequent driving data as the image data. Each of the driving data is used to drive a corresponding LED string, such as a red LED string, a green LED string, and a blue LED string, and the third and fourth figures The preset time Ta provides a latch signal generating unit 40 for generating a latch signal LAT.
如第三圖所示,驅動資料代表影像資料,依序為紅色影像資料(如元件符號R0,…,Rn所示)、綠色影像資料(如元件符號G0,…,Gn所示)以及藍色影像資料(如元件符號B0,…,Bn所示)。當然,紅色影像資料、綠色影像資料以及藍色影像資料的次序可為任意排列,第三圖只是顯示出示範性實例而已。As shown in the third figure, the drive data represents image data, which are red image data (as indicated by component symbols R0, ..., Rn), green image data (such as component symbols G0, ..., Gn), and blue. Image data (as indicated by component symbols B0,...,Bn). Of course, the order of the red image data, the green image data, and the blue image data may be arbitrarily arranged, and the third figure merely shows an exemplary example.
如第四圖所示,驅動資料代表亮度資料,依序為紅色亮度資料(如元件符號R0,…,Rm所示)、綠色亮度資料(如元件符號G0,…,Gm所示)以及藍色亮度資料(如元件符號B0,…,Bm所示),其中元件符號x係代表冗餘資料,本發明的發光二極體驅動裝置將略過。當然,紅色亮度資料、綠色亮度資料以及藍色亮度資料的次序可為任意排列,第四圖只是顯示出示範性實例而已。As shown in the fourth figure, the driving data represents the brightness data, which is red brightness data (as indicated by component symbols R0, ..., Rm), green brightness data (such as component symbols G0, ..., Gm), and blue. The luminance data (as indicated by the component symbols B0, ..., Bm), wherein the component symbol x represents redundant data, the light-emitting diode driving device of the present invention will be skipped. Of course, the order of the red brightness data, the green brightness data, and the blue brightness data may be arbitrarily arranged, and the fourth figure merely shows an exemplary example.
參閱第五圖,本發明另一實施例發光二極體驅動裝置的示意圖。如第五圖所示,本發明的發光二極體驅動裝置包括時脈反相單元10、觸發信號產生單元20、內部振盪器30、栓鎖信號產生單元40、時脈切換開關50、移位暫存器單元60、拴鎖暫存器單元70、PWM處理單元80以及發光二極體驅動單元90,其中除PWM處理單元80以外,其他部分與第一圖的實施例相同,因此,相同的部分將不再贅述。Referring to FIG. 5, a schematic diagram of a light emitting diode driving device according to another embodiment of the present invention. As shown in the fifth figure, the LED driving device of the present invention includes a clock inversion unit 10, a trigger signal generating unit 20, an internal oscillator 30, a latch signal generating unit 40, a clock switch 50, and a shift. The register unit 60, the shackle register unit 70, the PWM processing unit 80, and the LED driving unit 90, wherein the other parts except the PWM processing unit 80 are the same as the embodiment of the first figure, and therefore, the same Some will not go into details.
PWM處理單元80連接栓鎖暫存器單元70的每個拴鎖暫存器的資料輸出端Q,並接收時脈切換開關50的時脈切換開關信號CKS,產生PWM輸出信號COUT,發光二極體驅動單元90接收PWM輸出信號COUT以驅動發光二極體串2的發光二極體。The PWM processing unit 80 is connected to the data output terminal Q of each latch register of the latch register unit 70, and receives the clock switch signal CKS of the clock switch 50 to generate a PWM output signal COUT. The body driving unit 90 receives the PWM output signal COUT to drive the light emitting diodes of the light emitting diode string 2.
參閱第六圖,本發明另一實施例發光二極體驅動裝置的資料輸入信號波形圖。如第六圖所示,資料輸入信號DI包括依序排列的複數個命令位元以及複數個驅動資料。命令位元至少包括選擇位元以及極性位元的至少其中之一,而驅動資料可為亮度資料或影像資料,其中選擇位元可在時脈輸入信號CKI的起始正緣或負緣時擷取,而驅動資料係在時脈輸入信號CKI的正緣與負緣擷取。要注意的是,第六圖是以起始正緣T0當作示慢性實例來表示選擇位元的擷取時間點,但本發明也可使用時脈輸入信號CKI的起始負緣當作擷取時間點。Referring to a sixth figure, a waveform diagram of a data input signal of a light-emitting diode driving device according to another embodiment of the present invention. As shown in the sixth figure, the data input signal DI includes a plurality of command bits arranged in sequence and a plurality of driving data. The command bit includes at least one of a selection bit and a polarity bit, and the driving data may be brightness data or image data, wherein the selection bit may be at the beginning positive or negative edge of the clock input signal CKI撷The drive data is taken at the positive and negative edges of the clock input signal CKI. It should be noted that the sixth figure shows the extraction time point of the selection bit by using the initial positive edge T0 as a chronic example, but the present invention can also use the initial negative edge of the clock input signal CKI as the 撷. Take the time.
在時脈輸入信號CKI的起始正緣或起始負緣所擷取的命令位元可為選擇位元或極性位元,可依系統需求而定,並非用以限定本發明的範圍。選擇位元的功能如上所述,而極性位元係用以指定PWM處理單元的PWM輸出信號COUT之輸出極性,比如當極性位元為低位元時,PWM輸出信號COUT為正向PWM信號,而當極性位元為高位元時,PWM輸出信號COUT為負向PWM信號。當然,本發明也可使用,當極性位元為低位元時,PWM輸出信號COUT之輸出極性為負向,而當極性位元為高位元時,PWM輸出信號COUT之輸出極性為正向。The command bit retrieved at the beginning or the leading edge of the clock input signal CKI may be a selected bit or a polar bit, which may be determined by system requirements and is not intended to limit the scope of the present invention. The function of selecting a bit is as described above, and the polarity bit is used to specify the output polarity of the PWM output signal COUT of the PWM processing unit. For example, when the polarity bit is a low bit, the PWM output signal COUT is a forward PWM signal, and When the polarity bit is a high bit, the PWM output signal COUT is a negative PWM signal. Of course, the present invention can also be used. When the polarity bit is a low bit, the output polarity of the PWM output signal COUT is negative, and when the polarity bit is a high bit, the output polarity of the PWM output signal COUT is positive.
要注意的是,第六圖顯示選擇位元與極性位元係分別由時脈輸入信號CKI的正緣與負緣所擷取,但是本發明可使用相鄰的正緣擷取選擇位元與極性位元,或也可使用相鄰的負緣,因此本發明並不限定擷取選擇位元與極性位元的時脈輸入信號CKI之時序。It should be noted that the sixth figure shows that the selection bit and the polarity bit are respectively taken from the positive and negative edges of the clock input signal CKI, but the present invention can use the adjacent positive edge to select the selected bit and The polarity bits, or adjacent negative edges, may also be used, so the present invention does not limit the timing of the clock input signal CKI for the selection bits and polarity bits.
本發明的發光二極體驅動裝置可以串接方式連接,只需將每個發光二極體驅動裝置的資料輸出信號DO與時脈輸出信號CKO分別連接到下一發光二極體驅動裝置的資料輸入信號DI與時脈輸入信號CKI,即可用以增加發光二極體串的數目,而不需其他控制信號,因此簡化整體系統配線,並降低系統成本,同時提高系統的可靠度。The LED driving device of the present invention can be connected in series, and only the data output signal DO and the clock output signal CKO of each LED driving device are respectively connected to the data of the next LED driving device. The input signal DI and the clock input signal CKI can be used to increase the number of LED strings without other control signals, thereby simplifying overall system wiring, reducing system cost, and improving system reliability.
以上所述者僅為用以解釋本發明之較佳實施例,並非企圖據以對本發明做任何形式上之限制,是以,凡有在相同之發明精神下所作有關本發明之任何修飾或變更,皆仍應包括在本發明意圖保護之範疇。The above is only a preferred embodiment for explaining the present invention, and is not intended to limit the present invention in any way, and any modifications or alterations to the present invention made in the spirit of the same invention. All should still be included in the scope of the intention of the present invention.
2...發光二極體串2. . . Light-emitting diode string
10...時脈反相單元10. . . Clock inversion unit
20...觸發信號產生單元20. . . Trigger generating unit
30...內部振盪器30. . . Internal oscillator
40...栓鎖信號產生單元40. . . Latch signal generating unit
50...時脈切換開關50. . . Clock switch
60...移位暫存器單元60. . . Shift register unit
70...栓鎖暫存器單元70. . . Latch lock register unit
80...PWM處理單元80. . . PWM processing unit
90...發光二極體驅動單元90. . . LED driver unit
B0...藍色影像資料或藍色亮度資料B0. . . Blue image data or blue brightness data
Bn...藍色影像資料或藍色亮度資料Bn. . . Blue image data or blue brightness data
CKI...時脈輸入信號CKI. . . Clock input signal
CKO...時脈輸出信號CKO. . . Clock output signal
COUT PWM...輸出信號COUT PWM. . . output signal
DI...資料輸入信號DI. . . Data input signal
DO...資料輸出信號DO. . . Data output signal
CKE...外部時脈信號CKE. . . External clock signal
CKT...時脈觸發信號CKT. . . Clock trigger signal
CKS...時脈切換開關信號CKS. . . Clock switch signal
G0...綠色影像資料或綠色亮度資料G0. . . Green image data or green brightness data
Gn...綠色影像資料或綠色亮度資料Gn. . . Green image data or green brightness data
LAT...栓鎖信號LAT. . . Latch signal
OSC...振盪信號OSC. . . Oscillating signal
R0...紅色影像資料或紅色亮度資料R0. . . Red image data or red brightness data
Rn...紅色影像資料或紅色亮度資料Rn. . . Red image data or red brightness data
T0...起始正緣或負緣T0. . . Starting positive or negative margin
Ta...預設時間Ta. . . Preset time
VDD...電源VDD. . . power supply
第一圖為本發明發光二極體驅動裝置的示意圖。The first figure is a schematic diagram of a light-emitting diode driving device of the present invention.
第二圖為本發明發光二極體驅動裝置的時脈波形圖。The second figure is a clock waveform diagram of the light-emitting diode driving device of the present invention.
第三圖為本發明發光二極體驅動裝置的資料輸入信號波形圖。The third figure is a waveform diagram of data input signals of the LED driving device of the present invention.
第四圖為本發明發光二極體驅動裝置的另一資料輸入信號波形圖。The fourth figure is a waveform diagram of another data input signal of the LED driving device of the present invention.
第五圖為本發明另一實施例發光二極體驅動裝置的示意圖。FIG. 5 is a schematic diagram of a light emitting diode driving device according to another embodiment of the present invention.
第六圖為本發明另一實施例發光二極體驅動裝置的資料輸入信號波形圖。FIG. 6 is a waveform diagram of a data input signal of a light-emitting diode driving device according to another embodiment of the present invention.
2...發光二極體串2. . . Light-emitting diode string
10...時脈反相單元10. . . Clock inversion unit
20...觸發信號產生單元20. . . Trigger generating unit
30...內部振盪器30. . . Internal oscillator
40...栓鎖信號產生單元40. . . Latch signal generating unit
50...時脈切換開關50. . . Clock switch
60...移位暫存器單元60. . . Shift register unit
70...栓鎖暫存器單元70. . . Latch lock register unit
90...發光二極體驅動單元90. . . LED driver unit
CKI...時脈輸入信號CKI. . . Clock input signal
CKO...時脈輸出信號CKO. . . Clock output signal
DI...資料輸入信號DI. . . Data input signal
DO...資料輸出信號DO. . . Data output signal
CKE...外部時脈信號CKE. . . External clock signal
CKT...時脈觸發信號CKT. . . Clock trigger signal
CKS...時脈切換開關信號CKS. . . Clock switch signal
LAT...栓鎖信號LAT. . . Latch signal
OSC...振盪信號OSC. . . Oscillating signal
VDD...電源VDD. . . power supply
Claims (12)
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TW98120126A TWI389453B (en) | 2009-06-16 | 2009-06-16 | Light emitting diode drive |
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TW98120126A TWI389453B (en) | 2009-06-16 | 2009-06-16 | Light emitting diode drive |
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TWI389453B true TWI389453B (en) | 2013-03-11 |
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