TWI297951B - Improved interdigitated capacitive structure for an integrated circuit - Google Patents

Improved interdigitated capacitive structure for an integrated circuit Download PDF

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Publication number
TWI297951B
TWI297951B TW95120618A TW95120618A TWI297951B TW I297951 B TWI297951 B TW I297951B TW 95120618 A TW95120618 A TW 95120618A TW 95120618 A TW95120618 A TW 95120618A TW I297951 B TWI297951 B TW I297951B
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TW
Taiwan
Prior art keywords
plate
layer
polarity
type
extension
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TW95120618A
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Chinese (zh)
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TW200727469A (en
Inventor
Yueh You Chen
Chung Long Chang
Chih Ping Chao
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Taiwan Semiconductor Mfg
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Priority to US11/328,502 priority Critical patent/US8169014B2/en
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Publication of TW200727469A publication Critical patent/TW200727469A/en
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Publication of TWI297951B publication Critical patent/TWI297951B/en

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    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223Capacitor integral with wiring layers
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

119. The invention relates to a capacitor in an integrated circuit, and more particularly to an improved integrated circuit interdigitated capacitor. ... [Prior Art] * The overall s 'capacitance in the integrated circuit is widely used, for example, for band pass filter, phase locked loop (PLL), dynamic random access Take passive components of memory (dynamic rand〇m access memory; DRAM), and other components. In some cases, components that are common in some integrated circuits will exhibit the function of their potential capacitors. In some active integrated circuit components such as bipolar and metal-oxide-semic cmductor (MOS) transistors and combined with ώ * ^ (inherent) t ^ 1 ^ ^ ^ ^ # ^ junction). In fact, in some specific forms of transistors, the depletion region in the electrical junction will have the equivalent of a parallel capacitor. The capacitor can be a capacitor with a fixed capacitance value, or The capacitance value can be a function of the voltage value applied to the electrical junction described above.亦 It is also potential to have some specific passive components such as polytecrosic and metal wires between each other or corresponding to other capacitors. However, for engineers to use certain potential capacitors to achieve certain specific effects, the first hang is to tie hands and feet. For example, this 0503-A31956TWF/dwwang 1297951 potential capacitor properties are often by-products of specific components for a certain function, and their priority is not higher than the main function of the component. In addition, the above-mentioned potential capacitors are accompanied by specific components, and the nature of the capacitors is also present at the position of the components in the circuit and cannot be changed. Therefore, integrated circuits often use dedicated capacitors in their circuits. The structure of a conventional capacitor is formed by isolating two conductors with a dielectric material, and in the integrated circuit, a dielectric is interposed between two flat conductors. However, one of the biggest drawbacks is that Take up a considerable amount of wafer area. A metal-insulator-metal (MIM) capacitor is one of the capacitor structures that can increase the capacitance value. The simplest configuration is to stack horizontally parallel metal plates into several layers with dielectric layer spacing. Between the metal layers, the two metal plates connected via the dielectric layer become the two poles of the capacitor. The vertical stacking of the metal plates is simple, and a larger unit area capacitance value can be provided as compared with the case where only two conductive surfaces are provided. However, despite the simplicity of the construction, multi-layer MIM capacitors often require additional processing steps, adding to the burden of many manufacturing costs. A metal-oxide-metal (MOSM) capacitor is another capacitor structure that increases the capacitance value. It typically contains a conductive plate that is separated by a dielectric to form the two poles of the capacitor. The benefit of MOM capacitors is that they can be done using existing processes. For example, a dual damascene process for a metallization process for copper interconnects can be used to form a stack of vias and trenches filled with copper, wherein 0503-A31956TWF/dwwang 1297951 is an oxide dielectric Separating two or more copper-filled vias and trenches forms a capacitor. Compared to conventional capacitors, MOM capacitors effectively provide a large capacitance per unit area. However, MOM capacitors also require more complex designs, which in turn offsets the benefits of using standard semiconductor processes. There are currently cases where MIM capacitors and MOM capacitors are used at the same time. However, the combination of the two needs to be formed in different layers of the integrated circuit, and a MIM capacitor is stacked on a MOM capacitor. Therefore, when the capacitance value is increased, the height of the wafer is also increased, which increases the complexity of design and process. In addition, some MOM capacitors are formed by vertically stacking MOM layers. When the capacitance value of the stacked MOM capacitors is increased, the alignment error between the layers increases the uncertainty of the process and causes poor performance of the components. influences. The alignment error between the layers will at least cause the actual capacitance value to deviate from its original design value, and the performance of other components corresponding to the capacitor cannot be estimated, and the chain effect will spread to the entire wafer. SUMMARY OF THE INVENTION In view of the above, it is an object of the present invention to provide a capacitor structure of an integrated circuit and a method of fabricating the same to overcome the disadvantages of the prior art. In order to achieve the above object of the present invention, the present invention provides a capacitor structure of an integrated circuit comprising: a first plate layer comprising a series of substantially parallel, mutually interdigitated first plates, each of the foregoing a plate belonging to the first type polarity or the second type polarity respectively, belonging to the first type pole 0503-A31956TWF/dwwang 7 12.97951 'w plate and the above second plate layer belonging to the second type polarity - a plate-like value, the first extension of the first-different layer on the first dielectric layer 'contains a series of substantially parallel, mutually interdigitated first extension: an extension plate The first extension plate belonging to the first type polarity or the second type polarity to the first type polarity is spaced apart from the first extension plate belonging to the second type electrode, and each of the first extension plates is disposed at a polarity different from the (four) polarity The conductive layer on the upper surface of each of the first plate-shaped plates is respectively connected to the first extending layer, respectively, and has a polarity of a T-type polarity or a polarity of a second type, and belongs to the first type of the first type and the second type of the second type. The above-mentioned first plate-shaped (four) 4 each of the first-conducting layers are respectively arranged with the same type of polarity for each of the first-extension plates; and - the second plate is formed with the second layer of the cans f; the inclusion-system is: the anti-large object, each of the second plates The manufacture of the capacitor structure in which the first-type polarity or the first-order polarity is respectively disposed in the phase-type polarity or the first-order polarity, and the present invention provides an integrated circuit, comprising: forming a first plate layer, including a The series is substantially: the first plate of the first item 1 and the first plate of the second type polarity and the first plate of the second type of polarity Inter-interlayer-dielectric layer covering the 4th-plate of the first plate-like layer; forming a first extension layer on the first dielectric layer 0503-A31956TWF/dwwang 8 1297951, including a series of substantially parallel, mutually intersecting first extension plates, each of the first extension plates respectively belonging to a first type polarity or a second type polarity, the first extension plate belonging to the first type polarity and belonging to the second type polarity The first extension plates are spaced apart from each other, and each of the first extension plates is The first conductive layer is formed on the first type of the first plate, and the first conductive layer is connected to the first extending layer, respectively, belonging to the first type polarity or the second type polarity, belonging to the first type The first plate member having a polarity is spaced apart from the first plate member belonging to the second type polarity, and each of the first conductive layers is disposed on each of the first extension plates of the same polarity; and forming a The second plate layer is connected to the first conductive layer, and comprises a series of substantially parallel and mutually intersecting second plates, each of the second plates being of a first polarity or a second polarity. Each of the second plate members is disposed on each of the first conductive layers of the same polarity. A feature of the present invention is that an MOM capacitor and a MIM capacitor can be effectively combined, and the first plate substantially parallel and mutually interdigitated forms a MOM capacitor, and the first dielectric layer and the first extension layer are substantially The parallel, progenitor first plate increases the nature of the MIM capacitor. Therefore, the MIM capacitor is connected between the MQM capacitors of the respective layers by the conduction layer. Another feature of the invention is that it reduces the thickness of the wafer required for a particular capacitance per unit area. When increasing the capacitance value of the MIM capacitor between the MOM capacitors of each layer, the plate area and capacitance value of the MOM capacitor of the lower layer are increased, and the plate of the 0503-A31956TWF/dwwang 9 1297951 MOM capacitor between the layers thereof is increased. The area and capacitance of the material, and the electrode area and capacitance of the MOM capacitor between the conduction layers of the same layer. Therefore, it increases the effective capacitance per unit area of the MOM capacitor without increasing the process steps and wafer thickness. Another feature of the present invention is that the effect caused by the alignment error can be improved. The MIM capacitor incorporated between the two layers of the present invention is connected to its superstructure via a conductive layer which adds structural support and compensates for alignment errors between the plates of the MOM capacitor. In addition, the capacitive effect of the _ MIM capacitor and the conduction layer improve the capacitive effect caused by the alignment error between the plates of the MOM capacitor. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features, and advantages of the present invention will become more <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; It is a schematic view showing the structure of the capacitor 100 of the integrated body* circuit of the present invention. The capacitor 100 includes a capacitive plate layer 102 comprising a series of substantially parallel, interdigitated capacitive plates 110, 112, 114, and 116, each of which belongs to the Type 1 polarity or Type 2 polarity, marked as a positive (+) or negative (one). As shown in the figure, each of the capacitor plates is configured to be mutually interdigitated, and different polarities are interdigitated, wherein the capacitor plate 110 is a positive electrode, the capacitor plate 112 is a negative electrode, and the capacitor plate 114 is a positive electrode. The capacitor plate 116 is a negative electrode. 0503-A31956TWF/dwwang 10 1297951 #明。 The person skilled in the art can understand that the above-mentioned slabs/electrical slabs form a thin layer of thin, electrically conductive plates as an example. "Technology, the domain has the usual knowledge that the plate shape can be changed according to its needs", or other structures are formed on each plate. • - The dielectric layer 1〇4 is placed in the capacitor plate On the layer 102, as shown in FIG. 1, the dielectric layer 104 includes dielectric plates 120, 122, 124, and _126' respectively placed on the corresponding capacitor plates 110, 112, 114, and 116. 'Each dielectric plate 120, 122, 124, and 126 are thinner than the capacitive plates 110, 112, 1M, and 116 to which they are connected. It is understood that other structures described later may be separated by a dielectric material (not shown). The extension layer 106 is disposed on the dielectric layer 104, which includes the extension plates U0, 132, I34, and I%, Each extension plate belongs to a first type polarity or a second type polarity, and the polarity of each extension plate is respectively positive and downward

The above capacitive plates of Lufang have opposite polarities. For example, the extension plate DO; is the negative electrode and the capacitance plate 11 is the positive electrode. Similarly, the extension plate 132 is the positive electrode and the capacitive plate 112 is the negative electrode. FIELD OF THE INVENTION A person skilled in the art will appreciate that a combination of a corresponding extension plate, a dielectric plate and a capacitive plate of opposite polarity forms a mim capacitor structure. The extension layer 106 is electrically connected to a capacitor plate (not shown) therethrough via a conductive layer 108. Each of the conduction elements in the conduction layer 1 〇 8 is of a first type polarity or a second type polarity, respectively, and has the same polarity as the extension plate connected to its 0503-A31956TWF/dwwang n 1297951, respectively. For example, the extension plate 2, #—the sentence pole, and the conduction elements 140, 142, 144, 146 also Λ Λ · 门 门 门 祁 , , , , , , , , , , , , , , , , , , , , , , The elements 15〇, 152, Ί ς/ΐ 156 are also positive electrodes; in addition, the extension plate 134 is a negative electrode, and the conduction members 160, 162, 164, and 166 are also negative electrodes; further, the extension plate = 136 is The positive electrode, and the conduction elements ι7〇, I?], 174, disk preparation ^, and W6 are also positive 〇 _ capacitor plate layer 102, dielectric layer 1 〇 4, extension layer 1 〇 6, and conduction The layer 108 is a stacked capacitor unit. Therefore, the second capacitor 1〇〇 can be stacked on the first capacitor 100, and the conduction layer 108 of the first battery 100 is electrically connected to the second capacitor 1 The polarity of the crucible is the same: the same capacitor plate layer 102. For example, when the second capacitor 1 is stacked on the conduction layer 10 (10) of the first capacitor 100, the conduction element is connected. The capacitance plate of 140, ^ is a negative electrode, and the capacitor plate layer connecting the conduction elements U0, ^2, 1S4, and "56" is a negative electrode. Additionally, in a preferred embodiment, an additional capacitive plate layer 102 is electrically coupled to the conductive layer of the last layer of the series of stacked dielectrics 100. Referring to Fig. 2, a side view showing the structure of a capacitor 200 of the integrated circuit of the present invention. The capacitor 200 is comprised of two stacked capacitors 100 and has a final cap layer i 〇 2c on the uppermost layer of conductive layer 108b. For the sake of more clarity, each of the capacitive plate layers 1 〇 2 lists only three of the capacitor plates. For example, the capacitor plate layer 1〇2a, the series 0503-A31956TWF/dwwang 1297951, the capacitor plate 202 of the negative electrode, the capacitor plate 204 of the positive electrode, and the capacitor plate 206 of the negative electrode. The art of the invention has the general knowledge that the number of the aforementioned plates can be changed according to their needs, or that other structures are formed on the respective plates. The dielectric layer 104a is a series of three dielectric plates 21, 212, and 214, and the extension layer 1 〇 6a is a series of three extension plates 220, 22, and 224. Each of the above-described extension plates has a polarity opposite to that of the capacitor plate underneath. For example, the extension, the plate 22 is a positive electrode, and the capacitive plate 202 is a negative electrode. ‘The pass layer 108a series has three of the conduction elements, and 23^. As in the predecessor, the poles of each of the conducting elements are connected to the same underlying extension plates and are also identical to the capacitive plates attached thereto. The polarity (positive electrode) of the example tG 23G is the same as that of the extension plate 220, and is also the same as the capacitance plate 240. The 100〇t valley plate layer is connected above the conduction layer 1G8a, and the capacitor plate is Φ ^ T 1 wT ^ ^ ^^ 1 〇 8b ^ ^ ^ t ^ 1 200 number. Therefore, the capacitor can be changed. Reduce the wafer area of the MOM capacitor. ^ For example, the capacitor 200 has a value of 29 电容 between the capacitor plates 250 and 252 of the capacitor plate of the heat sink layer of 50 盥 夕 I I ^ ^ C 2C. Between the conduction elements 26G and 262 The Mim1 brought by the electric j layer 1〇8b and the dielectric plate can also provide an additional 0503-A31956TWF/dwwang 12 stomach 97951 capacitance value from the extension plate tantalum capacitor. For example, the capacitor 200 has a stretch plate 270 of the extension layer 106b, a dielectric plate 272 of the dielectric layer 104b, and a capacitor plate 242 of the capacitor plate layer 1〇2b. Capacitance value 294. Similarly, the valley is an extension plate 280 of the extension layer 106b, a dielectric plate 282 of the dielectric layer 104b, and a capacitor plate 244 of the capacitor plate layer 102]3. Between there, there is a capacitance value of 296. In addition, each extension plate also provides an indication of increased capacitance values. For example, the electric grain 200 has a capacitance value 298 between the extension plates 22A and 222 of the extension layer i〇6a. It is within the ordinary skill of the art to understand that the capacitance value of uranium is not to be construed as the only capacitive representation of the capacitor. The capacitor plate, the extension plate, and the conductive member comprise a conductive material including, but not limited to, copper, aluminum, titanium nitride, a doped ion doped germanium, or any combination thereof. The capacitance plate, the extension plate, and the components of the conduction member may be different in two or more, and are not necessarily identical. The dielectric plate comprises a dielectric material including, but not limited to, tantalum bismuth, tantalum nitride, pentoxide, or any combination thereof. Those skilled in the art can understand that the selection of the above-mentioned conductive material and dielectric material can be different depending on factors such as the process and the use of the capacitor. Referring to Fig. 3, a side view showing the structure of a capacitor 300 of the integrated circuit of the present invention. As previously mentioned, the capacitor plate layer 1〇2a 0503-A31956TWF/dwwang 14 1297951 and the dielectric layer includes a capacitor plate 31(), 312. 104a includes a dielectric plate. As shown, the extension &amp; (3) 1〇6a includes a plurality of discrete blocks 320, 322, and 324. Ancient ", - a block is electrically connected to the conductive layer i 〇 8a, ^ 7 ° ', for example, the block 320 is electrically connected to the conductive element 330. As described above, grab the V through layer 1 〇 8 a It is connected to a capacitor plate of the same polarity of the slab layer lG2b. Therefore, the capacitor (10) may comprise a block-like extension; the technical field of the invention has an extended plate shape which is generally known to those skilled in the art. Please refer to Fig. 4, η, "π 〆 is a side view, showing the meaning of the capacitor π of the I# circuit of the present invention, 槚 + 槚, 、, ° °. As described, the capacitor plate layer l〇2a includes a capacitor plate 4]n · 入 昆 Λ Λ Ι 人 人 人 人 人 人 人 人 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 介 1 1 1 1 1 1 An extension plate 420. The conduction layer 1〇8a includes a vertical door 2〇 extending in the horizontal direction, which is quite different from that shown in the figures i to 3. As described above, the groove is stored... (3) The V-shaped member 43 is electrically connected to the Ikxian' DA; t J Van Gogh plate 440 of the same capacitive plate layer 102b of the same polarity. Therefore, the electric valley 100 can include vertical trench-type conductive elements. Those skilled in the art will appreciate that the formation of the above-described vertical trench-type conductive elements can simplify the process. Please refer to Figures 5A-5L for a series of cross-sectional views. The manufacturing process of the capacitor structure of the integrated circuit of the present invention shown in Fig. 2 is shown in Fig. 2. For the convenience of the flow, only two positive conductive plates and the structure formed thereon are shown. The technical field of the invention has the usual 15 0503-A31956TWF/dwwang 1297951. It is understood by those skilled in the art that other structures or elements can be simultaneously formed in the structure described later. Referring to FIG. 5A, a metal layer 520 is for example A chemical vapor deposition method, a physical vapor deposition method, or other suitable method is deposited on the spacer layer 51. In some embodiments, an anti-reflection layer may be deposited on the metal layer 520. Then, A photoresist layer 530 is formed on the metal layer 520'. 曰_ The photoresist layer 530 is then exposed under a mask having a pattern including the aforementioned conductive plate and other circuit components. , Then after developing the photoresist layer 530 exhibits the pattern, the pattern shown in FIG. 5B includes a first 532 and the plate 534. The next invention belongs TECHNOLOGY

It is known to those of ordinary skill in the art that the uncovered metal layer MO is removed by etching to form conductivity = 522 and 524 as shown in Fig. 5c. As shown in Fig. 5D, an inter-metal dielectric layer 550 is formed between the conductive lug plates 522 and 524, and integrally covers the conductive plates 522 and 524, and other regions thereof. The upper surface of the intermetal dielectric layer 550 can be planarized by, for example, chemical mechanical polishing. Then, another photoresist layer 56 is formed on the inter-metal dielectric layer 550, and then an exposure and development process is performed to remove the photoresist layer 560 at the position of the dielectric plate. The shaped holes 562 and 564 are not as shown in FIG. 5E. Next, the inter-metal dielectric layer 550 1 is exposed to expose the underlying pattern, and then, as shown in FIG. 5F, a dielectric material is deposited to form a dielectric. Quality 0503-A31956TWF/dwwang 16 1297951 Plates 552 and 554. In another embodiment, the dielectric plates 552 and 554 may be made of the same material as the intermetal dielectric layer 550, and the etching of the intermetal dielectric layer 550 is stopped in the underlying structure (for example, the conductive plate). Above 522 and 524) to form dielectric plates 552 and 554 of a desired shape. • Next, a process of exposure development is performed again to remove the photoresist layer 570 on the M extension plate, leaving the holes 572 and 574 as shown in Fig. 5G. Next, the intermetal dielectric layer 550 is etched through to the underlying layer structure (dielectric plates 552 and 554), and then a conductive material is deposited to form the extended plates 582 and 584. Next, as shown in Fig. 51, an interlayer dielectric layer 590 is formed on the above structure. In another embodiment, the interlayer dielectric layer 590 is made of the same material as the intermetal dielectric layer 550. The upper surface of the interlayer dielectric layer 590 can also be planarized using techniques well known to those skilled in the art. Another photoresist layer 600 is then formed over the interlayer dielectric layer 590. The process of exposing the film is performed by removing the photoresist layer 600 at the position of the conductive element, leaving holes 602 and 604. The interlayer 'dielectric layer 590# is then passed through to the surface of the underlying structure (e.g., the extended plates 582- and 584), and the conductive elements 592 and 594 are formed as shown in FIG. 5J as shown in FIG. 5K. The conductive elements 592 and 594 are filled with metal and a gold-plated layer 610 is formed. Next, a photoresist layer (not shown) is formed, and the photoresist layer is exposed under a mask having a pattern, and the pattern includes the pattern of the conductive plate and other circuit components, and then 0503 A31956TWF/dwwang 17 1297951 The photoresist layer is developed to exhibit the pattern, and then etched and the remaining photoresist layer is removed to form conductive plates 622 and 624 electrically connected to the conductive members 592 and 594. Figure 5L shows. Next, an inter-metal dielectric layer 620 is formed between the conductive plates 592 and 594 and covers other regions than the other conductive plates 592 and 594. By the above steps, the capacitor structure of the integrated circuit of the present invention is formed. Those skilled in the art will appreciate that the above steps can be repeated to form another capacitor unit on the intermetal dielectric layer 620, with conductive plates 622 and 624 as their capacitive plate layers 102. The present invention has been described above by way of a preferred embodiment, and is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application attached. 0503-A31956TWF/dwwang 18 1297951 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing a capacitor structure of an integrated circuit of a preferred embodiment of the present invention. Fig. 2 is a side elevational view showing the capacitor structure of the integrated circuit of the preferred embodiment of the present invention. 3 and 4 are a series of side views showing the capacitor structure of the integrated circuit of the other embodiment of the present invention. Figs. 5A to 5L are a series of sectional views showing the manufacturing process of the capacitor structure of the product &gt; body circuit of the present invention. [Description of main component symbols] 100, 200, 300, 400 to capacitors; 102, 102a, 102b, 102e to capacitor plate layer; 104, 104a, 104b to dielectric layer, 106, 106a, 106b to extension layer; 108, 108a, 108b~ conduction layer; 110, 112, 114, 116, 202, 204, 206, 240, 242, 244, 250, 252, 310, 340, 410, 440~ capacitor plate; 120, 122, 124, 126, 210, 212, 214, 272, 282, M2, 412~ dielectric plate; 130, 132, 134, 136, 220, 222, 224, 270, 280, 320, 322, 324, 420 ~ extension plate; 140, 142, 144, 146, 150, 152, 154, 156, 160, 162, 164, 166, 170, 172, 174, 176, 230, 232, 234, 0503-A31956TWF/dwwang 19 1297951 260, 262, 330, 332, 334, 430~ conductive element; 510~ isolation layer; 520~ metal layer; 522, 524~ conductive plate; 530~ photoresist layer; 532, 534~ plate; 550~intermetal dielectric layer; 552, 554~ dielectric plate; 560~ photoresist layer; 562, 564~ hole; 570~ light Resistive layer; 572, 574~ hole; 582, 584~ extension plate; 590~ interlayer dielectric layer; 592, 594~ conduction element; 600~ photoresist layer; 602, 604~ hole; 610~ metal layer; ~ inter-metal dielectric layer; 622, 624 ~ conductive plate.

0503-A31956TWF/dwwang 20

Claims (1)

1297951 X. Patent application scope: 电容器 A capacitor structure of an integrated circuit, comprising: a first plate layer comprising a series of substantially parallel, mutually erdigitated first plates, each of which a plate is respectively of a first-type polarity or a second-type polarity, and the first plates belonging to the first-type polarity are arranged with the second plates belonging to the second-type polarity (four), · a first dielectric layer covering the first extension layer of the first plate layer on the first dielectric layer, comprising - a series of subordinates: a first extension plate The first extension plate has a polarity, or a polarity of the second type, and the extensions belonging to the first type of polarity are: the extension plates of the first extension type (four) and the second extension type are respectively disposed in different polarities The mouth. The other one is above the plate; the other is = column 1 - the conduction layer is respectively connected to the first extension layer, respectively, the first "plate" = or the second type of polarity, belonging to the first type of polarity of the Li Each of the second type of polarity _^, the first one of the first conductive layer is disposed on each of the extension plates of the same polarity; and the column "·: the objects belong to the first type of polarity; each of the The two plates are respectively disposed in the capacitors of the integrated circuit of the first and second plates of the first and second plates of the first and second plates of the first and fourth plates of the Japanese Patent Application No. 1 Each of the first extension plates includes a substantially continuous groove. The capacitor of the integrated circuit according to claim 1, wherein each of the first extension plates comprises A capacitor or a port structure of the integrated circuit according to claim 1, wherein each of the first conductive layers includes a substantially continuous vertical groove. The capacitor crying structure of the integrated circuit of the item, wherein each of the first conductive layers comprises a complex The capacitor of the integrated circuit of claim 5, wherein each of the first extension plates comprises a plurality of blocks, each of the blocks respectively And a capacitor structure of the integrated circuit according to claim 1, further comprising: a second dielectric layer covering the second plate layer Each of the second plates; /, "the second extension layer on the second dielectric layer, comprising a series of real:: two mutually extending second extension plates' each of the second extension plates a sub-j-; a di-type polarity or a second-type polarity, the 1^-extension plate belonging to the first-type polarity and the second extension plates belonging to the second-type polarity are disposed apart from each other by the second extension plate Arranging respectively on the second plate with different polarity of the same type; - the first: conduction layer of the series is respectively connected to the second extension layer, and belongs to the first-long or second-type polarity, belonging to the first type Polar words 0503-A31956TWF/dwwang 22 1297951 and these are the second type of polarity The plate 2 1 = 'each of the second conductive layers are respectively disposed on each of the second extension plates thereof, and a third plate layer is connected to the second conductive lines 1 (four) in parallel and mutually interdigitated The third plate, each of the first: plate objects belong to the first type of polarity 戋 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ on the second conductive layer of the same polarity. δ. A method of manufacturing a capacitor structure of an integrated circuit, comprising: a further plate-like layer comprising a series of substantially parallel, phase, and d-plates, each of the first plate-like shape In the first-type polarity or the second-type polarity, belonging to the first pole, - the plate and the second type of polarity: the mutual spacing configuration; the first mutual-plate two first dielectric layer covering the first Each of the first layer of the plate layer forms a first extension layer on the first dielectric layer, and the sides of the first extension plate which are parallel in shape and cross each other belong to the first type of polarity or Chu Yijing The p-extension plate ★Hai's first sexuality belongs to the first-type polarity of the butterfly-plate. The first conduction layer of the Lai (4)-type extreme acoustic series is respectively connected to the first extension (four) of the brother-plate and belongs to The first plate-shaped crucibles 503-A31956TWF/dwwang 23 1297951 of the second type of polarity are disposed, and each of the first conductive layer-fittings f is on each of the extension plates; and/or a second plate layer is formed Connected to the first conductive layers, comprising substantially parallel, mutually reconcilable second plates, each of the second subordinates - of a polar-polar or a second type, each of the second blade plate disposed respectively at each of its polarity of the same type - of the conducting layer. A capacitor of an integrated circuit according to item 8 of the German patent range: a manufacturing method of the crucible, wherein each of the first-extended grooves. Beibeigong reverse (4) Capacitor of the integrated circuit described in the eighth section of the patent scope. And a method for manufacturing a garment, wherein each of the first extension plates comprises a plurality of blocks of a capacitor crying structure, such as the integrated circuit of claim 8 of the patent scope, wherein the vertical and the vertical Groove. The younger brother has a consistent quality and has been perceived by the media. The capacitor i of the integrated circuit described in item 8 of the monthly patent. Each of the first-conducting layers includes a plurality of capacitors t-structures of the integrated circuit described in item 12 of the patent specification: the manufacturing method 'where the first-extending plate includes a plurality of blocks' Each of the (four) objects is respectively connected to the plurality of vertical pillars - 0 (four) L4 · ^ Please apply the capacitor structure of the integrated circuit of the eighth aspect of the patent scope, further comprising: 0503-A31956TWF/dwwang 24 1297951 a second electric layer covering the first plate of the first layer; the second extending layer on the second dielectric layer, comprising a series of柹 七 七 七 七 七 七 七 七 七 七 七 七 锭 锭 锭 锭 锭 锭 锭 锭 锭 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The second upper-side extended coffee layer, the second conductive layer is respectively connected to the second extension: the -" brother-type polarity or the second-type polarity, belonging to the first-type pole: W two brothers two plates The object and the second type are spaced apart from each other, and the two are a plate-shaped pole. The 28 ΐ ΐ layer (4) is disposed on each of the 5 弟 二 2 extension plates of the same generation; and the / ΐ ΐ - the third plate layer is connected to the second conduction layers, including a 糸 贯 质 并士^3 α The third plate of the tenth cymbals, each of which belongs to the first-type polarity or the second-type polarity, and each of the third-shaped knives is disposed in the same polarity Each of the second conductive layers. 0503-Α31956TWF/dwwang 25
TW95120618A 2006-01-09 2006-06-09 Improved interdigitated capacitive structure for an integrated circuit TWI297951B (en)

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US8169014B2 (en) 2012-05-01
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EP1806783B1 (en) 2009-12-16

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