TWI288313B - A means for output power compensation and a switching control apparatus - Google Patents

A means for output power compensation and a switching control apparatus Download PDF

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Publication number
TWI288313B
TWI288313B TW94115438A TW94115438A TWI288313B TW I288313 B TWI288313 B TW I288313B TW 94115438 A TW94115438 A TW 94115438A TW 94115438 A TW94115438 A TW 94115438A TW I288313 B TWI288313 B TW I288313B
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signal
current
voltage
power
output
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TW94115438A
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Chinese (zh)
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TW200639612A (en
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Ta-Yung Yang
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System General Corp
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Abstract

A means for output power compensation and a switching control apparatus in power supplies are proposed. A waveform generator receives a saw-tooth signal from an oscillator to generating a periodical limit signal. A comparative unit receives a current-sense signal and the periodical limit signal to generate a reset signal. A synchronous output unit couples to the comparative unit, the oscillator and a power switch. The synchronous output unit generates a switching signal to the power switch in response to a pulse signal and the reset signal. Therefore, an output power compensation of the power supply under various input voltages is achieved.

Description

.1288313 ^ IX. Description of the Invention: [Technical Field] The present invention relates to a method for output power compensation and a switching control device, and in particular, the use of the periodic three-stage limit of the output in the power supply industry The number is compared with the obtained current sensing signal, and is used as a method for output power compensation under high and low input voltages of the power supply and a switching control device thereof. [Prior Art] • Pulse width modulation PWM is a conventional technique used to control and stably adjust the output power of a power supply. The power supply must provide various protection functions such as over-dust, over-current and over-power protection. Overcurrent and overpower protection are used to protect the power supply and peripheral circuits from permanent damage. The over-power protection towel, designed for output power compensation, has the same overload protection point at south and low input voltage. Please refer to the figure - figure for a conventional power supply circuit schematic. Power Supply • Supply benefit uses a PWM controller Ui to control the switching of the power switch Qi. A sense resistor Rs is connected in series with the power switch Qi for obtaining a current through the power switch QA-sub-side i read current Ip, which determines the maximum output power of the power supply. The primary side switching current flows through the detecting resistor Rs and generates a current sensing signal ~ on the detecting resistor Rs. The controller is switched - the current sensing terminal VS is connected to the detection resistor, and receives the current sensing signal vcs' and compares it with a maximum power limiting voltage VM through a power limit comparison @13〇 'false current The sense signal Vcs is greater than the maximum power of 5.1288313. The rate limit voltage VM' PWM(4)_^ will drive the output of the gas signal VPWM, which in turn limits and determines the maximum turn-off power of the power supply: complex reference -g 'cut rate When the switch Qi is turned on, the energy ε on the storage inductor can be expressed as: 〇〇Tl 2 xLpxI2p=pxr
Flow through the transformer Ti - Ip ^ xt Lp on Ο) The secondary side switching current Ip can be expressed as: (2) The output power P can be expressed as: ? such as - road (3) μ ^ Lp is expressed as a transformer Τι—the secondary side switching current=the secondary side inductance value; u is the conduction time of the driving signal when the power switch Qi is turned on; Ts is the switching period of the driving signal vPWM. Formula from above
(2) It can be seen that the magnitude of the input voltage VlN will affect the transformer T!-the secondary side is established = one (four) current change Ip, the higher input voltage is faster, and the lower rain input is slower. The current sensing signal Vcs is compared with the maximum power limit t voltage VM, and (4) the maximum output power P of the mosquito net supply. It can be known from the above formula (3) that the power supply output power p is large and the power-on Q1 conduction time t〇n is related to the input power. When considering the safety, the actual input voltage VlN of the power supply is 6 1288313 _ from 9GVae to 264Vae, and there are often several times the difference between the high and low input f voltages. However, the feedback control loop through the power supply can automatically adjust the on-time w, and the output power P is guaranteed to be set. New is said that when the current sense signal vGS is higher than the maximum power off voltage ^, the maximum on-time will be limited at this time, and the transformer Τι-secondary switching current 1? With the figure - please refer to the second figure, which is the conventional output delay limit caused by the transmission delay time (not compensated). The power difference is usually used. The maximum power limit voltage %, for example, the IV of the IV is compared with the electrical domain signal on the electrical domain _vs. 'If the current sense signal Vcs on the current sense terminal VS is greater than ivc, s then the PWM controller A The output drive signal is stopped at the output terminal OUT to the power switch Qi for limiting and determining the maximum output power P of the power supply. However, the maximum output power is also affected by the transfer delay _ N* between the PWM controller A. Referring to the second figure, the power supply will generate a steeper current sensing signal Vcs when the high input voltage is applied to the fixed maximum power P voltage, and the HV and the continuous conduction time Ui are shorter. Drive message = Vpwm, hv. Furthermore, when operating at a low input voltage, a slower electrical sensing signal 乂^^ and a continuous conduction time t are generated. ^ Longer drive signal VPWM'LV. In fact, when the current sense signal Vcs is higher than the maximum power limit voltage VM, the drive signal Vpw^ of the PWM controller q will be turned off after a transmission delay time td of 7 . Within this transmission delay time h, the power switch QJ continues to conduct and will continue to deliver power. Therefore, the actual drive signal VPWM is turned on _ U at WHd, and the transmission delay time ^ is the same in the same power supply, both at high and low input voltages. Therefore, the power supply depends on the high input voltage, the actual (four) rate limit voltage vM, l new reader voltage power _ turn Vmlv high, so that the power supply will cause a great difference in output power at high and low input voltage. The actual output power P is as follows: p_ ^IN X(t〇n — 2xLpxT — (4) Comparing the above equations (3) and (4), the excitation delay time td inside the PWM controller a will cause the excitation current More than the theoretical value (%^ / , this will have a larger power supply voltage at high input voltages relative to the low input voltage. Although the transmission delay time td is very short, usually between 20 〇ns In the range of 35 ns, and the higher the switching frequency, the difference in output power caused by the high and low input voltages of the transmission delay time U is more intensified. [Invention] In view of this, the present invention is used in Wei. The method of output power compensation of the supply towel and the switching control woven fabric are compared with the current sensing signal obtained by the power supply silk scarf _ periodic three-stage limit signal, and the work + # further reaches the power supply The output power is compensated at high and low input voltages. 8 1288313 The shore cries and sings the power of her control, making the secret power supply
And the service three-stage limit signal for outputting-resetting the signal; and a synchronous subtraction output unit connected to the taste unit, the vibrating and the power switch, and receiving the reset signal to receive the pulse signal And synchronizing the ship wave signal to output a driving signal Longgong correlation, as the compensation of the output power of the high and low input voltage of the electric detector. - Object - Secondary switching: = The switching action of the power switch. The switching control device uses a 1-connected-waveform generator, the __, wave signal and -遽', and transmits the oscillating signal_waveform generator. The waveform generator converts the sawtooth wave signal into a periodic three-segment limited signal output; a comparison unit 连接 is connected to the detecting resistor and the waveform generator, and the receiving-current sensing signal is used in the power supply The method for output power compensation is to detect a primary side switching current flowing through a power switch through a detecting resistor before the power supply, and obtain a current sensing signal on the detecting resistor; and then the waveform generator Providing a periodic three-segment limiting signal, first providing a voltage rising limit signal in a signal cycle, and comparing the current sensing signal with the current sensing signal; the waveform generator then providing a voltage limiting signal and The current sensing signal is compared; the waveform generator finally provides a voltage drop limiting signal and compares it with the current sensing signal. 9
Ϊ288.313 In this way, the current sense signal Vcs' of the power supply at high and low input voltages is compared with the voltage rise limit signal, and the power supply is compensated for different output powers at high and low input voltages. At the same time, the present invention utilizes a waveform generator to provide a voltage limiting signal to limit the maximum power of the power supply. Moreover, the present invention utilizes a waveform generator to provide a voltage I drop limit signal to limit the power supply to a maximum power of a low input voltage to reduce the duty cycle of the drive signal generated by the power supply H-side low input voltage. Causes output over power. It is to be noted that the above summary and the following detailed description are exemplary of the present invention. The objects and advantages of the present invention will be set forth in the description and drawings. [Embodiment] The monthly multi-test No.-Fig. is a schematic diagram of the circuit for the power supply of the present invention, and the switching control device with the power compensation of the power supply is used for one electric H d electric I supply 11 The switching of the rate switch 〇H-surfacer T1 is controlled using the switching control device of the present invention. At the same time, '-the detection resistor Rs and the work: 1 also the 'connection' is used to obtain the flow-through power _ Qi primary side switching % > knife L ip, and the peak ~ turtle ^ sensing signal Vcs. Switching of the present invention The control system controls the power switch Rs to receive the electric muscle sensing minus Ves, and then performs the switching operation of the Qiansiguan Qi after the operation. Ι·288·313 The present invention uses an oscillator 50 to connect one The waveform generator 6 outputs an sawtooth signal VSAW and a pulse signal pls, and transmits a sawtooth signal ▽~▽ to the waveform generator 60. The waveform generator 60 receives the sawtooth signal VSAW. For outputting a periodic three-segment limiting signal vLMT; simultaneously using a comparing unit 200, connected to the detecting resistor Rs and the waveform generator 6〇, receiving the current sensing signal Vcs and the periodic three-stage limiting signal vLMT For outputting a reset signal RST; and a synchronous signal output unit 270, connected to the comparison unit 200, the oscillator 50 and the power switch Q1, receiving the reset signal RST and the pulse signal PLS, Output a drive by synchronizing the pulse signal PLS The VpwM is connected to the power switch Q1. Referring to the third figure, in an embodiment of the present invention, the comparing unit 200 is a power comparator 230, and a positive terminal thereof is connected to the waveform generator 60, and a negative terminal An output terminal is connected to the synchronous signal output unit 270. In this embodiment, the present invention uses the power comparator 230 to receive the periodic three-segment limiting signal Vlmt and the current sensing signal Vcs. And performing a comparison operation, outputting the control enable signal V〇c (ie, reset signal RST) to the synchronous signal output unit 270. Referring to the third figure, in another embodiment of the present invention, The comparison unit 200 is further connected to a voltage feedback terminal fb of the power supply for capturing a feedback voltage signal VFB. The comparison unit 200 has the power comparator 230 described in the previous embodiment, and The method includes: a pulse width modulation control 11.1288313 unit 240 connected to the negative end of the power comparator 230, the detection resistor Rs and the voltage feedback terminal FB, receiving the current sensing signal vcs and the feedback Voltage signal VFB Receiving the control signal Voc and the logic circuit 250 connected to The modulation signal V〇p is used to output the reset signal RST to the synchronization signal output unit 270. In this embodiment, the present invention uses the logic circuit 25 to output a reset signal RST to the synchronization signal output unit 270. The sync signal output unit 270 can synchronize the pulse signal PLS and output the drive signal VPWM to the power switch Q! ' for switching control. With reference to the third figure, please refer to the fourth figure, which is a schematic diagram of the internal circuit of the waveform generator of the present invention. The waveform generator 60 includes a first voltage-to-current conversion unit 61 connected to the oscillator 50, receives the sawtooth wave signal VSAW, and converts the sawtooth wave 'the voltage value of the Vsaw into a mine tooth current ISAW'. It is expressed as: (5) where RA is the resistance value of the first voltage-to-current conversion unit 61. A first current mirror is coupled to the first voltage pair current converting unit 61 for receiving the sawtooth current Isaw. The first current mirror is composed of a first transistor 601 and a second transistor 602. The first transistor 601 is connected to the gate of the second transistor 602, and the drain of the first transistor 601 is connected to its gate. The first voltage pair 12 1288313 current conversion unit 61 outputs the sawtooth current ISAW flowing into the drain of the first transistor 601, and the drain map of the second transistor 602 generates a first mapping current ,, the value of which can be obtained by the following formula .
Ii=NixIsaw (6) where Ν! is the mapping ratio of the first current mirror. The first transistor 601 is also coupled to the source of the second transistor 602 and is in turn coupled to a limiting current source It. Therefore, the maximum current value of the first mapping current 1 of the first current mirror output is limited by the limiting current source Ιτ.
The NixIsaw = It (7) waveform generator 60 further includes a second voltage-to-current conversion unit 62 that receives a reference voltage VREF and converts the voltage value of the reference voltage Vref into a reference current Iref, which can be expressed as:
IrEF=Vref/Rb (8) where RB is the resistance value of the second voltage-to-current conversion unit 62. A second galvanic current mirror is coupled to the second voltage pair current converting unit 62 for receiving the reference current Iref, and the second current mirror is comprised of a third transistor 603 and a fourth transistor 604. The third transistor 603 and the source of the fourth transistor 604 are connected to the ground GND, and the third transistor 603 is connected to the gate of the fourth transistor 604. The gate of the third transistor 603 is connected to its gate. The reference voltage IREF outputted by the second voltage to the current conversion unit 62 flows into the 13-1288313 drain of the third transistor 603, and a second mapping current I2 is generated in the gate map of the fourth transistor 604, the value of which can be calculated by the following formula get. I2=N2XIref (9) where N2 is the mapping ratio of the current mirror. The fifth transistor 605 and a sixth transistor 6〇6 form a third current mirror. The source of the fifth transistor 605 and the sixth transistor 6〇6 is connected to a supply voltage Vcc. The fifth transistor 6G5 is connected to the gate of the sixth transistor _, and the drain of the fifth transistor 605 is connected to its gate. The first mapping current. The second mapping current flows into the drain of the fifth transistor 6〇5, and the drain map of the sixth transistor 606 generates a power limiting current Ilmt. The value of the power limiting current Ilmt can be obtained by the following equation.
Ilmt=N3x(Ii + I2) (1〇) where N3 is the mapping ratio of the second current mirror. The power limiting current passes through the power limiting resistor Rlmt' to generate the periodic three-stage limiting signal, Vlmt, as shown in equation (11):
Vlmt=IlmtxRlmt (11) Please refer to the fifth figure, which is a schematic diagram of the internal circuit waveform of the waveform generator of the present invention. With the above formula (5) to equation (7), it can be known that the first mapping current h is generated by the sawtooth current Isaw according to the mapping ratio of the first current mirror, so during the time iva, the first mapping current h and The waveform of the sawtooth current IsAW is the same as the slope. However, during the time TrT2, the sawtooth wave current Isaw.1288313 goes up' and the first map current is limited by the limit current source Ιτ, so that the first map current MjUi is set at the potential value L of -gj. (4) At time Τ2, the first-mapping current 11 is restored again as the _ wave current iSAW is mapped to the first flow mirror. Thus, the periodic rounding waveform of the first mapping current 1 forms a two-stage waveform output type. Further, in accordance with the above formula (10), the power limiting current Ilm is mapped by the _ mapping current U and the second mapping electron L L2 and is mapped by the mapping ratio % of the third current mirror. The second mapping current L pulls the potential of the first mapping current h, and the first mapping current h after the potential is pulled up is further mapped with the mapping ratio Ns of the third current mirror to generate the power limiting current Ilmt, so the power limiting current is attached. The waveform is also a type that exhibits a three-segment waveform output. And in conjunction with the foregoing formula (11), the power limiting current iLMT flows through the power limiting resistor Rlmt to generate the periodic quadrature and limit signal Vlmt.
In particular, the present invention utilizes a waveform generator 60 to output a periodic three-segment limit signal vLMT for comparison with the current sense signal Vcs. During a signal period of the periodic three-stage limit signal VLMT, the periodic three-stage limit signal vLMT is composed of a voltage rise limit signal, a voltage limit signal and a voltage drop limit sfL 7 tiger. The power supply can feedback the current sensing signal VCS, HV with a higher slope at a high input voltage, and the current sensing signal VCS, LV with a lower slope is obtained at a low input voltage. Regardless of the high or low input voltage of the power supply (actual input 15 1288313, the input voltage VIN range is from 90Vac to 264Vac), the current sense signal is compared with the voltage rise limit signal of the periodic three-stage limit signal Vlmt. The power supply generates a high-current current sensing signal Vcs at a high input voltage, and hv will quickly compare to the voltage rising limit signal of the periodic three-stage limiting signal Vlmt, and the lower input voltage is compared. The current sensing signal Vcs, lv with a lower slope will be compared with the voltage rising limit signal of the periodic three-stage limiting signal Vlmt. • In fact, the current sense signal Vcs, lv with a lower slope generated at a high input voltage is higher than the periodic three-stage limit signal VLMT. At the moment when the voltage rises the limit signal, the drive signal VPWM of the PWM controller u2 used by the power supply will be turned off after a transmission delay time td. At this transmission delay time. Inside, the power switch Qi is continuously turned on and will continue to deliver power. At the same time, the transmission delay time td is the same in the same power supply. • In the above description, due to the higher current sensing signal VCS, the HV first reaches the voltage rise limit signal of the periodic two-stage limit VLMT, and the drive signal VPWM, HV will pass a transmission delay time td. The cutoff, and the lower current sensing signal VCS, LV slower to the periodic three-stage limit signal VLMT voltage rise limit (four) 'and Axis VpWMLv will be after the transmission delay time td cutoff. 16 * 1288313 The use of the weekly, two-stage limit signal voltage rise limit signal as a limit, the power supply benefits from the output power of the low and round-in voltage, the motor sense signal Vcs, HV or the slope 乂 = The current sensing signal Aw with a lower slope has the same actual power limit point when considering the transmission delay time. The power supply can be different from the output power caused by the high and low input voltages. The supplier works in the case of high and low voltage input power supply _ voltage, the same output power. In combination with the second figure, referring to the fifth figure, when the input voltage of the power supply is too low (hold,, and hold the input voltage below 7〇Vac), it establishes the speed through the human-side switching current Ip of the power switch. Slow, so that the current feedback signal Vm (10) is slowly established. Therefore, when the power supply input voltage is too low, the current feedback signal VCS, B0 is limited by the voltage drop limit signal of the periodic three-stage limit signal Vlmt, and the power switch Q1 is turned off earlier. Please refer to the sixth figure, which is another block diagram of the waveform generator of the present invention. The waveform generator 60 includes: a memory unit 608 for storing a plurality of sets of digital data; and a digital-to-analog converter 609 connected to the memory unit 608 for using the pulse signal PLS for the memory unit. The digital data in 6〇8 is converted into an analogous three-stage limit signal VLMT. The memory unit 608 can be a read-only memory (rom), which can pre-program a plurality of sets of digital data, and generate a set of digits through the digit-to-analog converter 609 when each of the pulse signals PLS enters 17 1288313. The data is provided to the digital analog converter 609 for conversion to the periodic three-segment limit signal Vlmt output. Referring to the third figure, the method for output power compensation in the power supply of the present invention is described next. The power compensation method is to draw a current sensing signal Vcs on a detecting resistor Rs in the power supply; The waveform generator 6 provides a three-stage limit signal having a voltage rise limit signal, a voltage limit signal, and a voltage drop limit signal, and compares it with the current sense signal Vcs through a power comparator 230. In this way, the current sense signal Vcs of the power supply at high and low input voltages is compared with the voltage rise limit signal, so that the power supply can achieve the same output power at high and low input voltages. At the same time, the present invention can also use the waveform generator 60 to provide a voltage limiting signal in the three-segment limiting signal to be compared with the current sensing signal Vcs as a power limitation of the power supply. Moreover, the present invention can also utilize the voltage drop signal and the cake signal to be provided by the waveform generator to limit the duty cycle of the driving signal of the power supply under the excessive input voltage. In the above description, if the current sensing signal Vcs is higher than the voltage limiting signal or the voltage rising or voltage falling signal, the power supply limits the power output as compensation for the output power. In summary, the method for output power compensation and the switching control device used in the power supply of the present invention are used in the power supply device to utilize the round-off period of the 12 1888313 three-stage limit signal to obtain the sense of current. The test signal is compared and calculated to achieve the output power compensation of the power supply at high and low input voltages. It is used to improve the output power difference and output power caused by the high and low input voltages of the power supply. Consumption. However, the above is only a detailed description of the specific embodiment of the present invention. The features of the present invention are not limited thereto, and are not intended to limit the present invention.
。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 (4) may be in the field of the invention. And 4 or repair (4) can cover the following patents in this case
19 1288313 [Simple diagram of the diagram] The first diagram is a schematic diagram of a conventional power supply circuit; the second diagram is a schematic diagram of the difference in output power limit level between high and low input voltages caused by the known transmission delay time; The circuit diagram of the waveform generator used in the present invention; the fifth diagram is a schematic diagram of the internal waveform of the waveform generator used in the present invention; and the sixth diagram is the waveform used in the present invention. Another block diagram of the generator. [Main component symbol description]
Ui PWM controller (^ power switch is transformer Rs detection resistance (^ power switch • is transformer Rs detection resistance 50 oscillator 60 waveform generator 61 first voltage to current conversion unit 62 second voltage to current conversion unit 200 Unit 20 .1288313 '230 power comparator 240 pulse width modulation control unit 250 logic circuit 270 synchronization signal output unit 6 (Π, 602, 603, 604, 605, 606 transistor 608 memory unit 609 digital to analog converter
twenty one

Claims (1)

1288313 X. Patent application scope: 1. A method for output power compensation, which is used in a power supply, the steps include: operating a current sensing signal; providing a voltage rising limit signal and the current The sensing signal is compared; a voltage limiting signal is provided and compared with the current sensing signal; and a voltage drop limiting signal is provided and compared with the current sensing signal. 2. The method of claim 6, wherein in the step of extracting the current sensing signal, the current sensing signal is received by a detecting resistor to receive the primary side switching current of the power supply. . 3. The method for the round-robin power compensation described in claim 1 wherein the current sense signal is higher than the voltage rise limit signal or the voltage limit signal or the voltage drop limit signal 'the power supply Will limit the power output. 4. The method of claim 2, wherein the voltage increase limit signal, the voltage limit signal, and the voltage drop signal form a three-stage limit signal. 22 .1288313 2 5. The method for output power compensation according to item 4 of the patent application scope, wherein the violation condition number and the current sensing signal are compared by a power comparator.乂口,6.- Kind of switching control device with output power compensation, used in a power supply 'transmission-detection resistance to draw the primary side switching current flowing through a power switch, including: The surplus device 'reads the display signal and the pulse wave signal; the Lu-decoration generates 11 'connected to the (four) H, and receives the display signal for outputting a periodic three-stage limit signal; The detecting resistor and the waveform generator are a receiving current sensing signal and the three-phase limiting signal for outputting a reset signal; and a synchronous signal output unit connected to the comparing unit and the vibrator And the power switch receives the reset signal and the pulse signal for synchronizing with the pulse signal of the pulse signal to the power switch. 7. The switching control device with output power compensation according to claim 6, wherein the comparison unit is a power comparator, a positive end of which is connected to the waveform generator, and a negative terminal is connected to the The detection resistor is connected to the synchronous signal output unit. 23 ^ 1288313 8 . The switching control device with output power compensation according to claim 6 , wherein the comparison unit is further connected to one of the power supply terminals of the power supply, comprising: a power comparator Connected to the waveform generator and the detecting resistor, receiving the current sensing signal and the periodic three-stage limiting signal for rotating a control enable signal; a pulse width modulation control unit connected to the The detection resistor and the voltage feedback terminal receive the current sensing signal and a feedback voltage signal to output a modulation signal; and a logic circuit is connected to the power comparator, the pulse width modulation control unit, and The synchronous signal output unit receives the control enable signal and the modulation signal for outputting the reset signal to the synchronous signal output unit. 9. The switching control device with output power compensation according to claim 6, wherein the waveform generator comprises: a first voltage-to-current conversion unit connected to the oscillator to receive the sawtooth a wave signal, and converting the voltage value of the sawtooth wave signal into a sawtooth current; a first current mirror connected to the first voltage pair current conversion unit and a limiting current source according to the sawtooth current mapping a first mapping current, and the first mapping current is limited by the limiting current source;
TW94115438A 2005-05-12 2005-05-12 A means for output power compensation and a switching control apparatus TWI288313B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI474590B (en) * 2012-12-26 2015-02-21 Univ Nat Taiwan Control circuit for reducing current error of output of power converter and control method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI474590B (en) * 2012-12-26 2015-02-21 Univ Nat Taiwan Control circuit for reducing current error of output of power converter and control method thereof
US9225250B2 (en) 2012-12-26 2015-12-29 National Taiwan University Control circuit with current sampling mechanism for reducing current error of output of power converter and control method thereof

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