TWI258222B - Compound semiconductor device and method of manufacturing the same - Google Patents

Compound semiconductor device and method of manufacturing the same Download PDF

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Publication number
TWI258222B
TWI258222B TW94111458A TW94111458A TWI258222B TW I258222 B TWI258222 B TW I258222B TW 94111458 A TW94111458 A TW 94111458A TW 94111458 A TW94111458 A TW 94111458A TW I258222 B TWI258222 B TW I258222B
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Taiwan
Prior art keywords
electrode
layer
field
pad
substrate
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TW94111458A
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English (en)
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TW200541083A (en
Inventor
Tetsuro Asano
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Sanyo Electric Co
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Publication of TW200541083A publication Critical patent/TW200541083A/zh
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Publication of TWI258222B publication Critical patent/TWI258222B/zh

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Description

-1258222 • 九、發明說明: 【發明所屬之技術領域】 • 本發明係關於化合物半導體裝置及其製造方法,特別 _ ^關於可提升附之特性,並降低引線接合(wire b〇ndmg) 時的不良情形之化合物半導體裝置及其製造方法。 【先前技術】 行動包活等移動體用通訊機器,多使用GHz頻帶之微 波,且在天線之切換電路或收發訊之切換電路等之中,多 φ使用用以切換上述高頻訊號之開關(switch)元件(例如,曰 本特開平9-181642號)。該開關元件係用以處理高頻,因 此系使用採用了砷化鎵(GaAS)之場效電晶體(以下稱之為 ET) 口而使箾述開關電路本身積體化的單石微波積體電 路(MMIC)的開發正伴隨著上述趨勢而持續進展中。 第9圖係頻示採用〇aAs fet之被稱為 φ P〇le Double Throw)的化合物半導體開關電路裝置的原理 電路圖。
# 第1與第2FET卜FET2之源極(或汲極)係連接至共通 輸入端子IN,各FET1、FET2之閘極係經由電阻Rl、^ 而連接至第1與第2控制端子CtM、Ctl-2,另外,各FET 之汲極(或源極)係連接至第1與第2輪出端子〇UT1、 0UT2。施加於第1與第2控制端子⑶-卜⑶^之訊號為 互補訊號,施加了 Η位準之訊號的jpg丁會導通(qn),使 施加於輸入端子IN的訊號傳送到其中一方的輸出端子。 配置電阻Rl、R2之目的,係為了防止高頻訊號相對於成 316955 5 1258222
Ctl-2的直流電位而經由閘 為交流接地之控制端子ctl-l 極電極漏出之情形。 恭技=5基板為半絕緣性,但是,在GaAS基板中將開關 ::積體化時,若直接在基板上設置引線接合用之焊
Pa h極層’鄰接之電極間的電性相互作用依然會存 ▲。因而有很多例如由於絕緣強度較弱而產生靜電破壞、 號漏出而隔離劣化等特性上的問題。因此 、{之衣方法中,係在配線層與焊墊電極 化膜。 虱 仁是,因氮化膜較硬,接合(b〇nding)時的壓力會使焊 墊4伤產生龜裂。為抑制龜裂乃在氮化膜上的接合電極鍍 至以為對應。但是,鍍金之步驟,除了會增加步驟數外, 也會使成本升高。因此,乃開發出一種在焊墊電極 設置氮化膜的技術。 爹知第10圖到第12圖,說明構成如第9圖所示之習 知的化合物半導體開關電路裝置之FET、焊墊以及配線的 製造方法的一例。 首先’如第10圖(A)所示,在由GaAs等所形成之無 播雑的化合物半導體基板5 1上,設置厚度為6〇〇〇a程度 的緩衝層41,再在緩衝層41上成長η型外延層(epitaxial layer)42。然後全面覆蓋約500人至600A之厚度的退火用 氮化矽膜53。 在全面設置阻劑層(resist layer)54,並進行選擇性地使 源極領域、汲極領域、閘極配線以及焊墊電極形成領域上 316955 6 .1258222 , 的阻劑層54開口之光微影程序(ph〇t〇Hth〇graphy process)。接著,以該阻劑層54為遮罩進行供給n型之雜 貝(29Si )的_子注入。藉此,形成η+型的源極領域%以 及汲極領域57,並同時在焊墊電極形成領域以及閘極配線 下的η型外延層42表面形成高濃度雜質領域6〇。藉由該 高濃度雜質領域60可充分確保隔離,因此可去除以往為了 絕緣而設的氮化膜。 •右不再需要氮化膜,則在進行接合引線之壓接時即不 #必考慮氮化膜龜裂的問題,而得以省略以往必要之錄金步 驟。鐘金步驟不僅步驟數多,也耗費成本,因此若能夠省 略該步驟’對於製造步驟之簡化以及成本之刪減將有極大 的幫助。 ^在第10圖(Β)中,係在全面設置新的阻劑層58,以進 行選擇性地留下FET之動作領域18以及閑極配線下、焊 #塾電極下之高濃度雜質領域6〇的上方部分的阻劑層而使 鲁其他部份開口之光微影程序。接著,以該阻劑層%為遮罩 進行雜質(B+或Η+)之離子注入,然後去除阻劑層58並進 :活性化退火。藉此’可使源極以及汲極領域^與高 =度雜質領域6G活性化,形成到達緩衝層41的絕緣化領 在第11圖(Α)中 ° 6 5以及第1沒極電極6 6之形& m 办烕領域開口之光微影程 序,以去除氮化矽膜53,接著片古^ + .Α 考冉依序真空蒸鍍層疊作為歐 姆金屬層64之AuGe./Ni/Au之3芦。 316955 7 1258222 源極電 然後,藉由剝離(lift off)、合金化以形成第 極6 5以及弟1 ;及極電極6 6。 接者,在第11圖(B)中,進行選擇性地使閘極電極69、 第1焊墊電極91以及閘極配線62之形成領域開口之光微 影程序。乾姓刻從閘極電極69、g 1焊整電極91以及間 極配線62之形成領域露出之氮化石夕膜^,使間極電極^ 形成領域之通道層52露出,並使閘極配線“以及第!焊 墊電極91形成領域之GaAs露出。 于 然後,依序真空蒸鍵層疊作為第2層金屬層之構成問 極金屬層的Pt/Tl/Pt/Au。然後去除阻劑層並藉由剝離⑽ off)形成與通道層52接觸之閘極電極69、帛!焊墊電極 91以及閘極配線μ。 之伋,進仃埋入Pt之熱處理,使閘極電極69的一部 分埋入通道層52。Pt埋入閘極之FET較諸於Ti/pt/Au閘 極之而,具有導通(⑽)電阻低、耐壓大等優良的電 性。 可 在第12圖⑷中,用氮化石夕膜所形成之純化膜 (Pa謝atl0n fllm)72覆蓋基板5丄表面。在該純化膜μ上 進行光微影程序,以形成與第1源極電極65、f Η及極電 =、閘極電極69以及第β墊電極91的接觸孔(c〇mact hole),然後去除阻劑層。 阻劑層以進行光微影程 75以及第2 ;及極電極 之阻劑開口之光微影程 然仅’在基板5 1全面塗布新的 序,進行選擇性地使第2源極電極 76與第2焊墊電極92之形成領域 316955 8 -1258222 ..序。接著,依序真空蒸錄層疊作為第3層金屬層之構成焊 墊金屬層的WPt/Au之3層,而形成與第1;原、極電極65、 '第1汲極電極66以及第1焊墊電極91接觸之第2源極電 .極75以及第2汲極電極76與第2焊墊電極%。此外,一 部份之配線部分係使用該焊墊金屬層而形成,因此要留下 5亥配線部份之焊塾金屬層。 鲁然後,如第12圖(B)所示,在第2焊墊電極%上壓接 接合引線(bonding wire)80(參照例如專利文獻。 鲁 〔專利文獻〕日本特開20〇3-〇〇7725號公報 【發明内容】 〔發明所欲解決之課題〕 如上述一般,在焊墊電極91、%以及閘極配線Μ之 下,設置較上述領域超出之高濃度雜質領域6〇。藉此,可 控制從焊墊電極91、92以及閘極配線62延伸至基板的空 _乏層因此,即使直接將焊墊電極91、92以及閘極配線 _ 62没置在GaAs基板,也能夠充分確保隔離,因此可去除 先前為了絕緣而設置的氮化膜。 若不再要氮化膜,則在進行接合引線之壓接時即不 必考慮氮化膜龜裂的問題。因此可省略以往必要之鍍金步 '。鍍金步驟不僅步驟數多,也耗費成本,因此若能夠省 略4步驟’對於製造步驟之簡化以及成本之刪減將有極大 的助益。 但疋,為了提升FET之特性,如第丨丨圖所示,使 閘極電極69的一部分埋入通道層52時,發現在壓接接合 316955 9 -1258222 引線時,會產生許多問題。 a p =京口知因.藉由閘極電極69之埋入處理,由閘钰 金屬層68所m 士、— ^ 处王田間極 n 冓战之弟1焊墊電極91的一部分也合被埋 基板表面之故。介p卜 |刀也㈢被埋入 會盘美板材料/、P ’第1焊墊電極9”之最下層的Pt 、f板材科之〜或As產生反應而形成堅硬的合金層。
因此’不僅接合之固接性會惡化 傷等的問題m ή古 、s座玍暴扳又才貝 成為良率降低及可靠性惡化的原因。 〔解決課題之手段〕 ^本^月^有雲於上述各項問題而創作,其解決課題之 段’第1係具傷有:設在化合物半導體基板上之外延層 (epitaxial layer)所構成之動作領域;設在前述動作領域之 源極領域以及純領域;由部分埋人前述動作領域之問極 至屬層所構成之閘極電極;由設在前述源極領域以及沒極 領域表面之歐姆金屬層所構成之第1源極電極以及第i汲 極電極;由設在前述第1源極電極以及第1汲極電極上之 太干墊至屬層所構成之第2源極電極以及第2汲極電極;設 於W述基板之高濃度雜質領域;以及與前述高濃度雜質領 域呈直流式連接,且係將前述焊墊金屬層直接固接在前述 外延層表面而成之焊墊電極。 此外’前述高濃度雜質領域係較前述焊墊電極超出而 設置於該焊墊電極下。 此外’前述高濃度雜質領域係與前述焊墊電極分隔, 並設於該焊墊電極周邊之前述基板。 此外,前述動作領域係層疊缓衝層、電子供給層、電 316955 10 !258222 卞移動層、障壁層、覆蓋層(cap layer)而形成。 此外’係藉由前述南濃度雜質領域抑制從前述焊塾電 極延伸至前述基板之空乏層的擴展。 _ 此外,高頻類比訊號係在前述焊墊電極中傳送。 此外,前述高濃度雜質領域之雜質濃度係在1χ 1〇1、 3以上。 一第2係包括:準備層疊有作為動作領域之外延層的化 合物半導體基板,並於焊塾電極形成領域周邊或下方的前 ^基板形成高濃度雜質領域的步驟;在前述動作領域之一 部分附著閘極金屬層以形成閘極電極之步驟;於前述外延 層表面附著焊墊金屬層以形成與前述 =(:焊r極的一及在前述焊 授 cr w杲(bonding wire)的步驟。 祕夕ί 3係包括:在化合物半導體基板上層疊作為動作領 声並於焊塾電極形成領域周邊或下方的前述基 第領域之㈣前述動作領域附著作為 弟層孟屬層的歐姆金屬層以形成第u 汲極電極的步驟,·於前述動作領域之一部 = 層金屬層的閑極金屬層以形成間極電極的步驟 = 1源極電極以及第!汲極電極表面以及前述•収弟 領域之前述外延層表面附著:电極形成 層,以形成第2源極電極以及第2汲極電極、二= 二》辰度㈣領域呈直流式連接之料電極的 二= 前述輝墊電極上遷接接合㈣之步驟。 乂及牡 316955 11 1258222 形成^焊㈡=度^領Μ較前述焊塾電極超“ 形成^述=高濃度雜質領域係與前述焊塾電極分^ 屬膜:外進包L在蒸鍍前述閘極金屬層最下層之Pt之參 述動作領域表面之步^問屬層之—部分埋入斯 卜A述動作領域係層疊緩衝層、電子_给層、 子移動層、障壁層、覆蓋層而形成。电子(、、,,口層兒 夕二匕:,前述高濃度雜質領域係形成lx WW3以上 之雜質濃度。 〔發明之效果〕 根據本發明可獲得以下效果。 :不在^干墊私極部配置閘極金屬層,而僅以焊墊 =層形成焊塾電極。因此’在埋入式閉極電極構造的情 二:孰:防止焊墊電極之引線接合時之不良情形。以往係 •干B極之下層設有開極金屬層。因此,辉墊電極下層 刀的閘極金屬層也會部分埋入而硬質化,因此經常發 引線接合時之不良情形。但是,藉由本實施形態,可避 免上述情形,提升良率,並提升特性。 第2,由於係較焊墊電極超出而在焊墊電極下方設置 高濃度雜質領域’因此可抑制從焊塾電極延伸至基板的空 乏層亦即’即使是與以往相同之未設置氮化膜的構造, 也能夠充分確保隔離。 316955 12 ;1258222 :•第3 ,高濃度雜質領域可與焊墊電極分隔,而設置於 焊墊電極周邊的基板。即使是直接將只有焊墊金屬層之焊 •墊電極固接在基板上的構造,也可藉由各構成要素間的微 小空間來確保隔離。
第4 ’根據本發明之製造方法,可實現未配置閘極金 屬層,僅有焊墊金屬層的焊墊電極。由於並未配置經埋入 而硬質化的閘極金屬層,因此可抑制接合時之固接不良, 以及基板受損傷等不良情形。亦即,本發明可提供一種提 升可^性、並提升良率的化合物半導體裝置之製造方法。 第5可在未配置埋入焊墊電極下層而硬質化之閘極 金屬層的情況下,形成閘極電極埋人之航。因此,可提 種不僅可提升FET之特性,同時可抑制接合時的不良 十月形之化合物半導體裝置之製造方法。 …在焊塾電極下方的基板形成高濃度雜質 二’因此’可提供—種可抑制從焊墊電極延伸之空乏層, 亚提升隔離㈣at·)的化合物半導體裝置之製造方法。 虑執^7’高濃度㈣領域可與焊墊電極分隔,且設置在 =::=:面。因此,咖 夂槿= 固接在基板上的構造,也可藉由 之製造方法。 工間未確保隔離之化合物半導體裝置 之避要變更在㈣金屬層之光阻劑步财所使用 造並即可實現FE丁特性良好之埋入式閘極電極構 兄線接合時之T良情形。因此不必增加步驟數, 316955 13 1258222 即可提升可靠性,改善良率。 第9,藉由將FET做成為層轟 電子移動層、障壁層、覆芸;=層、笔子供給層、
GaAs FFT吞4^-丄“風曰之HEMT,便能夠較一般之 GaAs FET更大巾,地達到低導通(⑽)電阻化。 義板2施形態’不限於職Τ,即使是在㈣ I板層豐作為通道層之刑
也πr — 土卜I層而形成動作領域的F£T =:::化。通道層為外延層之m較諸於藉由離子注 Hm、迢層的FET在特性上更為有利。特別是採用在 二二之FET的情況’可增加最大線性輸入功率。此外, ::r(rhoff)電壓’同一飽和汲極電流時,可縮小 ==。此外’除了開關用途之外,例如使用在放大 口琶感gm變高’可提升放大器之增益的優點。 L貫施方式】 以下針對本發明之實施形態參照第】圖至第8 例祝明構成第9圖所示之開關電路裝置(spdt ( High Electron Mobility Transistor : - t ^ # ^ 电晶體)與電極焊墊以及配線部分。 又 弟^圖為顯示本實施形態之化合物半導體裝置的— 圖圖此I:圖上A) ·為平面圖,第1圖⑻為W線剖面 ° 與先鈾技術相同之構成要素係標示相同符號。 、如第1圖⑷、⑻所示,基板30的形成方法υ,係 百尤在半絕緣性GaAs基板31上層疊無摻雜的緩衝層以。 316955 14 1258222 齡 ♦ ' 緩衝層多以複數之層形成。然後,在緩衝層32上,依序層 ' 疊作為電子供給層之n+型AlGaAs層33、作為電子移動層 之無摻雜的InGaAs層35、構成電子供給層之n+型AlGaAs 電 層3 3。此外,在電子供給層3 3與電子移動層3 5之間,係 配置間隔層(spacer layer)34。 在電子供給層33上,層疊作為障壁層之無摻雜的 AlGaAs層36以確保預定之耐壓與夾斷電壓。此外在最上 ® 層層疊作為覆蓋層之n+型GaAs層37。在覆蓋層37上連 ❿接源極電極、汲極電極等金屬層。藉由使覆蓋層37的雜質 濃度成為高濃度,可降低源極電阻、汲極電阻而提升歐姆 性。 HEMT中,作為電子供給層之n+型AlGaAs層33的 施體(donor)雜質所產生的電子,係往電子移動層35側移 動,而形成構成電流路徑的通道。結果,電子與施體離子, ^ 會以異質接合界面為分界而形成空間上的分隔。電子係移 動於電子移動層35中,由於電子移動層35中並不存在造 胃成電子移動度降低之施體離子,故可維持高電子移動度。 此外,HEMT係藉由選擇性地形成於基板的絕緣化領 域45來分隔基板,並因此形成必要的圖案。在此,所謂的 絕緣化領域45,並非完全電氣絕緣,而是藉由以離子注入 方式注入雜質(B+)在外延層設置載子之捕集(trap)準位 而絕緣化的領域。 此外,在本說明書中,使用HEMT之MMIC中,元件 以及焊塾或配線相鄰B开’係在該等之間設置用以確保隔離 15 316955 1258222
Oso^ano^ 邊成“P未進行B+離子注人之領域而形成。 、、如第1圖(A)、⑻所示,在駭形成動作領域38 域以及汲極領域之基板的覆蓋層37上設置由第1 二。:曰、之歐姆金屬層(AuGe/Ni/Au)所形成的第工源極 :JE 5以及第!沒極電極%。在此,動作領域π係指以 絕緣化領域45分隔出’並將以梳齒狀配置源極電極65、 乃、汲極電極66、76以及閘極電極之領域。此外,在第! 圖(B)中係顯示1組的源極領域38s、汲極領域38d以及 閘極電極69,但實際上係使源極領域38s或汲極領域瑯 共通而使複數組鄰接而構成如—點鏈線所*之動作領域 38 (參照第1圖(a))。 、 此外,蝕刻動作領域3 8的一部分,亦即蝕刻源極領域 38s以及汲極領域38d間的覆蓋層37,然後使第2層金屬 鲁層之閘極金屬層(Pt/Mo)與露出之無摻雜Αΐ(}^層% 做肖特基接合來設置閘極電極69、閘極配線a。 ®此外,在第1源極電極65以及第"及極電極66上設 置由第3層金屬層之焊塾金屬層μ (Ti/pt/Au)所構成的 第2源極電極75以及第2汲極電極76。源極電極乃、汲 極電極76、閘極電極69係被配置成梳齒相互咬合的形狀, 以構成HEMT。 在此,閘極電極69之一部分,係在與基板保持肖特基 接合的狀態下形成為埋設於動作領域38的一部分(相當於 以往構造的通道層52)中之埋入式閘極電極。 316955 .1258222
. 藉由做成埋入式閘極電極,閑極带朽rQ 邊緣會形成圓形狀(源極側邊缘亦同⑭69剖面的汲極側 將耐壓設定為預定數值時==及極間的耐壓。反^ ,.a + T '洗此增力σ的份量將作Λ雪早 供給層之η+型A1GaA 1刀里將作為私子 結果,具有因产…:的知體雜質濃度設定得較高。 ,、另u /瓜入作為電子移動 35的電子數變多,而叮士, 曰…、摻濰的1nGaAS層 高頻失真特性之優點。 …度、通道電阻以及 焊墊電極77,係將從jjemt Μ a η λ * 動作領域38延伸之焊 =屬=直接固接設置於基板3G表面(覆蓋層㈣ ;7;;=Γ號係在焊塾電極77之中傳送。在焊墊電 '基板30表面設有:與焊墊電極77的全面直接 接,且周邊部較焊塾電極丄 (曲““ 〒i⑽77起出之南濃度雜質領域20。 ⑽度雜質領域20係藉由絕緣化領域45分隔而形成。 在此,向濃度雜質領域2〇係指雜質濃度在卜i〇iW3 的n:rf。在弟1圖(B)的情況下高濃度雜質領域2〇 * 14 HEMT的外延構造相同,但因含有覆蓋層37 度為45xlGlW3程度)之故,而機能上為高 /U Μ領域°此外’高濃度雜質領域20與焊塾電極77 係呈直流式連接。 在半絕緣基板上直接設置焊墊電極等之成為高頻訊號 Μ金屬層時,藉由對應於高頻訊號之空乏層距離的變 匕工乏層w到達鄰接之電極或配線。而在空乏層所到達 之金屬層間會產生高頻訊號的洩漏。 316955 17 1258222 但是,藉由在焊墊電極77下方的基板3G中設置高濃 又邮貝領域20 ’不同於未摻雜雜質的基板(半絕緣性,美 板電阻值為1Χΐ〇7Ω·吻以上)表面,可充分提高焊㈣ 和187下3方的雑^辰度(離子種29Si+ ’濃度為1至5χ 藉此使焊塾電極77與基板3ι電性分離,從焊 “ 11 77至郝接之例如閘極配線62的空乏層即不會延 '、P可《又成郴接之焊墊電極77、閘極配線62之相互 間的分隔距離大幅近接的形態。 亦即,藉由在焊墊電極77的周圍的基板30設置高濃 ^質領域20’即使是直接將焊墊電極77設於基板%的 造,同樣可充分確保隔離(is〇lati〇n)。 正^外,同濃度雜質領域20的構造,係與HEMT的外 延構造相同,含有覆蓋層37。在抑制空乏層之擴展上主要 係仰賴於該覆蓋層37的雜質濃度。 此外,對於將閘極電極69之梳形齒集結成束之閘極配 w 62亦根據相同的理由配置高濃度雜質領域2〇,並與 極酉己、線6 2 3古、亡』从 ” 壬直k式連接。亦即該高濃度雜質領域2並非於 主己、泉62之下與周邊的基板30部分進行用以絕緣化之 62 f入,而是藉由使基板30非活性化而形成。閘極配線 ,2^由與閘極電極69同時形成之閘極金屬層⑽所形成。 配/閘極配線62之下係藉由蝕刻去除覆蓋層37。閘極 62下方為障壁層之無摻雜之A1GaAs層36,且高濃度 ’、項或20並不存在於閘極配線a下方而僅存在於其周 7、P ’設在閘極配線62之高濃度雜質領域2(),實質 316955 】8 .1258222 • 之周邊的覆蓋層37。在此,閘極配線62 14周故之復盍層37間的距離係與閘極電極69•源極領域 ,o8s間距離、閘極電極69_汲極領域間距離相同為〇」 :耘度。亦即’閘極配線62與其周邊的覆蓋層37係呈 直抓連接。藉由此構造可防止高頻訊號從閘極配線Μ漏出 至基板3 0。 此外焊墊金屬層所構成之焊墊配線78,係延伸 於.又置在基板30表面之氮化膜72上,以連接hem丁之動 _作領域38與焊墊電極77。 ,外,如圖所不,亦可於焊墊配線78下方之基板3〇 配置同礙度雜質領域2〇。焊墊配、線78下方的高濃度雜質 領域20 ’係不施加任何直流電位的浮動⑺⑽㈣)電位。在 配置有傳送高頻類比訊號之焊墊配線78的領域中氮化膜 72係形成%谷成分,使高頻訊號通過氮化膜72而到達基 •板。因此,猎由設置浮動電位的高濃度雜質領域Μ以遮斷 空乏層之延伸,即可防止高頻訊號之洩漏。 除了焊墊電極77之外,亦在閘極配線62或焊墊配線 78之下方或周圍設置高濃度雜質領域別的話,更能夠有 效地提升隔離性。 …如所述一般,藉由在焊塾電極77了方,配置防止高頻 訊號沒漏之高濃度雜質領域20,即可略去與以往相同之 墊電極77下的氮化膜。 此外,本實施形態之焊墊電極77,係形成使焊塾金屬 層74直接固接於基板的構造。亦gp,在焊塾電極π形成 316955 19 • 1258222 領域_不再設置以往作為第】焊塾電極而 層68,而僅以焊墊金屬層74形成焊墊電極π。藉此至屬 於可提升腦丁之特性,因此即使是將閉極電極L的由 科埋入動作領域38的構㊣,亦可在烊塾電極77中 止因埋入金屬之硬質化而導致之不良影響。 74本身便 之不良情 Β 疋
只要不存在硬質化的金屬層,焊墊金屬層 適於引線接合的金屬層,故可防止引線接合時 形,可抑制良率以及可靠性的惡化。 此外第1圖(C)、(D)係顯示高濃度雜質領域2〇之复 =圖案的面圖。焊墊電極77與高濃度雜質領域直接 、接=如第1圖(c)所不,可利用從焊塾電極π超出之方 農度雜質領域2G設於焊墊電極77之周邊部下方的 -此外如第1圖(D)所示,亦可利用與焊墊電極77分 隔的方式將高濃度雜f領域2G設於焊墊電極77之周邊二 基=30。亦即,藉由以絕緣化領域牦進行分隔,可在焊 墊電極77周邊形成高濃度雜質領域20。高濃度雜質領‘ 2古〇、f銲塾電極77之分隔距離為至5心程度時, 尚濃度雜質領域2〇即可經由絕緣化基板以直 與焊墊電極77連接。 气充刀 、 卜若在閘極配線62之周邊亦設置與閘極配線62 連接的高濃度雜質領域2G時將更具效果,設在焊墊配線 8周ic亦同裱有效。在圖中,係分別配置與焊墊電極π 或閘極配線62呈直流連接之高濃度雜質領域2Q,以做為 316955 20 1258222 焊墊配線78周邊之高濃度雜質領域2〇。在焊墊配線巧鱼 焊墊電極77與閘極配線62非鄰接配置的情況下,〇要在、 焊墊配線78下方配置浮動電位之高濃度雜質領域2〇即可。 此外’由於高濃度雜質領域20,係用以防止焊墊電極 77,其他構成要素(閘極配線62、焊墊配線、動作領域 38等)間之高頻訊號的洩漏之領域,因此至少應配置在上2 述構成要素相鄰的領域。 如第1圖(B)、(C)所示,與焊墊電極77直接接觸 Φ(Γ7ΓΓ而在焊塾電極77下方的全面(或其周邊)形成高 展“貝領域20時,對於隔離的提升很有效果。此外 = 將高濃度雜配置在焊塾電^ 周邊之‘墊電極77與焊塾配線78或閘極配線67間的 ^ / 亦可抑制高頻訊號之茂漏。 3 7 對於職Τ之外延構造,亦即在覆蓋層 〆、早之間又具有重複之AlGaAs層、GaAs声或 InGaP層的外延構造亦可同樣實施。 曰5 圖至第5圖,並以第1圖⑻的構造為例 δ兄月本Μ之化合物半導體裝置之製造方法。 本發明之較佳之半導體 合物半導體基板上声晶柞盔叙从>s丄 係由.在化 電極形成領域周邊…層’並於焊塾 的步驟;在前述動作領域二度雜質領域 屬層以形成第!源極以及;=二1層金屬層之歐姆金 Ρ請之—却A # _之步驟,·於前述動 。刀附者作為第2層金屬層之閘極金屬層以形 316955 21 1258222 =問極=極之步驟;在前述第i源極以及第u及極電極表 〜以及刖述料電極形成領域之前述外延層表面附著作為 弟3層金屬層之焊勢 ^ ”、、 孟屬層以形成第2源極以及第2 ;及 =電極,以及與前述高濃度雜質領域呈直流式連接之焊墊 ^的步驟;以及在前述焊塾電極上壓接接合引線 (bondmg Wire)之步驟。 第1步驟(第2圖):在化合物半導體基板上層疊作為 ^領域之外^層’並於焊墊電極形成領域周邊或下方之 月’J述基板形成高濃度雜質領域之步驟。 先彡第2圖(A)所不,準備層疊有作為緩衝層、 :供給層、通道層、障壁層以及覆蓋層㈣一外 延層的基板30。 亦即’基板3G的形成,係在半絕緣性基板3ι ,豐無摻雜的緩衝層32。緩衝層多以複數 盆 月:厚總合約為數千A程度。緩衝層32為未添 高、 電阻層。 #貝心间 在緩衝層32上,依序形成作為電子供給層之η+型 二As層33、間隔層%、作為電子移動層之無摻雜祕★ =5、間隔層34、作為電子供給層之n+型Ακ}*層%。 中叫、加有2至4χ lO^m-3程度的η型雜 貝(例如Si)。 !確保預定之耐壓與夾斷電壓,係在電子供給層% )&作為障壁層36之無摻雜的AlGaAs層,此外在最上 層h層g作為覆蓋層之n +型GaAs層。 316955 22 .1258222 . 以厚度在4 Ο 0入至5 Ο (1A々p q αα、& » ^ )U(JA之間的退火用氮化矽膜53覆 蓋基板30全面,並姓刻晶片的最外周或遮罩之預定領域的 基板30以形成對準標記(未圖示)。 -之後,如第2圖(Β)所示,形成新的阻劑層(未圖 示)’並為了形成絕緣化領域,而進行選擇性地使絕緣化領 域之形成領域的阻劑層(未圖示)開口之光微影程序。之 後,將該阻劑層做為遮罩在基板30表面,以ΐχ i〇lw2 之接雜量、1〇〇KeV程度的加速電壓進行㈣(例如b+) #之離子注入。 之佼’去除阻劑層並進行活性化退火(綱。C、%秒 f度)。藉此形成絕緣化領域45,使動作領域38以及高濃 度雜質領域20分離。接著全面去除表面的氮化膜53。 南濃度雜質領域20,係形成於輝塾電極77、開極配線 牛驟線冗各自的形成領域下方的基板。在之後的 極77以及開極配線62與形成於其各自的 拉成下方之基板的高濃度雜質領域2〇係皆呈直流連 板的二??塾配線78與形成於其形成領域下方的基 領域係錢化膜關故未形成直流連接。 施加任何直汽,立之ί二度雜質領域20係形成未 ^ 了直々丨〔电位之汙動電位的高濃度雜質領域。 之焊==雜質領域2。,可抑制從之後的步驟所形成 空 :極配線、知墊配線亦相同)延伸至基板的 之層防止南頻訊號的洩漏。 弟2步驟(第3圖):附著作為第1層金屬層之歐姆金 316955 23 ‘1258222 ^ 屬層而形成第1源極以及第1汲極電極之步驟。 如第3圖(A)所示,形成新的阻劑層63。進行選擇 性地使第1源極電極65以及第1汲極電極66之形成領域 開口之光微影程序。藉此,使動作領域38露出,然後在其 依序真空蒸鍍層疊作為歐姆金屬層64之AuGe/Ni/Au的3 〇 之後’如第3圖(B)所示,去除阻劑層63,藉由剝 丨離(lift off)留下與動作領域38接觸之第1源極電極以 _及第1汲極電極66。接著藉由合金化熱處理形成動作領域 38表面與第i源極電極65以及第}汲極電極66的歐姆接 合。接著’於全面再度形成氮化膜53。 第3步驟(第4圖):在動作領域的 一/ - — .. ^ -λ rv yr m a 2層金屬層之閘極金屬層以形成閘極電極之步驟。 ε首先在第4圖(A)巾,形成新的阻劑層67 ’並進行 選擇,1 也,閘極電極69以及閘極配線62之形成領域開口 之光U心私序。乾蝕刻在閘極電極69以及閘極配線Μ之 形成領域露出的氫化胺5 3 蚀P弓士 々…m版53 ’使閘極電極69以及閘極配線 ,。形成領域的基板30表面(覆蓋層37)霖出。 列去=在第4圖⑻[保持阻_,。而娜 美接覆蓋層37,露出閘極金屬層將與之形成肖特 基,…壁層36。在此雖省略細部之圖示 37係經由側面蝕刻而與之後 -一曰 m的距離。該閘極電極部分的釋笑芦 . 泝極碎H、 刀的仅现層37的蝕刻會直接形成 源極研域J8s、汲極領 d。 J P /原極領域38s、汲極領 316955 24 -1258222 ; 域38d係在閘極電極形成中自動形成。 在第4圖(〇巾’係依序真空蒸㈣疊作為間極金 .屬層⑽之Pt/Mo的2層以做為第2層之電極。 -^之後如第4圖(D )所示,藉由剝離(lift 〇ff)去除阻 劑層67。接著進行埋入閘極金屬層68之最下層的Pt的献 處理。藉此,閘極電極69得一部分會在與基板保持肖特基 籲接合的情況下被埋設於動作領域38的一部分之障壁層36 中。在此,考慮該閘極電極69之埋入量,而形成較厚的障 #壁層36,以獲得所希望之HEMT特性。 藉此’在閘極電極69的剖面形狀中汲極側的邊緣形狀 會變為圓形(源極側邊緣亦同),而使閘極電極-汲極電極 間的電場強度得以緩和。因此,可就此緩和的份量將作為 電:供給層之n+型A1GaAs層33的施體雜質濃度設定得 較高。結果,因流入作為電子移動層之無摻雜的inGaAs •層35的電子數變多,而具有可使電流密度、通道電阻以及 鲁高頻失真特性大幅改善的優點。此外,閘極電極69,係與 形成源極領域38s、汲極領域38d的覆蓋層37呈直流式連 接。完全相同地,閘極配線62亦埋入基板表面,而與周邊 的尚濃度雜質領域20呈直流式連接。此外,被埋入的一部 分雖會產生硬質化,由於並不會對閘極配線62施加引線接 合等外力,因此不會造成任何影響。 第4步驟(第5圖):係於第1源極及第丨汲極電極表 面以及焊墊電極形成領域的基板表面附著作為第3層的電 極之焊墊金屬層,以形成與第2源極以及第2汲極電極, 316955 25 • 1258222 • 域呈直流式連接之焊墊電極的步驟。 ㈣,為保成陶極69、間極配線 的表面係由t “ σ °九的動作領域38,基板30 11矽膜所形成之鈍化膜72覆蓋。 η 5圖⑻所示,在該献媒72 I、禾囫不),並進杆氺旦 1 a 第1名托干 仃先礒衫私序。對第1源極電極65、 開口:!二極66之接觸部進行選擇性之阻劑(未圖示)的 乙_5亥部分的鈍化膜72以及氮化膜Μ。 此外同時對焊墊電極形成 口,以敖黏方丨斤加\ ^取确埝進仃砥擇性之阻劑的開 蝕刻5亥邻/刀的鈍化膜72以及 除阻劑層。 胰W,然後去 藉此在弟1源極電極6 5以及第〗、、芬托命J 純化膜72形成接觸孔,使焊塾f 電極66上的 蓋層⑻表面露出。 $極形成領域的基板3〇(覆 接著,如第5圖(C)所示,在基板3〇上全面塗布新 的阻劑層(未圖示)以進行光 , 隹7 mX進仃光U衫釭序。進行選擇性地使 弟2源極電極75與第2沒極電極%,以及焊塾電極77、 知塾配線78各自的形成領域上的阻劑層開口之光微影程 序0 接著,依序真空蒸鑛層疊作為第3層的電極之 塾金屬層的·t/Au的3層。去除阻劑層並藉由剝離⑽ off)形成與第i源極電極65、第!汲極電極Μ接觸之 源極電極7 5以及第2 ;:及極電極7 6。 同時,形成與基板直接固接之焊墊電極77,並在氮化 316955 26 Ϊ258222 祺72上形成預定圖案之焊墊配線78。在圖中谭塾電極η 係與設於焊墊電極77下方全面之高濃度雜質領域2〇直接 接觸’形成直流式連接。焊墊配線78的下方配置有氮化膜 2 53。因此’當局頻訊號通過焊塾配線π時,氮化膜合 形成電容成分而使高頻訊號洩漏至基板。但是,如本實‘ 形態所示,藉由在下方配置高濃度雜質領域20,即使沒有 直流式連接亦可防止高頻訊號的洩漏。 第5步“(第i圖(Β )):在焊塾電極上壓接接 線之步驟。 "當化合物半導體開關電路裝置完成前一步驟後,即移 仃至進行組裝之後一步驟。切割半導體 分 _的半導體晶片。將該半導體晶片固定於框架(未圖= =利用接合引線80連接半導體晶片之蟬塾電極π與預 疋之引、·泉(lead)(未圖不)。接合引線8〇係使用金細線,並 周头之球形接合連接。然後進行移轉模塑以形成樹脂 封裝。 、在本戶、施形悲中,焊墊電極77,僅以焊墊金屬層74 構成。亦即,如先前所述,未在下層配置閘極金屬層⑼。 因此二將FET做成埋入式間極電極構造時,即使閘極金屬 ^之°卩分硬質化,亦不會對焊墊電極77造成影響。焊墊 至屬層74本身,本來就適合作為引線接合的材料,因此只 要不配置硬質化的金屬層即可實現良好的接合。 安^外,藉由變更形成第1步驟之絕緣化領域45的圖 ^可如第1圖(C )所示一般,在焊墊電極77周邊部形 316955 27 •1258222 • 成與焊墊電極77直接接觸之高濃度雜質領域20。此外, 在第1圖(D )之焊墊電極77周邊與焊墊電極77分隔配 . 置,並形成直流式連接之高濃度雜質領域20,亦可藉由變 . 更絕緣化領域45之圖案的方式來形成。 此外,對於HEMT之外延構造,亦即在覆蓋層37與 IV壁層36之間,重複AlGaAs層、GaAs層或具有inGap _ 層的外延構造也可同樣實施。 接著,參照弟6圖至第8圖,說明本發明之第2實施 鲁开v悲。笫2貫施形怨係顯示基板為GaAs基板,並層疊外 延層以做為動作領域之FET的情形。 此外,基板構造雖與第1實施形態之HEMT不同,但 焊墊電極77與配線係大致相同之構成,因此省略重複部分 之詳細說明。 ▲如第6圖所示,基板,係在以GaAs等所形成之無摻 •雜的化合物半導體基板51上,設置6000Λ程度之用以抑 鲁制洩漏(leak)的緩衝層41 ’並於緩衝層41之上使n型外延 層42成長之基板。緩衝層41為無摻雜或為了防止基板洩 漏而導入雜質之外延層,使n型外延層42(2>< i〇1W3、 _幻成長。此外’η型外延層42係構成通道層52之領 亦即第2實施形態之動作領域18係由:在η型外延層 :㈣注入η型雜質(29Sl。之源極領域%以及汲極領 或57,以及兩領域間之通道層”所構成。 此外,亦在焊墊電極77、焊塾配線78、閘極配線62 316955 28 ;1258222 :=下方進行供給n型之雜f (29Si+)的離子注人,以 高濃度雜質領域6〇。 ^ ' 在源極領域56以及汲極領域57,設置由第i層金屬 . 蜀層64( AuGe/Nl/Au)所構成之第1源極電極 65以及第1汲極電極66。 此外’在通道層52附著g 2層金屬層之閘極金屬層 鲁(Pt/M= w設置閘極電極69。另外,又在第^源極電極 65以及第i汲極電極66上設置由第3層金屬層之焊塾金 屬層74 ( Ti/Pt/Au )所構成的第2源極電極75以及第2沒 極項域76此外,在第6圖中係顯示一組的源極電極乃、 汲極電極76、閘極電極69,但實際上該等電極係配置成梳 齒互相咬合的形狀’並構成FET的動作領域U (與第厂 圖(A)的動作領域38相同)。 、 此外’閘極電極69,係在保持與基板之肖特基接合的 •情況下形成部份埋入通道層52之埋入式閘極電極。 _ 烊墊電極77,係將從FET延伸之焊墊金屬層74直接 固接在基板表面而設置。在焊塾電極77 了方,言史置盘谭塾 電極77全面接觸之高濃度雜質領域6〇。高濃度雜質領域 其雜質濃度係在lx 1〇1W以上,並與傳送高頻類比 訊號之焊墊電極77呈直流式連接,以抑制從焊墊電極π 延伸至基板的空乏層。 如第6圖所示’將高濃度雜f領域6()配置在桿墊配線 78、閘極配線62下方時對於隔離的提升更有效果。’ 此外,高濃度雜質領域60,可如第i圖(c )所示, 316955 29 • 1258222 =在=墊電極77周邊部下方並與焊墊電極77直接連接, =如弟1目(D )所示,與焊墊電極77分隔而設置於焊塾 7:周邊的基板表面。此時,只要高濃度雜質領域60 二墊私極77之間的間隔距離在〇·1 #m至5 vm程度, 南漠度雜質領♦ 6G即可經由基板充分與焊墊電# 77 直流式連接。 > 第7圖以及第8圖係說明第2實施形態之化合物半導 體裝置之製造方法的剖面圖。 •、第1,步驟(第7圖):首先,如第7圖(A)所示,在 以GaAs等所形成之無摻雜的化合物半導體基板$ 1上,配 »又6000A私度之用以抑制洩漏的緩衝層41。該緩衝層* ^ 係無摻雜或為了防止基板洩漏而導入雜質的外延層。於緩 衝層4丨之上使η型外延層COX 1〇17cm_3、ll〇〇A)成長。 然後,以厚度約500人至6〇〇人之退火用氮化矽膜53覆蓋 | 全面。 φ 接著,如第7圖(B )所示,在全面設置阻劑層54, 並進行選擇性地使源極領域56、汲極領域57、焊墊電極 77、 烊墊配線78、閘極配線62各自的形成領域上的阻劑 層54開口之光微影程序。接著,以該阻劑層“做為遮罩 在將成為源極領域56、汲極領域57、焊墊電極77、焊墊 配線7 8、閘極配線6 2的下方之基板表面進行供給n型雜 質(29Si+)的離子注入。藉此,形成n+型的源極領域兄 以及汲極領域57,同時在將成為焊墊電極77、焊墊配線 78、 閘極配線62的下方之基板表面形成高濃度雜質領域 316955 30 1258222 60 (雜質濃度:lx l〇】7cm-3以上)。 源極領域56以及汲極領域57,係與 形成之通道層52鄰接設置,而構成動作領二卜广2所 ^型外延層42做為通道層52來使用時 =注入形成FET之通道層的情況 濃稭 在沬度方向可形成均一的濃度。例如 展度 私士、系、爸狂k 將措由η型外延層 ^通道層者’做為採用於開關電路之fet,可就電流密 度因此而變高的份量使最大線型輸入功率增加。此外亦且 _有可降低寄生電容的優點。 /、 。。此外’亚不限於開關(switeh)用途,對於使用於例如放 大為之FET ’亦具有相互電感gm高而放大器之增益特性 變好的優點。 接著,如弟7圖(C )所示,在動作領域18以及高濃 度雜質領域60之外的全領域形成絕緣化層45。 • 在第2實施形態中,必須使在η型外延層42選擇性地 籲δ又置η型雜質領域而成之動作領域丨8以及高濃度雜質領 域60彼此分離。亦即,在全面設置新的阻劑層58,並進 行遙擇性地留下FET之動作領域丨8以及焊墊電極77 (焊 塾配線78、閘極配線62亦同)下方之高濃度雜質領域6〇 上的阻劑層58,而使其他部分開口之光微影程序。接著, 以該阻劑層58做為遮罩在GaAs表面,進行摻雜量為1χ l〇13cm-2、加速電壓100KeV的雜質(b+或Η+)之離子注 入0 之後,如第7圖(D )所示,去除阻劑層58並進行活 316955 • 1258222 性化退火。藉此,可使源極、汲極領域56、57以及高濃度 雜質領域60活性化,而形成使動作領域18以及高濃度雜 質領域60分離的絕緣化領域45。如前所述,該絕緣化領 域45並非在電氣上完全絕緣之領域,而是以離子注入方式 注入有雜質之外延層。 第8圖係說明第2步驟至第4步驟。 首先’藉由與第1實施形態相同之第2步驟形成第1 電極65以及第1汲極電極66 (第8圖(a)),再藉由 源極 第3步“形成閘極電極69以及閘極配線62。閘極電極69 係在與通道層形成肖特基接合狀態下一部分埋入基板表 面。此外閘極配線62亦一部分埋入基板表面。由於在焊墊 電極77形成領域並未形成閘極金屬層,因此不會有閘極金 屬層之埋入(第8圖(B))。 此外,在第4步驟中如第δ圖(c)所示,係藉由光 ,影程:性地使焊㈣極77以及料喊Μ的形 離亚於全面堆積焊塾金屬層74。藉由剝 77鱼;产:二焊墊電極77以及焊墊配線78。焊墊電極 板。亦即,焊墊電 μ式連接’並直接固接於基 提升焊墊金屬層74形成,即使為 徒升FE丁特性而做成 接合時之不良情形。 琶極構造,也可抑則線 卜墊配線7 8係在气彳卜胺^ 7 ^ l、 成。並於同時形成由痒塾、=希望㈣線圖案形 〜第2汲極電極%。蜀層74所㈣之第2源極電極 316955 32 • 1258222 ; 然後’藉由第5步驟固接接合引線,以獲得第6圖所 示之最終構造。 - 此外’與焊墊電極77呈直流式連接之高濃度雜質領域 • 60的圖案’與設於閘極配線62、焊塾配線78之高濃度雜 質領域60的圖案,可藉由集成化之圖案適宜地加以組合。 【圖式簡單說明】 第1圖係用以說明本發明之(A)平面圖、(B )剖面 圖、(C )剖面圖、(d )剖面圖。 • 第2圖(A)及(B)係用以說明本發明之剖面圖。 第3圖(A)及(B)係用以說明本發明之剖面圖。 第4圖(A )至(D )係用以說明本發明之剖面圖。 第5圖(A)至(C)係用以說明本發明之剖面圖。 第6圖係用以說明本發明之剖面圖。 第7圖(A)至(D )係用以說明本發明之剖面圖。 • 第8圖(A )至(C )係用以說明本發明之剖面圖。 第9圖係用以說明先前技術之電路圖。 第10圖(A)及(B)係用以說明先前技術之剖面圖。 第11圖(A)及(B)係用以說明先前技術之剖面圖。 第12圖(A )及(B )係、用以說明先前技術之剖面圖。 【主要元件符號說明】 18 動作領域 20、60 南濃度雜質領域 30 基板 31 半絕緣性GaAs基板 32 緩衝層 33 電子供給層 34 間隔層 35 電子移動層 316955 33 1258222 36 障壁層 37 38 動作領域 38s 38d 汲極領域 41 42η 型外延層 45 51 基板 52 53 氮化膜 54、 5 8、6 3、6 7 阻劑 56 源極領域 57 62 閘極配線 64 65 弟1源極電極 66 68 閘極金屬層 69 72 鈍化膜 74 75 弟2源極電極 76 77 焊墊電極 78 80 接合引線 91 92 第2焊墊電極 覆蓋層 源極領域 緩衝層 絕緣化領域 通道層 汲極領域 歐姆金屬層 弟1 >及極電極 閘極電極 焊塾金屬層 弟2 >及極電極 焊墊配線 第1焊墊電極 34 316955

Claims (1)

  1. Ϊ258222 丁 '申請專利範圍: 其特徵為具備有: 基板上之外延層所構成 的 種化合物半導體裝置, 由設在化合物半導體 動作領域; 在4 ϋ動作領域之源極領域以及汲極領域; #刀埋入$述動作領域之閘極金屬層所構成 之閘極電極; 主獨滑所構成 金屬::=述!極領域以及沒極領域表面之歐姆 ” θ 士之弟1源極電極以及第1汲極電極· 料前述第1源極電極以及第1汲極電極上之 極·孟萄曰所構成之第2源極電極以及第2汲極電 領域;以及 流式連接,且係將前 延層表面而成之焊 設在前述基板之高濃度雜質 與前述高濃度雜質領域呈直 述焊墊金屬層直接固接在前述外 墊電極。 2. ^申,專利範圍第丨項之化合物半導體裝置,其中, 岫述南濃度雜質領域係較前述焊墊電極超出& 該焊墊電極下。 3 ·如申凊專利範圍第1項之化合物半導體裝置,其中 前述高濃度雜質領域係與前述焊墊電極分隔,並設於 該焊墊電極周邊之前述基板。 、 4 ·如申凊專利範圍第1項之化合物半導體裝置,其中 前述動作領域係層疊緩衝層、電子供給層、電子、移動 層、障壁層、覆蓋層而形成。 316955 1258222 5·二申:專利範圍第i項之化合物半 係稭由前述高濃度雜質 i ’其中, 仲?α 貝71域判從前料h k 伸至則述基板之空乏層的擴展。 %極延 6.=請專利範圍第丨項之化合物半導 局頻類比訊號係在前述焊塾電極中、置,其中, 7· ί申請㈣範圍第1項之化合物半導體穿置 :述高濃度雜質領域之雜質濃度 裝其令, 上0 υ cm— 3以 8.-種化合物何體裝置之製造方法,i 準備層疊有作為動作領域之 二:包括: 導體基板,並於焊##%^ &、λ 纥層的化合物半 、十,宜4 , 干墊电極形成領域的周邊或下士从 述基板形成高濃度雜質領域的步驟; 下方的前 在前述動作領域之一部分附著閘極 成閘極電極之步驟; ]7孟屬層以形 於前述外延層表面附著焊墊金屬層以 述南濃度雜質領域呈直流式連接 驟;以及 干至兒極的步 9. 在前述焊墊電極上壓接接合引線的 一種化合物半導體裝置之製造方法,其特徵 在化合物半導體基板層疊作 ",·,、匕. 層,並於焊塾電極形成領域周t二::域十之外延 成高濃度雜質領域之步驟; U逑基板形 屬動作領域附著作為第1層金屬層之歐姆金 二成•弟1源極電極以及第1汲極電極的步驟; h通動作領域之-部分㈣作㈣ 316955 36 * 1258222 ; 之閘極金屬層以形成閘極電極的步驟; 在A 第1源極電極以及第1汲極電極 旨述焊墊電極形成領域之前述外延層表面附著1及 第Μ金屬層之焊塾金屬層,以形成與第2源極乍電為極 以及弟2汲極電極、以及與前述高濃度雜質領域呈直 流式連=焊墊電極的步驟;以纟 胃找王直 在刖述焊墊電極上壓接接合引線的步驟。 10 ·如申請專利鈴圍哲 f造方法,i由—或第9項之化合物半導體裝置之 電極超出而;前述高濃度雜質領域係較前述焊墊 私極起出而形成於該焊墊電極下。 11 ·如申清專利範園室 制造方法,f ^ 或弟9項之化物半導體裝置之 ^ η ^ Ρ5 4述鬲濃度雜質領域係與前述焊墊 ⑽分隔”成於前述基板。 ㈣ 12 ·如申請專利範囹笛 製造方法,纟中/或第9項之化合物半導體裝置之 之金屬膜後,進述閘極金屬層最下層之Pt 八搜人二n 仃土、處理而使前述閘極金屬層之一部 刀埋入月I』述動作領域表面。 13 ·如申請專利範圊 製造方法,其中=或第9項之化合物半導體裝置之 供从層、#; 則迷動作領域係層疊緩衝層、電子 "二;專;範障壁層、覆蓋層而形成。 製造方法,其中,^弟9項之化合物半導體裝置之 1Π17 - 3、、 則迷高濃度雜質領域係形成1χ cm以上之雜質濃度。 316955
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