TWI255118B - Digital data interface, method, apparatus, computer program product, processor and state machine for transferring digital data - Google Patents

Abstract

A data interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range ""serial"" type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the transfer and processing of digital signals at a high data rate between a host communication device and a client's audio/visual presentation device. More specifically, the present invention is a technique for transmitting multimedia and other forms of digital signals from a wireless device to a miniature display unit or other rendering device using a low power, high data rate delivery mechanism. II. Related technology computers, video game related products, and different video technologies (such as DVD and high-resolution VCR), which have made remarkable progress in recent years to provide static images, video, and accompanying images with increasing resolution. Video and graphic images are given to users of such devices, even if they contain some form of text. These advances therefore require the use of higher resolution electronic viewing devices, such as high resolution video monitors, HDTV monitors, or specialized image projection elements. Combining such visual images with high-resolution or high-quality sound data, such as when using CD-based sound reproduction, DVDs, and other devices that also have associated sound signal output, to provide a more realistic, Rich or realistic multimedia experience. In addition, high activity, high sound quality systems and music transmission mechanisms, such as MP3 players, have been developed that only present sound to end users. In a typical video presentation mode, video data is transmitted using current techniques, and the rate is best known as slow or medium, which is about 1 kbps to tens of kbps. This information can then be buffered or stored in a short or longer-term memory device to delay (later) playback in a required -4- paper National Standard (CNS) A4 specification (210 X 297 male f) 1255118

Description of the invention on a viewing device. For example, an image can be transmitted "passed", or used, connected to the Internet, and received or transmitted using a program stored on a computer or Internet connection device = computer for digital presentation. Image = material. A similar transmission can be made using a wireless device, such as a portable computer equipped with a data modem, or a wireless personal data assistant (PDA), or a wireless telephone. Once received, the data is stored locally in a memory component, circuit or device, such as RAM or flash memory, which contains an external storage device. Depending on the amount of data and the resolution of the image, the playback can be performed quite quickly or with a longer delay. That is to say, in some cases, ~minorly for very small or low-resolution images that do not require much data to allow some degree of instant playback, or use some form of buffering, so after a short delay Some materials can be presented as more material is transferred. If there is no interruption in the transmission link, the transmission is theoretically transparent to the end user of the viewing device once the presentation is initiated. The data used to generate still images or motion pictures is typically compressed using one of several well-known techniques, such as the Link Photo Experts Group (JPEG), the Animated Image Experts Group (mpeg), and others in the media. Standard organizations or companies well-known in the computer and Zhouxin industries to accelerate the transmission of poor materials on a communication link. This allows a smaller number of bits to be used to transfer images or data to deliver a given amount of information. Once the data is transferred to a "local" device, such as a computer or other device, the information obtained is uncompressed (or using a special decoding player - 5 - paper standard (CNS) Α 4 size (210 X 297 mm) 1255118 A7 V. Description of the invention) A data rate of 115 Kbps or 920 Kbps per large, scoop can be fixedly managed by the J' Other interfaces such as the usb serial interface, which can be used for data transfer from 12 to Mbps, and special high-speed transfers, such as those used by IEEE (Institute of Electrical and Electronics Engineers) 1394 100 to 400 Mbps. Unfortunately, these rates do not meet the high data rates required above, and can be considered for future parametric data devices and services to provide high-resolution and rich-content output signals for driving portable Video display or sound device. In addition, the Ting interface requires a large number of host or system and client software to operate. The stacking of software protocols also creates an unneeded burden, especially considering mobile wireless devices or telephony applications. Moreover, some of these interfaces use a number of cables that are too heavy to meet the aesthetics required for mobile applications, and complex connectors add cost or consume too much power. There are other known interfaces, such as analog video graphics card (VGA), digital video interaction (DVI), or Gigabit video interface (gvIF) interface. Two of these are tandem interfaces that process data at a higher transfer rate' but also use bulky cables and consume a lot of power, which is about a few watts. These features make it unusable for portable consumer electronics. Even the third interface consumes too much power and uses expensive or bulky connectors. For some of the above interfaces, there are other major drawbacks with respect to other very high rate data systems/agreements or conveyors for data transfer of fixed installed computer equipment. In order to provide the desired data transfer, the paper size applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) 001759 A7 B7 1255118 V. Inventive Note (5) Rate, which also requires a large amount of power and / or high current The level is working. This significantly reduces the applicability of this technology for highly mobile consumer products. In general, the use of, for example, the choice of connections and transmission elements in the form of optical fibers to provide such data transfer rates also requires additional converters and components that result in higher than a truly commercial consumer-oriented product. The complexity and cost required. In addition to the generally expensive features of the above optical systems, their power requirements and complexity make them unusable for general lightweight, low power and portable applications. What is lacking in the industry of portable or mobile applications is a technology that provides a high-quality presentation experience, whether for highly mobile end-users for voice, video or multimedia. That is to say, when using a portable computer, a wireless telephone, PDA or other highly mobile communication device or device, the currently used video and sound presentation system or device can only be delivered at a desired high quality level. Output. Often, the perceived quality of the experience is the result of a high data rate that cannot be achieved by delivering high quality presentations. Therefore, it requires a new delivery mechanism to increase the flow of data between the host device providing the data and the client display device or component that presents an output to the end user. SUMMARY OF THE INVENTION The above and other disadvantages of the present invention are addressed by the specific embodiments of the present invention in which a new protocol and data transfer mechanism has been developed to enable a host device and a receiving client at a high data rate. Transfer data between devices. -8- This paper scale applies to China National Standard (CNS) A4 specification (210 X 297 mm) 001760 1255118 A7 B7 V. INSTRUCTION DESCRIPTION (6) The advantage of a specific embodiment of the present invention is the complexity of the technology for providing data transmission. Low, low cost' also has a high degree of reliability, which is well suited to the environment of use and is very stable and still maintains a high degree of flexibility. A specific embodiment of the present invention relates to a Mobile Display Digital Interface (MDDI) for transmitting digital data at a high rate between a host device and a client device over a communication path, using a plurality of links or ones linked together The series of packet structures form a communication protocol for transmitting a combination of pre-selected digital control and presentation data between the host and the client device. The signal communication protocol or link layer is used by the physical layer of a host or client link controller. At least one chain controller present in the host device is coupled to the client device via the communication path or link and is used to generate, transmit and receive packets forming the communication protocol and form digital presentation data To one or more data packets. This interface provides two-way information transfer between the host and the client. In other aspects of a particular embodiment of the invention, at least one client link controller or client receiver is provided in the client device that is coupled to the host device via a violation #road or key. The client chain control preparation is also used to generate, transmit, and receive packets forming the communication protocol for forming a digital representation into one or more data packets. In general, the host or link controller uses a state machine to process the data packets used in the command's or some form of signal preparation and query processing, but may use a slower general purpose processor. To manipulate the data and to use some of the less complex packets in the communication protocol. The host controller includes one or more differential line drivers; and the client receiver includes Han He to the -9 - This paper size applies to the Chinese National Standard (CNS) A4 specification (21〇 297 lm) 001761 1255118

The signal path is obtained by one or more differential line receivers. The Wenfeng packets are grouped together in a media frame, which is transmitted between the host and the client device, and includes a fixed length of a predetermined number of packets 4 having a variable length. Each packet contains a packet length field or a packet data field, and a cyclic redundancy check field. A message frame is transmitted or placed at the beginning of the transmission of its packet from the host link controller. It is used by the communication protocol - or a packet in the form of a plurality of video streams and a packet in the form of a voice n to respectively transmit data in the form of video and audio, which is transmitted by the host to the client on the forward link The end is presented to the _ client device user. The communication protocol uses one or more reverse bond wrap-around packets to transfer data from the client device to the host link controller. The packed form of the packet is generated by the host link controller to occupy the period of forward link transmission without data. A plurality of other packets are used by the communication to transmit video information. Such packets include color maps, bitstreams, bit map fills, bit pattern fills, and transparent color-enabled forms. The user-defined stream form packet is used by the Wei communication to communicate the user-defined data. The keyboard data and the packet in the form of a pointing device are used by the communication protocol to transfer data to the user input device or from a user input device associated with the client device. A packet in the form of a closed link is used by the communication protocol to terminate the transfer of data in either direction on the communication path. The communication path typically contains or uses a series of four or more conductors and a shielded cable. In some embodiments, the link control -10- this paper size applies to the National Standard (CNS) A4 specification (210 X 297 public) 001762 1255118

AT

The miscellaneous contains a USB data interface, and the cable uses a USB interface and its E conductor. In addition, it can use printed cables or flexible conductors as needed. The f-link controller requests display capability information from the client device to determine which data and data rate the child client can make through the interface. The client chain controller transmits display or presentation capabilities to the host chain control protocol using at least one packet in the form of display capabilities. The communication protocol uses a plurality of transmission modes, each of which allows data of different maximum number of bits to be transmitted in parallel for a given period of time, wherein each mode can be coordinated by the host and client link controllers. select. These transfer modes can be dynamically adjusted during the transfer of data, and the same pattern is not required for the reverse link as it is for the forward link. In other aspects of the specific embodiments of the present month, the host device includes a wireless communication device, such as a wireless telephone, a wireless pDA, or a portable computer having a data modem disposed therein. A typical client device includes a portable video display, such as a miniature display device, and/or a portable sound bone presentation system. Furthermore, the host may use storage devices or components to store presentations or multimedia materials to transmit and present a client-loaded graphic to illustrate other features and advantages of the present invention, as well as the structure and operation of various embodiments of the present invention. It is described in detail below with reference to the drawings. In the drawings, like reference numerals generally refer to the same, functionally similar, and/or structurally similar elements or process steps.

〇 3 1255118 A7 B7 V. INSTRUCTIONS (9) The current components are represented by the leftmost digits in the reference number. Figure la shows a basic environment in which the present invention can operate, including the use of a microdisplay device for use with a portable computer. Figure lb illustrates a basic environment in which the present invention can operate, including the use of a microdisplay device and sound rendering components for use with a wireless transceiver. Figure 2 shows the overall concept of an action digital interface with a host and client interconnected. Figure 3 shows a packet structure that can be used to implement data transfer from a client device to a host device. Figure 4 shows the use of an MDDI link controller and the form of the signal transmitted between a host and a client on the physical data link conductor of Form I and Form U. Figure 5 shows the use of an MDDI link controller and the form of signals transmitted between a host and a client on the physical data link conductors of Forms II, II and IV. Figure 6 shows the structure of the frame and the sub-frame used to implement the interface protocol. Figure 7 shows the general structure of the packet used to implement the interface protocol. Figure 8 shows the format of the header frame packet. Figure 9 shows the format and content of a padding packet. Figure 10 shows the format of a video stream packet. Figure 11 is a diagram showing the format and content of the video material format description symbol of Figure 10. -12- Paper Mais National Standard (CNS) A4 Specification (210X297 mm) 1255118 V. Invention Description (1) Figure 12 shows the packet used for data and the North La-, 、, 匕夂 non-package format. Shown as a voice stream packet format. Figure 14 is not a bit of the data used to enter the PCM, the drought and the packet PCM grid Figure 15 π is a user-defined stream seal spoon, type one G The format of a color map packet is shown in Figure 16. Figure 17 shows the format of a reverse link wrap packet. Figure 18 shows the format of a display capability packet. Figure 19 shows a keyboard. The format of the data packet. Figure 20 shows the format of a pointing device data packet. Figure 21 shows the format of a link stop packet. Figure 2 2 is not explicit and the status packet is the forest type Figure 23 The format of a one-bit block transfer packet is shown in Fig. 24. Fig. 24 shows the format of a one-character area fill packet. Figure 25 shows the format of a one-bit pattern fill packet. Figure 26 shows a communication. The format of the link data channel packet. Figure 27 shows an interface form of the delivery request seal. The format of the packet is shown in Figure 28. Figure 29 shows the format of the packet in the form of an interface. Figure 29 shows the format of the delivery packet in an implementation form. Figure 30 shows the format of a forward voice channel enabling packet. Figure 31 shows the format of a reverse sound sample rate packet. Figure 32 shows the format of a digital content protection payload. Figure 33 shows the format of a transparent color-enable packet. Figure 34 shows a round-trip delay. The format of the packet is measured. Figure 35 shows the timing of the event during the round-trip delay measurement packet.

η m Paper National Standard (CNS) A4 Specification (210X297 mm) 1255118 A7 B7 V. Description of Invention (11) Figure 36 shows an example implementation of the CRC generator and inspector used in the present invention. The timing of the CRC signal of the device of Figure 36 when transmitting a data packet. Figure 37b is the timing of the CRC signal of the device of Figure 36 when receiving a data packet. Figure 3 8 shows the processing steps for a typical service request without dispute. Figure 39 shows the processing steps for a typical service request established after the chain restart sequence has started for the link. Figure 40 shows how to use DATA-STB encoding to transmit a data sequence. Figure 41 shows the circuit that can be used to generate the DATA and STB signals from the input data at the host and then restore the data at the client. Figure 42 shows a driver and a stop resistor for carrying out an embodiment of the present invention. Figure 43 shows the steps and signal levels used by a client to protect services from the host and used by the host to provide such services. Figure 44 shows the relative spacing between the conversions on DataO, other data lines (DataX), and the flash line (Stb). Figure 45 shows a delay in a reaction that can occur when a host is able to disable the host driver after transmitting a packet. Figure 46 shows a delay in a reaction that can occur when a host enables the host driver to transmit a packet. Figure 47 shows the Chinese National Standard (CNS) A4 specification (210 x 297 mm) 001766 1255118 A7 at the timing of the data being transmitted and the flash-pulse pulse.

The relationship between the edge and the trailing edge at the host receiver input. Figure 48 shows the switching characteristics developed by the reverse data timing and the corresponding client output delay. Figure 49 is a high level diagram showing the synchronization of the signal processing steps that can be performed on the present invention using a state machine. Figure 50 shows the typical amount of delay encountered in signal processing in the forward and reverse paths in a system using MDDI. Figure 51 shows the critical round trip delay measurement. Figure 5 2 shows the change in the data rate of the reverse link. Figure 53 shows a graphical representation of the magnitude of the reverse rate divisor relative to the forward link data rate. Figures 54a and 54b show the steps taken for an interface operation. Figure 55 shows an overview of the interface device processing packet. Figure 5.6 shows the format of a forward link packet. Figure 57 shows typical values for transfer delay and skew in a form I link interface. Figure 58 shows the data on the formal link of the exemplary signal processing through the interface, Stb and pulse recovery timing. Figure 59 shows typical values for transfer delay and skew in the form Π, form m or form... link interface. Figures 60a, 60b, and 60c show the different likelihoods of ideal, early, and delayed relative to the timing of the two data signals and MDDI__Stb, respectively. Figure 61 shows an exemplary connector for the interface pin assignment for the Form I / Form II interface. -15-

This paper scale is suitable for fiscal (4) household standard (CNS) A4 specification (210 X 297 dongdong) 001767 1255118 A7 B7 V. Invention description Figures 62a and 62b show the possible MDDI-Data and MDDlStb in the form ί and the form π interface respectively Waveform. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS I-Overview A general object of the present invention is to provide a Mobile Display Digital Interface (MDDI) that, as described below, causes or provides a low cost, low power consumption delivery mechanism that can be used Southern or very high rate data transfer on a short-distance communication link between a data link in the form of a sequence or a channel j-host device and a display device. The mechanism itself can be implemented with a mini connector and a thin flexible cable, which is particularly suitable for connecting display elements or devices to a portable computer, a wireless communication device or an entertainment device, such as a wearable microdisplay (goggles or projection). Device). The present invention can be used in a variety of situations to communicate or transfer large amounts of data, and typically to voice, video or multimedia applications, from a host or source device that generates or stores such data, to arrive at a high speed - a client display or a typical presentation The application 'is described below' is transmitted by a portable computer or a line (4) or a data machine to a visual display device, such as a small video display screen, a wearable microdisplay device, for example, in the form of a package. The small projection lens and the goggles of the screen or the characteristics or attributes of the mdDI are safely produced so that it has no specific purpose. This is a highly flexible mechanism for transmitting data at high speed, and the internal structure of the data. There is also no functional aspect of its "...". This allows for the transmission of c data or commands, people, and the data packets that have been smashed. The habit of a special display device, or the unique display of some clothing, -16- paper

1255118 A7 B7 V. INSTRUCTIONS (Currently, or can satisfy some of the requirements of the sound and video combination of the V system. The interface does not know the display component or the client device, but only follows the chosen cooperation. In addition, The aggregated sequence link data or data rate can be varied in several sizes (down to allow a communication system or host device designer to optimize the cost and power requirements, client device complexity, and display device updates) Rate. The presence of the child interface is primarily used to transfer large amounts of high-speed data over a "wired" signal chain or small cable. However, some applications may also take advantage of a wireless link that includes optics. The primary link, assuming it is set up to use the same packet and data structure developed for the interface protocol, and maintains the desired transfer level with sufficient power consumption or complexity to maintain practicability. A typical application can be seen in Figures la and lb, in which a portable or laptop computer 100 and a wireless telephone or PDA device 102 are shown, each transmitting data to Display devices 104 and 106, and sound reproduction systems 1〇8 and 112. The helmet line device is currently receiving data, or has previously stored a certain amount of multimedia form data in a memory component or device for subsequent presentation. Providing the end user of the wireless device to view and/or listen to the music. Because the typical wireless device spends most of its time for voice and simple text communication, it has a relatively small display screen and a simple sound system (speaker ) to transmit information to the user of the device 102. The computer has a much larger screen, but is still an inappropriate external sound system, and is still not enough for other multimedia presentation devices, such as 17-book paper Ruler JTgj Standard (CNS) A4 Specification (210X 297 Gongdong) 1255118

V. Description of the Invention (π, Q resolution TV or movie screen. The computer 100 is for illustrative purposes, and other forms of processors, interactive video games, or consumer electronic devices may be used in the present invention. 100 may be used, but is not limited to, a helmet data modem or other device built into wireless communication, or may be connected to such a device using a cable or wireless link as needed. j may present more complex or "rich" information, not just useful or: 3⁄4 experience. Because of &, other mechanisms and devices have been developed in the industry to provide information to end users and provide a minimal degree of desired tongue. Or actual experience. As mentioned above, several display devices have been developed to present the end user of the information recognition device (10). For example, t, or a plurality of companies have = issued a combination of wearable goggles, and projected An image is displayed in a user-eye view in a presentation-visual manner. When properly configured, the device is effective; it also "projects" a virtual image that can be viewed by a user's eye: It is much larger than the component that provides the visual output. That is, sharp, a very small projection component allows the user's eyes to "see a ratio that is more likely than a typical LCD screen or similar." Larger image size. The use of larger virtual screen images also allows for a more limited use of the resolution = LCD screen display is much higher resolution. Other display devices may include but are not limited to small LCD screens or different Flat panel display elements, projection lenses and display drivers to project images on a surface, and so on. 100 used to present an output to another user, or to have additional components to connect or bond to Wireless device 1〇2 or computer paper ruler

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A device that transmits the signal to another location or stores it. For example, the data may be stored in flash memory in optical form, for example using an overwriteable CD medium or on magnetic media for subsequent use, such as a tape recorder or similar device. In addition, many wireless devices and computers now have built-in Mp3 music decoding capabilities, as well as other advanced sound decoders and systems. Portable computers generally use CD and DVD playback capabilities, and have a small dedicated flash memory reader to receive pre-recorded sound files. The problem with this ability is that digital music files promise to have a highly incremental experience of rich features, but only decoding and playback processing are performed simultaneously. The same is true for the = digital video file. To facilitate sound reproduction, Figure la shows the external speaker ΐ4, which can also be used with additional components, such as sub-subwoofers, or “ring-effect” speakers for front and rear sound projection. At the same time, the speaker or ear & 108 shows a support frame or mechanism built into the microdisplay device 1〇6 of Fig. 11}. As is well known, other sound or sound reproduction elements can be used that include power amplification or sound shaping devices. In any case, as described above, when it is required to transmit high quality or high resolution image data and sound information or data signals of the quality from a data source to an end user on one or more communication links 110, That is, a high data rate is required. That is, the transfer chain 110 is clearly a potential bottleneck in data communication as previously described, which limits system performance because the current delivery mechanism does not achieve the substantially high data rate desired. For example, as described earlier, for higher image resolution, such as 1024 x 1024 pixels, each of -___ -19- ~ - 1255118 AT B? 5. Description of the invention (17 pixels are 24-32 bit color depth, The data rate is 3〇fps, and the data rate can approach a rate of more than 755 Mbps or higher. In addition, this image can appear as a multimedia presentation with sound data and possible external nicknames. In order to deal with interactive games or communications, or a variety of commands, controls or k numbers, the amount of data and the data rate are further increased. It is also apparent that fewer cables or interconnections are required to establish a data link. It means that the mobile device combined with a display is easier to use and more likely to be used by more users. This is especially true when multiple devices are used to build a complete sound-visual experience, especially when When the quality of the display and the sound output device is increased, unfortunately, the higher data rate exceeds the current technology used to transmit the data. What is needed is a technique for presenting components and the data. Data transfer at a higher rate between data transfer links or communication paths between sources, which allows for continuous low power, light weight, and as simple and economical as possible, and the spring structure. The Applicant has developed a New techniques or methods and devices 'to achieve these and other objectives to allow an array of mobile, portable or even fixed-location devices to transmit data to a desired display, microdisplay at a very high data rate Or a sound transmission component that maintains a desired low power consumption and complexity. ^1. High Rate Digital Data Interface System Architecture In order to generate and efficiently utilize a new device interface, a A system architecture that uses low-power signals to provide a very high data transfer rate. The protocol is based on a packet and a common frame structure, or a structure that is keyed together to form a protocol for transmitting a pre-selected paper. Ruler-20- Standard (CNS) A4 size (210X297 mm) 1255118

AT B7 V. INSTRUCTIONS (18) Combined data or data form, and a command or operational structure attached to the interface. A. Outline the device connected to the MDDI link or in other communications. a host and a client, and the client is basically some form of display device in which data from the host to the display travels in the forward direction (referred to as forward traffic or links) from the display The data to the host travels in the reverse direction (reverse traffic or link), which is enabled by the host. This is shown in the basic configuration of Figure 2. In Figure 2, the host 202 uses a two-way communication channel 206 to connect to a client 204, which is shown as including a forward link 208 and a reverse link 210. However, these channels are formed by a shared combination of conductors whose data transfer is switched between the forward or reverse link operations. As discussed elsewhere, the host includes several devices that utilize the benefits of the present invention - for example, the host 202 can be a portable computer in the form of a palm, laptop, or the like. The mobile computing device can be a PDA--1 calling device, or one of a plurality of wireless telephones or data machines. Alternatively, the host 202 can be a portable entertainment or presentation device, such as a portable DVD or CD. Player, or a game device. At the same time, the customer 204 can include a variety of devices for presenting information to an end user. For example, a microdisplay incorporated in a goggle or eyeglass, a projection device built into a hat or a hard hat, a small velvet or uniform hologram element placed in a car, such as on a window or sunshade, Or a variety of speakers, headphones or sound systems to deliver high quality sound or music. However, I am familiar with this technique -21 - National Standard for Paper (CNS) A4 Specification (210X297 mm) 1255118

The artist will: immediately understand that the present invention is not limited to these devices, and has been provided on the market, and is provided for use, which is to provide images and sounds of the end user's high product= The way of storage and delivery, or the main present during playback. The present invention can be used to increase the high data rate required to "pay & develop" the desired user experience in the data stream between different devices. B. Interface form The 琢 MDD interface can be viewed as handling five or more interfaces of some unique physical forms that can be found in the communications and computer industries. These are indicated at this time as Form 1, Form 11, Form III, Form IV and Form u. The Form 1 interface is configured as a 6-wire (conductor) interface, making it suitable for use in tilting or wireless phones, PDAs, e-books, video games, and portable media players, for example, CD players. Or Mp3 player, and devices in similar forms of consumer electronics technology. The Form U interface is configured as an 8-wire (conductor) interface that is more suitable for laptop, notebook, or desktop PCs and similar devices or applications that do not require a display to update quickly. It does not have a built-in MDDI link controller. This interface format can also be distinguished by the use of any additional two-wire Universal Serial Bus (USB) interface, which is particularly useful for providing existing operating system or software support that is visible on most personal computers. The Form U interface can also be used in a USB-only mode where the display has only a connector that is connected to a standard USB port such as a computer or similar device. Form Η, Form III, and Form IV interfaces can be applied to high-performance displays or devices' and use larger and more complex wiring with additional twisted-pair conductors to provide proper shielding and transmission of data signals. Low damage __ -22- This paper size applies to Chinese National Standard (CNS) A4 size (210 X 297 mm) 001774 1255118 A7

Consumption. The Form 1 interface transmits signals that can include both the display, the voice control, and the limited signaling information and are basically used in devices that do not require high resolution: full rate video material. Such an interface is mainly used for devices, such as mobile wireless devices, and the S1 (10) host is basically not usable in the connection and transmission of signals. In this configuration, the mobile device is an MDDI, a device, and a "master" to control the communication link from the host, which typically transmits display data to the client (forward traffic or Bond). In this interface, a host can receive from the client at the host by transmitting a special command or packet form to the client (reverse traffic or link communication data, which allows to take over the bus. The time period 'and delivers the material to the host to become a reverse packet. This is shown in Figure 3. One of the packets, called the envelope (described below), is used to reverse the transfer chain. The reverse link is generated by the transfer to the packet. The display configured to poll the host for the time to poll the data is pre-determined by the host and based on the needs of each specified application. This half-duplex bidirectional data transfer This is especially useful when you can't use a USB port to transfer information or data to the client. This form of U interface signal is ideal for laptop and desktop applications, where a USB interface is widely used by a large number of hosts. Board or other hardware is used and supported by the operating system software. The use of a USB interface allows the use of "plug and play" features and simple application configuration. Universal bidirectional command stream 'status, sound data, etc., and -23- This paper scale applies to Chinese National Standard (CNS) A4 specification (210 X 297 mm) 001775 1255118 Description of the model, which is applicable to this particular application In the ::: machine it is possible to use the appropriate link layer protocol (described below), and save: Γ low or reset the operation to the slower mode again... or ascend to a faster Mode to support higher rate transmission == display at higher resolution (4). For example, the time when the host changes 2 2 / 2 is when the display system switches a power source, for example, - battery to - AC power Or when the source of the display medium switches to a lower or higher resolution format, or a combination of these or other conditions or events, it can be considered as the basis for changing a display or data transfer mode. It is also possible to use a system. The mode transmits data in one direction and another mode in another direction. For example, a form IV interface mode can be used to transfer data to a display at a high rate while being transmitted by a peripheral device. A form I or form ϋ mode is used when a host device is used, such as a keyboard or a pointing device. c. The physical interface structure is used to establish communication between the king machine and the client device. The configuration is shown in Figures 4 and 5. In Figures 4 and 5, an MDDI link controller 402 and 502 is shown mounted in a host device 2〇2, and an MDDI link controller 404 and 5〇 4 is shown in a client device 2〇4. As previously mentioned, the host 202 is connected to a client 204 using a bidirectional communication channel 4〇6, which contains a series of conductors as follows. 'The host and client link controllers can be fabricated into a single integrated circuit using a single circuit design that can be set, adjusted or programmed to respond to a host controller (drive) or a client controller (received Device). This series -25- This paper scale applies to China National Standard (CNS) Α4 specification (210Χ 297 mm) 001777 1255118 A7 B7 V. Invention Description (23) Lower cost due to the larger amount of manufacturing a single circuit device. In Figure 4, a USB host device 408 and a USB client device 410 also display a form of U interface for implementing the MDDI. Circuits and devices for performing such functions are well known in the art and will not be further described herein. In Figure 5, an MDDI link controller 502 is shown mounted in a host device 202, and an MDDI link controller 504 is shown mounted in a client device 204'. As previously mentioned, host 202' uses a two-way communication channel 506 to connect to a client 204' that includes a series of conductors. As mentioned earlier, both the host and client link controllers can be fabricated using a single circuit design. Signals transmitted between a host and a client, such as a display device, through the MDDI link, or a physical conductor used, are also illustrated in Figures 4 and 5. As shown in Figures 4 and 5, the primary path or mechanism for transmitting data through MDDI uses data signals labeled MDDI_DataO+/- and MDDI_Stb+/-. Each of these is a low voltage data signal that is transmitted in a cable that is differentially paired in a cable. There is only one transition for the MDDI_DataO pair or the MDDI_Stb pair for each bit transmitted on the interface. This is a voltage-based transmission system, not current-based, so the quiescent current consumption is close to 〇. The host drives the MDDI_Stb signal to the client display. When the data can flow simultaneously in the forward and reverse directions on the MDDI_Data pair, that is, it is a bidirectional transfer path, the host is the master or controller of the data link. The MDDI DataO and MDDI Stb Letter-26- This paper scale applies to the National Standard (CNS) A4 specification (210 X 297 mm) 001778 1255118 A7 B7 V. Invention Description (24) Path is in a differential mode Operate on to maximize the protection of noise. The data rate on these lines is determined by the rate of the clock transmitted by the host and can vary from approximately 1 kbps to 400 Mbps or higher. The Form II interface contains an additional data pair or conductor or path other than the Form I, which is referred to as MDDI_Datal+/-. The Form III interface contains two additional data pairs or conductors or paths in addition to Form II, which are referred to as MDDI-Data2+/- and MDDI_Data3+/-. The Form IV interface contains four additional data pairings or signal paths in addition to the Form III interface, which are referred to as MDDI_data4+/-, MDDI_Data5+/-, MDDI_Data6+/-, and MDDI_Data7+/-, respectively. In each of the above interface configurations, a host uses a wire pair or signal labeled MDDI_Pwr and MDDI_Gnd to transmit power to the client or display. One form of transmission that is typically available for this form of U configuration is the MDDI USB connection or signal path. The MDDI USB connection includes a secondary path for communication between a host and a client display. In some applications, it is more desirable to transfer certain information between a host and a client at a relatively low data rate. Using the USB transport link allows devices that do not have an MDDI link controller but have a USB host or limited host capabilities to communicate with MDDI compatible clients or displays equipped with a Formal U interface. Examples of information that can be transmitted to a display on a USB interface are: static bit map, digital sound stream, pointing device data, keyboard data, and control and status information. All functions supported through the USB interface can also be implemented using the main MDDI high speed serial data path. When the above defined information (see the following package), it can be transmitted on a USB form interface, -27- This paper size is applicable to China National Standard (CNS) A4 specification (21〇X297 mm) 001779 1255118 A7 B7 Invention Description (25) The requirement that serial data becomes a back-to-back packet format is not applied to this USB interface, nor does it use packets that support MDDI delivery. The signals summarized between the host and the client (display) on the MDDI link are shown in Table I below, depending on the interface form.

Table I Form I Form II Form III Form IV MDDI_Pwr/Gnd MDDIPwr/Gnd MDDI_Pwr/Gnd MDDIPwr/Gnd MDDI One Stb+/- MDDI_Stb+/- MDDI—Stb+/- MDDI_Stb+/- MDDI_DataO+/- MDDI Data0+/- MDDI_DataO+/ MDDI_DataO+/- MDDI_Datal+/- MDDI_Data 1+/- MDDI_Datal+/- MDDI_Data2+/_ MDDI Data2+/· Form U MDDI Data3+/- MDDI Data3+/- MDDI—Pwr/Gnd MDDLData4+/_ MDDI One Stb+" MDDI_Data5+/- MDDI A Data0+/- MDDI-Data6+/· MDDIUSB+/- MDDI_Data7+/- The cable used to implement the above structure and operation is about 1.5 meters in length and contains three twisted paired conductors, each of which is therefore Multi-strand 30 AWG line. It is wrapped around a foil cover or otherwise formed over the three twist pairs as an additional discharge line. The twist-pairing and occluding discharge conductor terminates at the display connector, and the shield is attached to the display (customer) shield and is an insulating layer that covers the entire cable, as is well known in the art. The cable is paired into: MDDI Gnd -28- quasi (CNS) A4 size (210X297 mm) A7 B7 1255118 V. Invention description (26) and MDDI Pwr; MDDI-Stb+ and MDDI-Stb-; MDDI-DataO+ and MDDI-DataO-; MDDI-Datal+ and MDDI_Datal-; and so on. The nominal cable has a diameter of about 3.0 mm and a nominal impedance of 85 ohms of soil 10% ‘and a nominal DC resistance of 1 〇〇〇10 ohms per 〇〇〇. The signal transmission speed must be commonly referred to as 〇.66c, and the maximum delay through the cable is less than about 8.0 nsec ° D. Data format and rate In order to achieve a user-experienced and useful range of applications, the mobile digital interface ( MDDI) provides support for a variety of displays and display information, sound transducers, keyboards, pointing devices and many other input devices that can be integrated into or coupled to a mobile display device to operate, as well as control Beichi and its combinations. The MDD interface is designed to be capable of transmitting multiple possible forms of data streams between the host and the terminals between the forward or reverse link directions using a minimum number of cables or conductors while supporting synchronization Scramble and asynchronous streaming (update). It may have a number of data forms and e /, the total data rate to be read is less than or equal to the maximum desired MDDI bonding rate. These may include, but are not limited to, those listed in the tables η and η below.

Table II Video data transmitted from the host to the client, etc.----_720x480, 12bit, 30f/s~124.5 Mbps Isochronous data 44.1kHz, 16bit, stereo~1.4 Mbps Non-synchronous plot data '800x600, 12bit, lOf /s, Stereo ~115.2 Mbps Non-synchronous Control————Minimum « 1.0 Mbps ___ -29- This paper scale applies towel@国标准(CNS) ΜSpecifications (χ 297 公董) 001781 A7 B7 1255118 V. Invention Description (27)

Table III Voice data transmitted by the client to the host etc. 8 kHz, 8bit «1.0 Mbps isochronous video data 640x480, 12bit, 24f/s ~ 88.5 Mbps Unsynchronized state, user input, etc. Minimum value «1.0 Mbps This interface is not fixed But it can be extended, so it can support the transmission of a variety of information "forms" that contain user-defined data for future system flexibility. Examples of specific data to be accommodated are: full animation video, which is in the form of full or partial screen bitmap fields or compressed video; static bit maps to preserve power and reduce implementation costs; PCM or in multiple resolutions or Rate compressed sound data; pointing to device location and selection, and user definable data for capabilities not yet defined. This information can also be transmitted in conjunction with control or status information to detect device capabilities or set operational parameters. The present invention has evolved in the art of data transfer, including but not limited to viewing movies (video display and sound), using a personal computer with limited personal viewing (drawing display, sometimes combined with video and sound), in a PC Play video games on the console or personal device (animated graphics display or synthesized video and sound), "watch" the Internet, devices in the form of video calls (two-way low-rate video and sound), a static digital bitmap Cameras like cameras, or cameras that capture digital video, and use mobile phones, smart phones or PDAs to increase productivity or entertainment. The action data interface as described below is shown as providing a large amount of A-V form data on a communication or transport link, which is typically set up as a wire or cable link. However, it will be immediately known that the signal structure, the -30-paper scale applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 001782 1255118 AT B7 V. Description of the invention (28) Or the transfer mechanism can be adjusted to provide a link in the form of an optical or wireless medium if it can maintain the desired transfer level. The MDD interface signal uses a concept known as a shared frame (CF) for basic signal protocols or structures. The ideal system behind the use of a common frame provides a synchronized pulse for simultaneously synchronizing the data stream. A display device can use this common frame as a time reference. A low CF rate can increase channel efficiency by reducing the burden to transmit the sub-frame header. On the other hand, a one-shot C F rate reduces the hysteresis and allows for a smaller elastic data buffer for the sound samples. The CF rate of the interface of the present invention is dynamically programmable and can be set to one of a number of values that are suitable for the sync stream used in a particular application. This means that the selected CF value is optimally suited to the given display device and host configuration, as needed. The number of bytes typically requires a common frame for the sync data stream, which can be adjusted or programmable, most likely for an application, such as a head mounted microdisplay as shown in Table IV. .

Table IV Common Frame Rate (CFR) = 1200 Hz XY Bit Frame Rate Channel Rate (Mbps) Bytes / CFR DVD Movie 720 480 12 30 1 124.4 12960 Stereo Graphics 800 600 12 10 2 115.2 12000 Camera 640 480 12 24 1 88.5 9216 CD sound 1 1 16 44100 2 1.4 147 Voice 1 1 8 8000 1 0.1 6.7 -31 - Paper standard (CNS) A4 size (210 X 297 mm) A7 B7 1255118 V. Description of invention (29) The partial count of the bytes of each common frame can be easily obtained using a simple programmable M/N counter structure. For example, each CF count of 26-2/3 bytes is transmitted by 2 frames of 27 bytes after each 26-byte frame. A smaller CF rate can be selected to generate an integer for each CF byte. However, in general, a simple M/N counter is implemented in the hardware for implementing some or all of the required area in the integrated circuit of the present invention, which is more buffered than a larger sound sample FIFO. The device needs to be small. An exemplary application illustrating the impact of different data transfer rates and data formats is the Karaoke system. For Karaoke, a system user sings along with a music video program. The lyrics of the song are displayed at the bottom of the screen, so the user knows the word to sing and roughly the timing of the song. This application requires a video display with graphics that are not updated frequently, and mixes the user's voice with a three-dimensional sound stream. If it assumes a common frame rate of 300 Hz, then each CF will contain: 92,160 bytes of video content on the forward link, and 588 bytes of sound content (based on 147 in stereo) A 16-bit sample) to the display device, and an average of 29.67 (26-2/3) bytes of voice transmitted by a microphone back to the action is a karaoke machine. A non-synchronized packet is transmitted between the host and the display. This contains up to 768 bytes of graphics data (a quarter of the screen height) and is less than about 200 byte (several) bytes for multiple control and status commands. Table V shows how the data is configured in a common frame for the Karaoke example. The overall rate used is chosen to be approximately 225 Mbps. A slightly higher -32- This paper home standard (CNS) A4 specification (210X297 mm) 1255118 AT B7 V. Invention description (30) The rate of 226 Mbps allows each sub-frame to transmit another 400 bytes of data. , which allows the use of temporary controls and status messages.

Table V Element Rate Bits/CF Music Video at 640 X 480 pixels and 30 fps 92160 Lyrics text at 640 X 120 pixels and 1 fps 768 CD sound at 44,100 sps, stereo, 16 bit 588 voice at 8,000 sps, mono , 8-bit 26.67 sub-frame header 19 Reverse link burden 26.67+2*9+20 Total byte/CF 93626.33 Overall rate (Mbps) 224.7032 E. Link layer using MDD interface high-speed serial data signal transmission The data contains a stream of time-multiplexed packets that are linked to each other. Even when a transmitting device has no data to transmit, an MDDI link controller automatically transmits the filling packet, thereby maintaining a stream of packets. The use of a simple packet structure guarantees synchronization timing for video and audio signals or data streams. A packet group is included in a signal element or structure, which is called a sub-frame, and a group of sub-frames is contained within a signal element or structure, called a media frame. A frame contains one or more packets, which are transmitted according to the individual size and data used, and the media frame must contain one or more subframes. The maximum sub-frame rating provided by the agreement used in the present invention is -33-this national standard (CNS) A4 specification (210 X 297 mm) I255118

2 or 4,294,967,295 bytes' and the largest media frame size is 216-1 or 65,535 frames. - The specific identification packet containing the unique identification that appears at the beginning of each subframe is as follows. The identification can also be used to obtain the timing of the frame at the client device when the communication between the host and the display is initiated. The chain, '° timing acquisition is discussed in detail below. Basically, each media frame update/person does not show up when full video is being displayed. The child display frame rate is the same as the media frame rate edge link to support a complete animation video on the entire display, or only a small area of a complete animated video content surrounded by a still image, based on Depending on the application you want. In some low-power mobile applications, such as viewing web pages or emails, the display screen only needs to be updated occasionally. In those situations, it is preferred to transmit a single frame and then close the link to minimize power consumption. The interface also supports stereoscopic effects and handles drawing elements. The presence of the long-term frame allows high-priority packets to be transmitted on a periodic basis. This allows simultaneous isochronous contention to coexist in a minimum amount of bedding buffering. This provides an advantage of the present invention for display processing, which allows for multiple streams of data (high speed transmission of video, voice, control, L, button, etc.) which essentially share a common channel. It uses the less than #唬 to transmit information. It also allows for the presence of display-technology_specific actions, such as horizontal sync pulses and flicker intervals for CRT monitors. F. Chain controller paper

Mms 半 mark half (CMS) A4 specification (^X297 public) A7 B7 1255118 V. Invention description (32) The MDDI link controller shown in Figures 4 and 5 is manufactured or assembled into a complete digital implementation, except A differential line receiver for receiving MDDI data and flashing signals. However, even the differential line driver and receiver can be implemented in the same digital integrated circuit having the link controller. It does not require an analog function or a phase-locked loop (PLL) to implement the hardware of the link controller. The host and display link controllers contain very similar functions, unless the display interface of the state machine that includes the link synchronization is included. Thus, the present invention allows for practical benefits to produce a single controller design or circuit that can be configured as a host or client that reduces the overall manufacturing cost of the link controller. IV. Interface Linking Protocol A. Frame Structure The signal protocol or frame structure used to communicate to the link prior to the implementation of the packet transmission is shown in Figure 6. As shown in Figure 6, the information or digital data, that is, the group composition is known as the element of the packet. Multiple packets are grouped together to form a "secondary frame", and multiple sub-frames are grouped together to form a "media" frame. In order to control the formation of the frame and the transmission of the secondary frame, each of the sub-frames begins with a specially predefined packet, which is referred to as a sub-frame header packet (SHP). The host device selects the data rate to be used for a given transmission. This rate can be dynamically changed by the host device based on the maximum transfer capability of the host, or the data obtained by the host from a source, and the maximum capabilities of the display, or other devices to which the data is being transmitted. A client device at the receiving end is designed or capable of utilizing MDDI or this -35-本^#^^37 National Standard (CNS) A4 specification (21〇) < 297 mm) 1255118

The signal protocol of the invention works - it can be queried by the host to determine the current & current μ large value 'the data transfer rate it can use, or its available - preset slower minimum rate' and (4) Characteristics of the form of information and support. '匕贝讯 can be used—display capability packet (D(7) transmission ^ as described below. The client display device can transmit or use the interface at - pre-selected minimum data rate or within a minimum data rate leak To communicate with other devices, the host will use the data rate within this range to perform a query to determine the full capabilities of the client device. Define the bit map and video frame rate capabilities of the display. Other status information can be transmitted to the host in the -state packet, so the host can set the efficiency or optimize the interface to be as practical as possible, or within any system limits. The host transmits the padding packet. , when there is no (or connected) bead packet to be transmitted in this frame, or when the host is unable to transmit at the rate of sufficient synchronization of the data transfer rate selected by the forward link Because each sub-frame begins with a frame header packet, the end of the previous sub-frame contains a packet (most likely a padding packet) that actually fills the packet first. The sub-frame. If there is no space for the data to carry the packet for itself, a padding packet will most likely be the last packet in the frame, or at the end of the next previous frame and the header packet. Previously, it was to control the operation of the operation in a host device to ensure that sufficient space was left in the subframe of each packet to be transmitted in the subframe. Meanwhile, once the host device initiates transmission Data packet, the host must be able to 36-national standard (CNS) A4 specification (210 X 297 mm) 1255118 V. Invention description (34 enough to successfully complete the size of the packet in a frame without causing a Insufficient data. #In one aspect of the specific embodiment of the present invention, the subframe transmission has two modes. One mode is a periodic subframe mode, which is used to transmit live video and audio streams. In this mode, the subframe length is defined as non-zero. The second mode is an asynchronous or aperiodic mode, in which the frame is used to provide the bitmap data to a display only when there is new information. Loading This mode is defined by setting the frame length = zero in the header packet of the subframe. When using the periodic mode, the second frame of the secondary frame can be synchronized when the child is in the 7F device. In the forward link frame structure, this corresponds to the "synchronized" grievance defined according to the state diagram described below with reference to FIG. 49. In the non-synchronous subframe mode In the beginning, the reception after the first frame header packet is received. B. The format or structure of the packet used by the overall packet structure to form the transmission protocol implemented by the present invention is as follows, which should be noted The interface can be extended, and additional packet structures can be added as needed. The packets are labeled according to their function in the interface, or are divided into different "package forms", that is, the commands they transmit. Or data. Thus, each packet form represents a predefined packet structure for a given packet that can be used to manipulate the packets and data being transmitted. It will be immediately appreciated that the packet may have a pre-selected length or a variable or dynamically varying length depending on its individual function. The byte or byte values used in different packets are set to unsigned integers of multiple bits (8 or 16 bits). The package used and its "Form-37-Home Standard (CNS) A Grid (21 (3 X 297 mm) 1255118 A7 B7 V. Summary of the Invention (35)", in the form of The order is listed, as shown in Table VI. The direction in which a packet is considered valid is also noted, and whether it is to be used in a form of U interface.

Table VI

Packet name packet valid direction form forward reverse form U sub-frame header packet 255 XX padding packet 0 XX video stream packet 1 XXX voice stream packet 2 XXX reserved _ stream packet 3-55 user-defined _ stream packet 56-63 XXX color map packet 64 XXX reverse link wrap packet 65 X display capability packet 66 XX keyboard data packet 67 XXX packet name packet valid direction form forward reverse form U pointing device data packet 68 XXX link closure Packet 69 X Display Request and Status Packet 70 XX Bit Block Transfer Packet 71 XX Bitmap Area Fill Packet 72 XX Bitmap Pattern Fill Packet 73 XX Communication Link Data Channel Packet 74 XXX Interface Form Handover Request Packet 75 X -38- This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 mm) 001790 1255118 A7 B7 V. Invention description (36)

Interface form notification packet 76 X Execution form delivery packet 77 X Forward sound channel enable packet 78 XX Reverse sound sampling rate packet 79 XX Digital content protection burden packet 80 XXX Transparent color enable packet 81 XX Round trip delay measurement packet 82 X Forward Link Skew Correction Packet 83 X The packet has a shared basic structure, or a combination of minimized palms, which includes a packet length field, a packet form field, a data byte block and A CRC field, which is shown in Figure 7. As shown in FIG. 7, the packet length bit contains information in the form of multiple bit or byte values, which specifies the total number of bits in the packet, or its length field and the CRC field. The length between the two. In a preferred embodiment of the present example, the packet length block contains a 16-bit or 2-byte wide unsigned integer that specifies the packet length. The packet form is blocked by another multi-bit field that specifies the form of information contained in the packet. In an exemplary embodiment of the present example, this is an 8-bit or 1-byte wide value in the form of an 8-bit unsigned integer, and specifies the data format for display capability, handover. , video and audio streaming, and more. A third field is a data byte that contains the bit or data being transmitted or transmitted between the host and the client device as part of the packet. The format of the material is specifically defined for each packet form based on the particular form of material being transmitted, and can be divided into a series of additional blocks, each of which has its own format requirements. In other words, each -39- is using the Chinese National Standard (CNS) A4 specification (210 x 297 mm) 1255118 A7 B7 V. Invention Description (37 package form will have a definition of this part or field Format. The last field is the CRC field, which contains the result of a 16-bit cyclic redundancy check that calculates the data byte, packet form, and packet length block, which is used to determine the information in the packet. Integral. In other words, the calculation of the entire packet does not include the CRC field itself. The client usually keeps the total number of detected CRC errors and reports this number back to the host in the display request and status packet (see below) During the transmission of the packet, the transmission of the field is first opened from the least significant bit (B) and ends with the most significant bit (MSB) of the last transmission. The parameters exceeding the length of one byte are used first. The least significant byte is transmitted, which results in a transmission pattern using the same bit for parameters longer than 8 bits, as if the shorter number of passes of the LSB was transmitted first. The data on the MDDI_Data signal path is aligned Incumbent Form], the form 111U of the byte transmitted on the interface in the form 111 or the pattern of the form ~. The column line, as in the traditional electronic technology: first 2 sends the rightmost pixel of a column After that, in the phase, the prime is passed as the leftmost pixel of the lower-column. The pixel column usually transmits :: prime number display from up to T, although the projection requires other %: most When processing the bitmap, it depends on the grievance. The upper left corner of the meta-graph is used as the position or offset": 2: By marking, 疋水疋出_ _40- S Α4 specification (21〇X 297 humiliation) 1255118 A7 B7 V. Description of invention (38 reference point. The X and γ coordinates used to define or determine the position in the bit map are respectively adjacent to the bit The value is increased on the right and below the graph. The first column and the first row start with the index value C C. Packet definition 1. The sub-frame header packet The sub-frame header packet for each The first packet of the subframe, and has the basic structure as shown in Figure 8. As can be seen from Figure 8, the structure of the packet has a packet length, The packet form, unique character, sub-frame length, protocol version, number of sub-frames, and number of media frames are usually in this order. Such packets are usually identified as a form of 255 (16-bit is Oxff). Packets, and use a pre-selected length of 17 bytes. When the packet form block uses a one-tuple value, the unique character field uses a 3-byte value. The combination of 4 bytes forms a unique character with a good auto-correlated 3 2 bits. The actual unique character is 0x005a3bff, where the lower 8 bits are transmitted as the packet form, and the most effective 24 The bit is then transmitted. The sub-frame length field contains information of 4 bytes to specify the number of bytes per subframe. The length of this block can be set equal to 〇 to indicate that the host will only transmit one subframe before the link is closed to a standby state. The value in this field can be dynamically changed "immediately" when transitioning from one frame to the next. This capability can be used to make minor timing adjustments in the sync pulse to accommodate isochronous data streams. If the CRC of the header header packet is not valid, the controller must use the length of the subframe of the previously known good subframe header packet to estimate the current time. -41 - Paper Home Standard (CNS) A4 Specifications (210X297 mm) 1255118 A7 B7 V. Description of invention (39) Length of the frame. The protocol version field contains 2 bytes that specify the protocol version used by the host. The agreement version field is set to '〇, to specify the first or current version of the agreement being used. This value will change over time as new versions are created. The subframe count field contains 2 bytes, which refers to a sequence number that represents the number of subframes that have been transmitted since the beginning of the media frame. The number of subframes in the first frame of the media frame is 0. The value of the last frame of the media frame is n_l, where η is the number of subframes per media frame. Please note that if the frame length is set to 0 (representing an aperiodic subframe), the number of frames must also be set to 〇. The #Media Frame Count field contains 3 bytes that specify a sequence number that represents the number of media frames that have been transmitted since the media frame began. The first media frame of a media item has a number of media frames. The number of media frames is increased before the first subframe of each media frame, and is wrapped back to 〇 after using the maximum number of media frames (the number of media frames is 224-1 2, 16, 777, 215). The number of media frames can usually be reset by the host at any time to meet the needs of a terminal application. 2 Filling Packets A Filling Packet is a packet that is transmitted to or transmitted from a client device when there is no other information available for transmission on the forward or reverse link. It is recommended that the padding packet have a minimum length to allow for the maximum resiliency of other packets to be transmitted when needed. Wrap the package in a frame or a reverse link _____ -42- This paper size applies to the Chinese National Standard (CNS) Α4 specification (21〇χ297 mm) 001794 1255118 A7

= terminal (see below)' A link controller sets the size of the padding packet to have no room left to maintain the integrity of the packet. The format and content of a padding packet are shown in Figure 9. As shown in Figure 9, the structure of such a packet has a packet length, a #packet form, a padding byte, and a crc field. Such packets are usually identified as a form 〇, which is indicated in a byte form field. The bit or byte in the padding byte field contains a variable number of all 0 bit values"" allows the padding packet to be of the required length. The smallest padding packet does not contain bits in this bin. That is, the packet contains only the packet length, the packet format and the CRC, and uses a pre-selected fixed length of 3 bytes. 3. The video stream packet video packet carries the video data to update a display device. It is basically a rectangular area. The size of this area can be as small as a single pixel, or up to the entire display. It can display an unlimited number of streams almost simultaneously, limited only by system resources, because all need to display the rate The content of the stream is included in the video stream packet. The format of the video stream packet (the video data format description mushroom) is shown in Figure 10. As shown in Figure 1, the structure of the packet is packet length (2 bits). Tuple), packet form, video data description symbol, display attribute, X left edge, Y upper edge, X right edge, γ lower edge, X and γ start, number of pixels, parameter CRC, pixel data, and CRC column Such a packet is typically identified as Form 1, which is indicated in the 1 byte form field. The above-described common frame concept is an effective way to minimize the size of the sound buffer and reduce hysteresis. For video data, it must be developed to expand the pixels of a video frame to multiple video streams of a media frame. 43 National National Standard (CNS) A4 specification (21〇X 297 mm) 1255118

package. It is also very likely that the pixels in a single video stream packet will not correctly correspond to a perfect rectangular window on the display. For the exemplary frame rate of 30 frames per second, there are 3 frames per second, which produces 1 frame for each media frame. If there are 480 columns of pixels in each frame, the video stream packet in each frame will contain the pixels of the column. In other cases, the video stream packet may not contain an integer number of columns of pixels. The size of other video frames is also established. The number of sub-frames in each media frame is not divided into the number of columns (also called video lines) of each video frame. Each video stream packet must contain an integer number of pixels, even though it may not contain an integer number of columns of pixels. This becomes very important if each pixel exceeds one byte, or if it is in the form of a packet as shown in Figure 12. The format and content used to implement the above described video data descriptor are shown in Figure 1 la-1 Id. In Figure na-丨ld, the video data formatter contains two 16-bit unsigned integer bytes that specify the format of each pixel in the pixel data in the current stream of the current packet. It is possible that different video stream packets can use different pixel data formats, that is, use different values in the video data format descriptor, and similarly, any string '" tile (area of the remote display) can be immediately Change its data format. The View Data Format Descriptor defines the pixel format of the current packet, but it does not indicate that a fixed format will continue to be used during the lifetime of a particular video stream. Figure 1 la to 1 Id shows how the video data format descriptor is encoded. As in the users of these drawings, when the bit [15:13] is equal to, 〇〇〇, when, such as _____ -44- This paper national standard (CNS) A4 specification (210X297 dongdong) 1255118 A7 _______ B7 five Figure 1 la shows that the video material comprises an array of monochrome pixels, wherein the number of bits per pixel is defined by bits 3 to 0 of the video data formatter character. . The bit 丨丨 to 4 is set to 〇 in this case. In addition, when the position 兀[15:13] is equal to 〇(Π', as shown in FIG. 11b, the video data includes an array of color pixels, each of which is assigned a color through a color map. In this case, 'The video data formatter's bits 5 to 〇 define the number of bits per pixel, and the bit 丨丨 to 6 is set equal to 〇. In addition, when the bit [15:13] is equal to '〇1 〇' As shown in FIG. 11c, the video material includes an array of color pixels, wherein the number of bits of each red pixel is defined by bits 11 to 8, and the number of bits of each green pixel is determined by bits. 7 to 4 define 'the number of bits per blue pixel is defined by bit 3 to 。. In this case, the total number of bits in each pixel is the number of bits used in red, green, and blue. However, when the bit [15:13] is equal to 〇11, as shown in Figure ild, the video data includes a video data array in the 4:2:2 format with illumination and color. Degree information, in which the number of bits per illuminance (Y) pixel is defined by bits 11 through 8, the Cr component The number of bits is defined by bits 7 through 4, and the number of bits of the Cb component is defined by bits 3 to 。. The total number of bits in each pixel is the bits used for red, green, and blue. The sum of the numbers. The Cr and Cb components are transmitted at one-half the rate of γ. In addition, the video samples in the pixel data portion of the packet are organized as follows: Yn, Crn, Cbn, Yn + 1, Yn + 2, Crn + 2, Cbn + 2, Υη + 3 where (^ and Cbj are related to Υη and Υη + 1 and Crn + 2 and Cbn + 2 are related to Υη + 2 and Υη+ 3, etc. If at present On a column in the stream (X right edge - X left edge + 1) -45 - This paper size applies to China National Standard (CNS) Α 4 specifications (210X297 public --- 001797 1255118 A7 B7

5. The number of pixels in the invention (43) is an odd number, and the Cb value of the last pixel applied in each column will be based on the Y value of the first pixel of the next column. For all four formats shown in the figure, bit 12, which is labeled ^ "P", specifies whether the pixel data sample is a packet, or a byte-oriented pixel data. In this field The value '0' represents that each pixel and each color system in each pixel in the pixel data field is aligned with a Mddi interface byte set. A value '1' represents the pixel data. Each pixel and each color in each pixel is encapsulated for a previous pixel or color within a pixel, leaving unused bits. The first video in the media frame of a particular display window The first pixel in the stream packet will enter the upper left corner of the stream window defined by the X left edge and the Y upper edge, and the next received pixel will be placed in the next pixel position in the same column. In this first packet of a media frame, the X start value is usually equal to the X left edge, and the γ start value will usually be equal to the Y upper edge. In the subsequent packets corresponding to the same honor window, the X And the gamma opening value will usually be set to be in the screen view. The pixel location, which will typically follow the last pixel passed in the video stream packet transmitted in the previous subframe. 4. Sound Rate Stream Packet The voice stream packet carries the sound to be played through the sound system of the display. The data is used for a separate sound presentation device. Different sound data streams can be configured in separate sound channels in an audio system, for example, left front, right front, center, left depending on the form of the sound system used. Rear and right rear. A complete sound channel is provided for the headphones, among which

1255118 A7 B7 V. INSTRUCTIONS (44) Contains improved spatial acoustic signal processing. The format of the voice stream packet is shown in FIG. As shown in FIG. 13, the structure of such a packet has a packet length, a packet format, a sound channel ID, a number of sound samples, a bit and a package of each sample, a sound sampling rate, a parameter CRC, a digital sound data, and a CRC block of sound data. Bit. Such a packet is usually identified as a form 2 packet. The bit and wrapper of each sample contains a byte of an 8-bit unsigned integer form that specifies the wrapper format of the sound material. The format commonly used is bits 4 through 0 to define the number of bits per PCM sound sample. Bit 5 then specifies whether the digital sound data sample is packaged. The difference between the packaged and byte-oriented sound samples is shown in Figure 14. A value means that the boundary of each PCM sound sample and an MDDI interface byte in the digital sound data field is aligned with a byte, and the value T represents each successive PCM sound sample for the previous sound. Samples are packaged. This bit is only valid if the value defined by bits 4 through 0 (the number of bits per PCM sound sample) is not a multiple of eight. Bits 7 through 6 are reserved for future use and are typically set to a value of zero. 5. Reserved Streaming Packets Packets 3 through 55 are reserved for use with • stream packets to be defined for future versions or changes to the packet agreement, which are required when encountering different applications. Again, this is a part of making the MDD interface more resilient, and compared to other techniques, it is very useful in the face of constantly changing technology and system design. 6. User-defined _flow packets are in the form of 8 slanting flows, referred to as Forms 56 to 63, which are reserved for exclusive-47- paper scales applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ) 001799

装

Line 1255118 A7 B7 V. Application of the invention (45), which can be defined by the device manufacturer for the MDDI link. These are known as user-defined _ stream packets. The video stream packet carries video data to update (or not update) a rectangular area of the display. The definition of turbulence parameters and data in the form of these packets is left to the specific equipment manufacturer to find out their usage. The format of the user-defined stream packet is shown in Figure 15. As shown in FIG. 15, the structure of such a packet has a packet length (2 bytes), a packet format, a stream ID number, a stream parameter, a parameter CRC, a stream data, and a CRC data field CRC field. 7. Color Map Packet This color map specifies the content of a color map lookup table used to render the color of a display. Some applications will require a color map that is larger than the amount of data that can be transferred in a single package. In these examples, a plurality of color map packets can be transmitted, each having a different combination of the color maps' by using the offset and length fields described below. The format of the color map packet is shown in Figure 16. As shown in Figure 16, the structure of such a packet has a packet length, a packet format, a color map data size, a color map offset, a parameter CRC, a color map data, and a data crc field. Such a packet is usually identified as a form of 64 packets. 8. Reverse Link Wrap Packet The data is transmitted in the reverse direction using a reverse link wrap packet. It transmits a forward link packet, and the MDDI link operation (transfer direction) changes or is placed in the middle of the packet, so the packet can be transmitted in the reverse direction. The format of the reverse link wrap packet is shown in FIG. As shown in Figure 17, the structure of such a packet has a packet length, a packet form, and a reverse -48 National Standard (CNS) A4 specification (210 X 297 public praise) 1255118

Link flag, steering length, parameter CRC, steering 丨, reverse data packet, and steering 2. Such packets are typically identified as Form 65 packets. The behavior of the MDDI link controller is to transmit a reverse link wrap packet = a special method. The MDD mask has a flash cut signal, which == is driven by the king-by-king machine. The host acts as if it were transmitted for each bit of the reverse and reverse data packet portion of the reverse link wrapper packet: the two-child host during the two turnaround times and the time configured for the reverse data packet Inside, triggers the MDD]LStr〇be signal at each bit boundary. (This is the same action as the data that is being transmitted as it is). The host disables its MDDI data signal line driver during the time period specified by ^1, and the client re-enables its line during the drive re-enabling field after the time period specified by the Turn 2 field. driver. The display reads the steering length parameter and drives the data signal toward the host, which is performed immediately after the last bit in the 1st shift. The display uses the packet length and steering length parameters to know the length of time it can be used to transmit packets to the host. The client can transmit a padding packet or drive the data line to a zero blame when it has no data to transmit to the host. If the data line is driven to 〇, the host interprets this as a zero-length packet (not a valid length), and the host does not receive any from the duration of the current reverse link-wrapping packet. The client's packet. The display drives the MDDI data line to the zero level for at least one reverse link clock cycle prior to the start of the turn 2 field. This keeps the data line in a determined state during the turn 2 . If the client no longer has a packet to transmit, it is even after the -49- paper scale applies to the Chinese National Standard (CNS) Α4 specification (210 X 297 mm) after being driven to zero level.

00180J

Install π

Line 1255118 A7 B7 V. Description of Invention (47) This data line can be disabled because the hibernation bias resistor (discussed elsewhere) keeps the data line at zero level for the remaining reverse data packing fields. The reverse link request block of the display request and status packet can be used to inform the host of the number of bytes required by the display in the reverse link wrap packet to transfer data back to the host. The host attempts to agree to the request by configuring at least the number of bytes in the reverse link wrapper. The host can transmit more than one reverse link wrapper in one frame. The display indicates that a display request and status packet can be transmitted at almost any time, and the host will interpret the reverse link request parameter as the total number of bytes requested in the primary frame. 9_Display Capability Packets A king machine needs to know the capabilities of the display (client) it communicates with, thereby setting the host-to-display link to a generally optimized or desired manner. The built-in 7F 7F transmits a display capability packet to the host after synchronizing the forward link. The transmission of such packets is considered necessary when the host requests to use the reverse link flag in the reverse link wrapper. The format of the display capability packet is shown in FIG. As shown in FIG. 18, the structure of such a packet has a packet length, a packet format, a protocol version, a minimum association version, a bit 7C map width, a bit map height, a monochrome capability, a color map capability, an RGB capability, and Y Cr. Cb capability, display feature capability, data rate capability, frame rate capability, sound buffer depth, sound stream capability, sound material capability, minimum sub-frame material, and GRG blocking. Such a packet is usually identified as a form 66 packet. 10. Keyboard data package This paper ruler-50- 1255118 A7 B7 V. Invention description (48 A keyboard data package is from the client, the Saki device transmits the keyboard data to the child host. A wireless (or wired) keyboard Can be used with _ 显示器 冋 冋 或 或 或 ' ' 其 其 其 其 其 其 其 其 其 其 其 其 ' ' ' ' ' ' ' 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The device is connected to the host. The packet can also transfer data to the keyboard before the child. The format of the keyboard data packet is not as shown in Figure 19, and contains different bytes from a keyboard. The number of 杳4 JB. As shown in Figure 19, the structure of such a packet has a packet length, a closed τ岜 form, a keyboard data, and a CRC field. Such a packet is usually identified as a form 67 packet. The device data packet-pointing device data packet is transmitted from the display to the host by a wireless mouse or other pointing device. The data can also be transmitted to the pointing device using the packet on the forward link. The format of a pointing device data packet is shown in Figure 20, which contains information on the number of different bytes from a pointing device. As shown in Figure 20, the structure of the packet has packet length, packet form, pointing device data and CRC field. Such a packet is usually identified as Form 68, which is indicated in a byte form block. 12. Link Close Packet A Link Close Packet is transmitted by the host to the client display to represent The MDDI data and flash cut will be turned off and enter a "hibernation" state with low power consumption. This packet can be used to close the link and be transmitted to the display by a swaying device in static bit 0. Later, the power is retained, or when there is no further information to be transmitted from the host to a client from now on. When the host transmits the packet again, it resumes normal operation. In winter-51 - ^ paper (10) 4^0, (CNS) Α4—Α格 (21G〗 297 mm 1255118 A7 B7

V. INSTRUCTIONS The first packet transmitted after the sleep is displayed is a header packet. The format of the state packet is shown in Figure 21. As shown in Fig. 21, the structure of the platform to the river bag has a packet length, a packet form, and a CRC field. Such a package can be generally identified as a form 69 packet in the one-tuple form field umbrella, and τ ia uses a pre-selected length of 3 bytes. In the low-power hibernation state, the MDDI Data driver is crying #人二-t assisted to be disabled to a high-impedance state, and the MDDI Data signal is used - diverging 4 - I and anti-biasing network to pull Up to a logical state, the flashing signal used by the display to drive the interface is set to _p < a logical zero level in the hibernation state to minimize power consumption. The host or display can cause the MDDI link to be "awakened" by the hibernation state, as described elsewhere, 2 being a key advancement and benefit of the present invention. 13. Display Request and Status Packets The host needs a small amount of information from the display, so it can be used to set up the host-to-display link in an optimal way. It is recommended that the device transmit a display status packet to the host in each subframe. The display must transmit the packet as the first packet in the reverse link wrapper packet to ensure reliable delivery to the host. The format of a display status packet is shown in Figure 22. As shown in FIG. 22, the structure of such a packet has a packet length, a packet form, a reverse link request, a CRC error count, and (: Han (: field. Such a packet is usually identified as a form 7 〇 packet in The one-tuple form is in the rogue position and uses a pre-selected length of 8 bytes. The child reverse key, the knot request block can be used to inform the host that the display is in the reverse link wrapper package. The number of bytes needed to transfer data back to the main-52-

1255118 A7 B7 V. Description of the invention (50 machines. The host must attempt to agree to the request by configuring at least the number of far tuples in the reverse link wrapper. The host can transmit more than once in the message frame. A reverse link wraps the packet to accommodate the data. The display can transmit a display request and status packet at any time, and the host interprets the reverse link request parameter in a frame The total number of requested bit groups. The extra details of how the reverse link data is transmitted back to the host and the specific examples will be shown below. 14. Bit Block Transfer Packets This bit block transport packet provides a way to Scrolling in any direction, zone 4 of the display. A display with this capability will report this capability in the bit of the display feature capability indicator of the π capability packet. The format of the one-bit block transfer packet Shown in Figure 23. As shown in Figure 23, such a structure has a packet length, an upper left X value, a top left gamma value, a visual visibility of 'A degree, a window X movement, a window gamma movement, and a CRC field. Kind of seal The package is usually identified as a form of 71 packets and uses a pre-selected length of 15 bytes. ' This block is used to specify the X and Y values of the coordinates of the upper left corner of the window to be moved. Width and height, and the number of pixels in the vertical movement of the image. The positive values of the last two blocks cause the window to be moved to the right; ^ π 士丫 A $丄, and 10,000, and The value causes the movement to be easily initialized to the left to display the display having the capability. The bit map area fills the packet and the far bitmap area fills the packet to provide an area of a display into a single color.

1255118

This capability is reported in bit 7C 1 of the Display Feature Capability Indicator field of the Display Capability Packet. The format of a bitmap fill pad is shown in the figure. As shown in Fig. 24, the structure of such a packet has a packet length, a packet form, a left-side X value, a top left γ value, a window width, a window height, a data format description, a pixel area fill value, and a CRC block. Such a packet is typically identified as a form 72 packet in the one-tuple form of the block, and a pre-selected length of 17 bytes is used. 16. Bitmap Pattern Filler Packet The Bitmap Pattern Filler Packet provides a way to easily initialize an area of the display to a pre-selected pattern. It is apparent that this capability will report this capability in bit 2 of the Display Feature Capability Indicator field of the Display Capability Packet. The upper left corner of the fill pattern is aligned with the upper left corner of the child to be filled. If the window to be filled is wider or taller than the fill pattern, the pattern can be filled horizontally or vertically several times to fill the view. The right or below the last repeated pattern can be cut as needed. If the window is smaller than the fill pattern, the right or bottom side of the fill pattern can be cropped to conform to the window. The format of a one-bit pattern fill packet is shown in Figure 25. As shown in FIG. 25, the structure of the packet has a packet length, a packet form, an upper left X value, a top left threshold, a window width, a window height, a pattern width, a pattern height, a data format descriptor, a parameter CRC, and a pattern pixel. Information, and 2 data CRC fields. Such packets are typically identified as Form 73, which is indicated in a byte form field. 17.Communication Link Data Channel Packets This paper Erqingguo -54- Home Standard (CNS) Α4 Specifications (21〇χ297 mm)

1255118 A7 B7 V. INSTRUCTIONS (52) The communication link information packet provides a means for the display to have a high level of computing power, such as a PDA, for communicating with a wireless transceiver, such as a mobile telephone or wireless data device. In this case, the MDDI link can serve as a convenient high speed interface between the communication device and the computing device having the mobile display, wherein the packet conveys data on the data link layer of the operating system of the device. In this case, the packet can be used when the web browser, email client or the entire PDA is built into a mobile display. A display with this capability will report this capability in the display capability indicator of the display capability packet. Bit 3 is in. The format of a communication link data overnight packet is shown in Figure 26. As shown in Figure 26, the structure of the packet is packet length, packet format, parameter CRC, communication link data and communication. Data CRC block. This type of packet is usually identified as form 74 in the form field. 1 Heart interface form delivery request packet The interface type #交交The packet is requested to cause the host to request the client; the display is offset from an existing or current mode to the form 序列 (sequence), form (2-bit contention) ΉΙΙΙ (4-bit rate column), or the form ιν ( 8-bit^ mode. Before the host requests-special mode, it must confirm that the display device can operate in the desired mode by viewing the display feature capability indicator field in the packet; The bit format is 6 and 7. The format of a <face form handover request packet is shown in Figure 27. As shown in Figure W, this tooth

The structure of the packet has a packet length, a packet form, an interface form, and a CR field. Such a packet is usually identified as a form of 75 packets, and the brigade uses a length of 4 bytes selected first. ’

1255118 A7 B7 Description of the invention (19. Interface form notification packet, two-sided form notification packet is transmitted by the display to confirm receipt of the interface form human packet.. The pattern of the request, Form I (sequence), Form II (2 bits)兀 string), Form III (4-bit string), or Form IV (8-bit string) mode responds to the host as a parameter in this packet. The format of an interface form, s-packet is shown in Figure 28. As shown in Figure 28, the structure of such a packet has a packet length, a packet form, an interface form, and a CRC field.

The seal is identified as a form of 76 packets and uses a pre-selected 4-byte. I 20 · Execution Form Handoff Packet (10) and $仃 Form Parent Packet are a way for the host to command the display, and 1 is passed to the mode specified in the packet. This is the previous request and notification by the interface-type parent request packet and the interface form. ^:弋*Host and the host must switch to the mode after sending the packet. The child shows that he will lose and re-key the synchronization during the change of mode. - The format of the execution form delivery packet is shown in Figure 29. As for 29, the structure of such a package has a packet length, a packet form, and a C R C booth. This broadcast 4s β, a such packet is usually identified as a form 77 packet in the tuple form of the shelf, % m 〒* and uses a preselected length of 4 bytes. 2 1. Forward Sound Channel Enable Packet This packet allows the host to enable or disable the sound in the display to make the display (client) turn off the sound: : 2. A piece of equipment to shoulder power when the host does not have a sound. This is obviously more difficult to implement implicitly if only -56 - 1255118 A7 B7 is used. 5. Inventive Note (54 The presence or absence of bone flow is used as an indicator. Preset state when the display system is turned on That is, all the sound channels are enabled. The format of the forward packet to the sound channel is shown in Figure 3. As shown in Figure 3, the structure of the packet is packet length, packet format, and sound channel. The mask and the CRC field are enabled. Such a packet is typically identified as a form 78 packet in the one-bit group format field and uses a pre-selected length of 4 bytes. 22. Reverse sound sampling rate Encapsulating the packet allows the host to enable or disable the reverse link sound channel and set the sound data sampling rate of the stream. The host selects a sampling rate, which is defined as being in the display capability packet. Valid. If the host selects an invalid sampling rate, the display will not transmit a stream to the host. The host can disable the reverse link sound by setting the sampling rate to 255. The preset state system It is assumed that the power supply or connection is turned on when the display system is initially turned on, and the reverse link sound stream is disabled. The format of a reverse sound sampling rate packet is shown in Fig. 31. As shown in Fig. 31, such a packet The structure has a packet length, a packet form, a sound sampling rate, and a CRC block. Such a packet is usually identified as a form of 79 packets, and uses a pre-selected length of 4 bytes. 23. Digital Content Protection Burden Packet The packet allows the host and a display to exchange messages regarding the digital content protection method, which currently considers the use of two content protections, as well as Digital Transmission Content Protection (DTCP) or High-Frequency Digital Content Protection System (HDCP), which retains space. As a way to protect other future protection methods, the method used is specified in this package with content protection form parameters. One digit content -57- X 297 mm) National Standard (CNS) A4 Specification (210 1255118 A7 B7 Five Description of the invention (55) The format of the protection burden packet is shown in Fig. 32. As shown in Fig. 32, the structure has a packet length, a schematic package form, a content protection form, and an inner: 4 burden message and cue field. This package usually recognizes the package. I condolences are a form 80. 24. Transparent color enable package This transparent color enable package is used to specify a transparent, i use In order to enable or disable the use of a transparent color to display two: a display having this capability will report the capability in the display of the display capability packet: = force in the bit 4: when having a transparent color: When the value I pixel is written to the bit map, the color does not change. The format of a transparent color enable packet is shown in Figure 33. If the value of the packet is changed, the structure of the packet has a packet length, a packet form, Transparency = Enable, Data Format Descriptor, Transparent Pixel Value, and CRC Placement. / Type = Normally recognized as Form 81 in the (4) tuple form field, and pre-selected with I is a fixed length of 10 bytes. 25. Round-trip delay measurement packet delay measurement packet (4) to measure the delay from the host to the end (5) (transfer delay, plus the delay returned by the client (display) to the host. This measurement is essentially Included in the line driver and receiver, and the delay in the interconnect subsystem. This measurement is used to set the round trip delay and reverse link rate divisor parameters in the reverse bond wrap packet. As described generally above, this packet is most useful when the MDDI link is running at the highest rate for a particular application. The signal is as if all zero data is being transmitted during the following block. 58- This paper scales Chinese national standard (^τι^(210 χ 297¥17 001810 1255118

Two guard time' and the measurement period. This causes the trigger to be (-) half of the data rate, so it can be used as the periodic clock in the display. The format of the round trip delay measurement packet is shown in Figure 34. As shown in Figure 34, the structure of such a packet has packet length, packet form, parameter CRC, all zeros, guard time 1, measurement period, guard time 2, and drive re-enabling field. Such a packet is typically identified as a packet of Form 82 and uses a pre-selected fixed length of 533 bits. The sequence of events occurring during the round-trip delay measurement packet is shown in FIG. In Figure 35, the host transmits the round trip delay measurement packet, which is shown to have a parameter crc = flash (four) quasi-field after all zero and guard time blocks. - A delay of 35 〇 2 occurs before the packet arrives at the client display device or processing circuitry. When the display receives the packet, it transmits ▲ Oxff, Oxff, and 〇χ〇 patterns as practically as accurate as possible at the beginning of the measurement period, as determined by the display. The actual time at which the display begins to transmit the sequence is delayed from the point of view of the measurement cycle by the beginning of the measurement cycle. This amount of delay is exactly the time it takes for the packet to pass through the child line driver, receiver, and the interconnect subsystem. A similar amount of delay 3504 causes the pattern to be returned to the host by the display. In order to determine the round-trip delay time that the client is traveling from the client, the king calculates the number of bits in the period after the start of the measurement period until the Oxff, Oxff, and the Oxff are detected. The beginning of the 0x0 sequence. This information is used to determine the time of a round-trip signal transmitted by the host to the client and returned again. Then, about half of this amount of time is marked as a ____ -59 - this paper is folded fSi Ϊ国^5^714 gauge i^iox 297 mm) 1255118 A7 B7 V. Invention description (57) Signal to the client The delay caused by a single path channel. In addition to its line driver, the display essentially occurs immediately after the last bit of the Oxff, Oxff, 0x0 pattern is transmitted. Guard Time 2 allows the line driver time of the display to fully enter the south impedance state before the host transmits the packet length of the next packet. The hibernating pull-down and pull-down resistance (see Figure 42) ensures that the MDDI_Data signal can be maintained at an active low level during the period in which the line driver is simultaneously disabled in the host and display. 26. Forward Link Skew Correction Packet The forward link skew correction packet allows a client or display to correct for differences in the transfer delay of the MDDI_Data signal relative to the MDDI_Stb signal. Without delay skew compensation, this maximum data rate is usually limited by the change in the worst possible condition among these delays. In general, this packet is only transmitted when the forward link data rate is set to a rate of about 50 Mbps or lower. After transmitting this packet to calibrate the display, the data rate can be increased stepwise above 50 Mbps. If the data rate is set too high in the skew correction process, the display can be synchronized to the alias of the bit period, which causes the delay skew compensation setting to be turned off for more than one bit time, resulting in an incorrect data clock. . The interface of the highest data rate form or the largest possible interface form is selected prior to transmitting the forward link skew correction packet, so all existing data bits are corrected. The format of a forward link correction packet is shown in FIG. As shown in Figure 56, the structure of this packet has the packet length (2-bit, group), packet form, and parameters _-60-_ This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). 001312 1255118 A7 B7 V. INSTRUCTIONS (58) CRC, calibration data sequence and CRC block. Such a packet is generally identified as a form 83 packet in the form field and has a preselected length of 5 15 °

D. Packet CRC The CRC block appears at the end of the packet. Sometimes, after some of the more critical parameters in a packet, it can be associated with a significantly larger data block, so it will increase during transmission. The possibility of error. In a packet with two CRC fields, the CRC generator, when only one is used, re-initializes after the first CRC, so the operation of the CRC after a long data field is not subject to the start of the packet. The influence of the parameters at the place. In an exemplary embodiment of the invention, the polynomial used in the CRC calculation is known as CRC-16, or X16 + X15 + X2 + X. . A sample implementation of a CRC generator and inspector 3600 can be used to implement the inventors and is shown in FIG. In FIG. 36, a CRC register 3602 is initialized to a value of 0x000 1 just before the first bit of a packet is transmitted, and the input is on the Tx_MDDI_Data_Before_CRC line, and then the byte of the packet is first biased. Move to the scratchpad starting with the LSB. Note that the register bit number in this figure corresponds to the order of the polynomial used, not the bit position used by the MDDI. It is more efficient to offset the CRC register in a single direction, which results in a bit position 0 with the CRC bit 15 appearing in the MDDI CRC clamp, and in the MDDI CRC field bit position 1 The CRC register bit 14 and so on until the MDDI bit position 14 is reached. For example, if the content of the display request and status packet is: 001813 _61_ This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm)

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1255118 A7 B7 _ V. Description of the invention (59) 0x07, 0x46, 0x000400, 0x00 (or represent a sequence of bytes: 0x07, 0x00, 0x46, 0x00, 0x04, 0x00, 0x00), and use the multiplexer 3604 And 3606, and NAND gate 3608, the resulting CRC output is OxOeal on the Tx-MDDI_Data_With_CRC line (or expressed as a sequence of Oxal, OxOe). When the CRC generator and checker 3600 is set to a CRC checker, the CRC received on the Rx_MDDI_Data line is input to the multiplexer 3604 and the NAND gate 3608, and uses the NOR gate 3610, exclusive or (XOR) gate 3612. , and AND gate 3614 to compare with the value found in the CRC register one bit at a time. If there are any errors, i.e., output by the AND gate 36 14 , the CRC is incremented once for each packet containing a CRC error by connecting the output of the gate 3614 to the input of the register 3602. Note that the example circuit shown in the diagram of Figure 36 can output more than one CRC error signal in a given CHECK_CRC_NOW window (see Figure 37b). Therefore, the CRC error counter will count the first CRC error instance in each time period in which CHECK_CRC_NOW is initiated. If set to a CRC generator, the CRC is clocked outside of the CRC register, the time of which overlaps the end of the packet. The timing of the input and output signals, and the enable signal are shown at 37a and 37b. The generation of a CRC and the transmission of a packet data are shown in Figure 37a, which has a Gen_Reset, Check_CRC_Now, Generate_CRC-Now, and Sending_MDDI_Data signals of state (0 or 1), and the Tx_MDDI_Data_Before_CRC A Data-With-CRC signal with Tx_MDDI. The receipt of a package and the inspection of the CRC value are shown in Figure 001814 _^_ This paper scale applies to the Chinese National Standard (CNS) A4 specification (210X297 mm) 1255118 A.7 B7 V. Description of invention (60)

In 37b, it has states Gen_Reset, Check_CRC_Now, Generate_CRC_Now, and Sending_MDDI_Data ^signals^, and the Rx_MDDI_Data and CRC error signals. '^ 5 t L V. restarted by the hibernation chain When the host resumes the forward link by a hibernation state, it drives MDDI_Data to a logic 1 state for about 150 psec, then starts MDDI_Stb and simultaneously drives MDDI_Data is about 50 psec for a logic 0 state and then begins the forward link traffic by transmitting a frame header packet. This typically allows the bus bar connection to be determined before the sub-frame header packet is transmitted for a sufficient set time between the signals provided. When the client, here a display, requires data or communication from the host, it drives the MDDI_DataO line to a logic 1 state for about 70 psec, although other cycles may be used as needed, and then by placing it A high impedance state to disable the driver. This action causes the host to start or resume data traffic on the forward link (208) and poll the client for its status. The host must detect the presence of the request pulse within 50 psec and then start the boot sequence to drive MDDI_DataO to logic 1 for approximately 150 psec and to logic 〇 approximately 50 psec. The display must not transmit the January service request pulse if it detects that MDDI_DataO is in the logic 1 state for more than 50 psec. The nature of the time and tolerance selection for the time period of the hibernation treatment and initiation sequence is discussed further below. An example of a typical service request event 3800 without competing processing steps is shown in Figure 3 8, where the events use the letters A, B, C, D, E, F, and G for convenience of explanation. The process is performed at point A, when the host transmits -63- 4 1255118 A7 B7 V. Invention Description (61) sends a link to close the packet to the client device to inform it that the link will switch to a low-power hibernation status. In the next step, the host enters the low power hibernation state by disabling the MDDI_DataO driver and setting the MDDI_Stb driver to logic 0, as indicated by point B. MDDI_DataO is driven to a zero level by a high impedance bias network. After a period of time, the client transmits a service request pulse to the host by driving MDDI_DataO to a logical one level, as shown at point C. The host still uses the high impedance bias network to establish the zero level, but the driver in the client forces the line to a logic 1 level. Within 50 psec, the host recognizes the service request pulse and establishes a logic 1 level on MDDI_DataO by enabling its driver, as indicated at point D. The client then stops trying to establish the service request pulse, and the client places its drive into a high impedance state, as indicated at point E. The host drives MDDI_DataO to a logic 0 level of 50 psec, as indicated by point F, and also begins to generate MDDI_Stb in a manner that conforms to the logic 0 level on MDDI_DataO. After asserting MDDI_DataO to a zero level and driving MDDI_Stb 50 psec, the host transmits data on the forward link by transmitting a frame header packet, as indicated at point G. A similar example is shown in Figure 3 9, where a service request is established after the chain restart sequence has been initiated, and the event is again marked with the letters A, B, C, D, E, F, and G. This represents a worst-case strategy in which the request pulse from the client is closest to destroying the header header packet. The process begins at point A, when the host again transmits a link closure packet to the client device to inform it that the link will transition to a low power -64- paper size standard (CNS) A4 specification (210X297 public) PCT) 1255118 A7 __ B7 V. Description of the invention (62^^ hibernation state. In the next step, the host enters the low-power hibernation state by disabling the MDDI_DataO driver and setting the MDDI_Stb driver to a logic port, such as As shown in B. As mentioned above, MDDI_DataO is driven to a zero level by a high impedance bias network. After a period of time, the host starts the link by driving MDDI_DataO to a logic 1 level of 150 psec. Restart the sequence as shown at point C. Before 50 psec, after the link restarts the sequence, the display is started and the MDDI_DataO-segment 70 psec time is also established, as shown at point D. Because the display needs to request service from the host, and cannot recognize that the host has started the link restart sequence. Then the client stops trying to establish the service request pulse, and the client Put the driver in a high impedance state, as shown at point E. The host continues to drive MDDI_DataO to a logic 1 level. The host drives MDDI_DataO to a logic 1 level with 50 psec, as shown at point F. And avoid starting to generate MDDI_Stb, the way is in line with the logic 0 level on MDDI_DataO. After establishing MDDI_DataO to zero position and driving MDDI_Stb 50 psec, the host transmits the header frame packet by Transferring data to the link, as indicated at point G. VI. Interface Electrical Specifications In an exemplary embodiment of the invention, a data in a non-return to zero (NRZ) format uses a data flash signal or The DATA-STB format is encoded, which allows clock information to be buried in the data and flashing signal. The clock can be recovered without a complicated phase-locked loop circuit. The data is carried on a bidirectional differential link. Usually used with a lead cable, although -65- tsM?WT?^(CNS) A4 size (210X297 mm) 1255118 A7 B7 V. Description of invention (63) Other conductors, printed conductors or transmission components are available Use, as mentioned before. The signal (STB) is carried on a unidirectional link that is driven only by the host. The flashing signal triggers a value (〇 or 1), 0 or 1, whenever it has a back-to-back condition, in which the data line or signal The same is maintained. A data sequence, such as the bit "1 1 1000101 1", how it is transmitted using DATA-STB encoding, the graph is shown in Figure 40. In Figure 40, a DATA signal 4002 is displayed in a The signal timing diagram is on the upper line, and an STB signal 4004 is shown on a second line, each time properly aligned (common starting point). After a period of time, when a state change occurs on the DATA line 4002 (signal), the STB line 4004 (signal) maintains the previous state, so the first 'Γ state of the DATA signal is associated with the first of the STB signals. The f0' state, its starting value. However, if or when the state, level of the DATA signal has not changed, then the STB signal is triggered to the opposite state or f 在 in this example, as in the example of Figure 40, where the DAT A provides another ' Γ value. That is to say, each bit cycle is always 1 between DATA and STB, and each bit is rotated once. Therefore, the STB signal is switched again, at this time, because the DATA signal is maintained at 'Γ, and the level or value is maintained, when the DATA signal changes level to '0'. When the DATA signal remains at 'Γ, the STB signal triggers to the opposite state or 1 在 in this example, and so on, because the DATA signal changes or maintains a level or value. Upon receiving these signals, a mutually exclusive or (XOR) operation is performed on the DATA and STB signals to generate a clock signal 4006, which is displayed below the timing diagram for relatively comparing the desired data with the flash. Letter-66 - National Standard for Paper U (CNS) A4 Specification (210 X 297 mm) 1255118 A7 ________B7 V. Invention Description (64). A circuit example can be used to generate the DATA and STB output or signal from the input data at the host and then recover or recapture the data from the client's data and STB signals, as shown in Figure 41. In FIG. 41, a transmission portion 4 1 is used to generate and transmit the original DATA and STB signals on an intermediate signal path 4102, and a receiving portion 4120 is used to receive the signal and recover the signal. data. As shown in Figure 41, in order to transfer data from a host to a client, the DATA signal is input to - two D-type flip-flop circuit elements 4104 and 4106, and a clock signal to trigger the circuit. The two flip-flop circuit outputs (Q) are then divided into a differentially paired signal]VIDDI_DataO+, MDDI DataO- and MDDI_Stb+, MDDI-Stb-, which use two differential line drivers 4108 and 4110 (voltage mode). . A three-input, mutually exclusive NOR (XNOR) gate, circuit or logic component 4112 is coupled to receive the DATA, and the outputs of the two flip-flops, and to generate an output that provides data input to the second flip-flop. It accordingly generates the MDDI-Stb+, MDDI-Stb-signal. For convenience, the xn〇R gate is placed with an opposite circle to indicate that it can effectively reverse the Q output of the flip-flop to produce the flash cut. In the receiving portion 4120 of FIG. 41, the MDDI_DataO+, MDDI_DataO-, and]VIDDI_Stb+, MDDI_Stb- signals are received by each of the two differential line receivers 4122 and 4124, which are generated from the differential signal. Single output. The output of the amplifier is then input to each input of a two-input exclusive OR (XOR) gate, circuit or logic element 4126, which can generate the clock signal. The clock signal is used to trigger each of the two D-type flip-flop circuits 4128 and 4130, and the delay of receiving the DATA signal is -67-. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297). 001819 1255118 A7 B7 V. Inventive Note (65) Version, via the delay element 4132, one of the (4 128) data V values, and the other (4130) data 'Γ value. The clock also has an independent output from the XOR logic. Because the clock information is distributed between the DATA and STB lines, no signal transitions between states, which is faster than half of the clock rate. Because the clock is regenerated using the exclusive OR processing of the DATA and STB signals, the system effectively allows twice the amount of twist between the input data and the pulse, compared to when a clock signal is directly in a single proprietary data. The situation when the line is directly transmitted. The MDDI data pairing, MDDI_Stb+ and MDDI_Stb- signals operate in a differential mode to maximize the negative effects of noise removal. Each portion of the differential signal path terminates the source by utilizing half of the characteristic impedance of the cable or conductor, which is used to transmit the signal. The MDDI Data pairing terminates the source at the end of the host and client. Since only one of the two drives is active at a given time, there is always an end at the source of the transfer link. The MDDI_Stb+ and MDDI_Stb- signals are only driven by the host. The exemplary configuration used to reach the components of the driver and receiver, and the termination of the transmitted signal is part of the MDD interface of the present invention, shown in Figure 42, and the corresponding MDDI Data and MDDI Stb DC electrical The specifications are shown in Table VII. This example interface uses low voltage sensing, here 200 mV, which is less than 1 volt power swing and low power output. -68- National Standard for Paper (CNS;) A4 Specification (210 X 297 mm) 1255118 A7 B7 V. Description of Invention (66)

Table VII Parameter Description Minimum Typical Maximum Unit Rterm Series Termination 41.3 42.2 43.0 ohms ^hibernate Hibernation State Bias Termination 8 10 12 仟 Ohms V hibernate Hibernation Open Circuit Voltage 0.5 2.8 VV Output-Range Just Drive Driver Output Voltage Range vs. GND 0 2.8 VV〇〇+ driver differential output South voltage 0.5 VV〇D. Driver differential output low voltage -0.5 V VIT+ Receiver differential input high threshold 10 mV Vit- Receiver differential input low threshold voltage -10 mV ^ Input-Range Positive Receiver Input Voltage vs. GND 0 3.0 V Im Input Leakage Current (Except Hibernation Bias) -25 25 μΑ The electrical parameters and characteristics of the differential line driver and line receiver are shown in Table VIII. Functionally, the driver transmits the logic level on the input directly to a positive output, and the input is inverted to a negative output. The delay from input to output is well matched to the differential line, which can be differentially driven. In most implementations, the voltage swing on the output is less than the swing on the input to minimize power consumption and electromagnetic radiation. Table VIII presents a minimum voltage swing to approximately 0.5V. However, other values may be used, as is well known to those skilled in the art, and the inventors contemplate a smaller value in some specific embodiments depending on design constraints. The differential line receiver has the same characteristics as a high speed voltage comparator. -69- China National Standard (CNS) A4 Specification (210 X 297 mm) 1255118 A7 B7 V. INSTRUCTIONS (68) Two additional resistors 42 18a and 42 18b are placed at the termination resistor and ground and a voltage Between the sources 4220, which is part of the hibernation control discussed elsewhere. The voltage source is used to drive the transmission line to the high or low level previously described to manage the flow of the data. The above drivers and impedances can be formed as discrete components or as part of a specific application integrated circuit (ASIC) as a lower cost encoder or decoder solution. It can be seen simply that power is transmitted by the host device to the client device or display using a signal labeled MDDI_Pwr and MDDI_Gnd on a pair of conductors. The MDDI_Gnd portion of the signal is used as the reference ground, and the power supply return path or signal of the display device. The MDDI_Pwr signal is used as the power supply for the display device, which is driven by the host device. In an exemplary configuration, the display device allows up to 500 mA to be taken for this low power application. The MDDI_Pwr signal may be provided by a portable power source such as, but not limited to, a lithium ion battery or battery pack present in the host device, ranging from 3.2 to 4.3 volts with respect to MDDI_Gnd. VII. Timing Characteristics A. Overview The services from the host are protected by the steps and signal levels used by a client, which is provided by the host, which is shown in FIG. In Figure 43, the first portion of the signal is shown to be transmitted by the host with a link closure packet that is driven to a logic zero state even if the high impedance bias circuit is driven. There is no information transmitted by the client display or host, -71 - paper ^if 323⁄4 national standard (CNS) A4 specification (210 X 297 dongdong) 1255118 A7 B7 V. Invention description (69) which makes its drive In addition to energy. A series of flash pulses of the MDDI_Stb signal line can be seen at the bottom because MDDI_Stb is active during the closure of the link. Once the packet is terminated, and when the host drives the bias circuit and logic to zero, the logic level changes to 〇, and the MDDI_Stb signal line also changes to a zero level. This represents the last signal from the host, or the squirrel, and ., σ ' and has occurred at any time in the past, which is included to show the previous service interruption, and the signal state before the service starts. . If desired, for example, a signal can be transmitted to reset the communication link to an appropriate state without the need for a "known" prior communication by the host service. As shown in Figure 4, the signal output from the client is initially set to a logic level of zero. In other words, the client output is at a high impedance and the driver is disabled. When the service is being requested, the client enables its drive to sub-deliver a service request to the host, which is indicated for a period of time during which the line is driven to a logical level. Then, after some time, or before the host detects the request (called thQstdetect), it is required to drive the signal to a logic 1 level after the host responds with a link start sequence. At this point, the child client unasserts the request and, in addition to the service request driver, the output line from the client again becomes a zero logic level. During this time, the MDDI-Stb signal is at a logic 0 level.琢王机Drives the host data output at this time, the Γ position is a certain period of time, its % is trestart_high, after the host drives the logic level to zero, and starts MDDI stb - the time, Silke', - called For trestart-lc>w, then the first forward traffic begins - the frame header packet, and the forward traffic packet is transmitted.

1255118 ___ A?

V. INSTRUCTIONS (70) The MDDI Stb signal is in the trestaFti — , 丨. w and subsequent dip, for startup. Table VIII shows the above-mentioned different time periods of the soil 夂 < length ^ example minimum and maximum data rate, where · represents time, and its relationship with the norm tblt Link-Data

Table VIII Parameter Description

Lservice ^restart-high trestart-low is not satisfied with the T request pulse of the day temple g host link re-open ^ ^ ^ a Feng machine chain

50 60 μsQc tdisplay-detect Display detection chain restart sequence time 50 psec thost-detect Host detect chain restart sequence time 50

μsQC 1/tbit-min-perf 1/tbit-max-perf tbit Minimum performance device - Maximum chain link rate of the device Reverse link data rate I Forward link data bit 丨 0.001

Mbps 0.001 0.0005 2.2 450 50 106

Mbps

Mbps nsec It will be immediately apparent to those skilled in the art that the functions of the individual components shown in Figures 41 and 42 are well known, and the functionality of the components in Figure 42 is confirmed by the timing diagram in Figure 43. Details regarding the series termination and hibernation resistance shown in Figure 42 are omitted in Figure 41 because this information is not necessary for how the data flash code is performed and the clock is recovered from it. B. Data flashing timing forward link-73- This paper home standard (CNS} A4 specification (21〇><297 public fantasy 1255118 A7 B7 V. Invention description (71) on the forward link The switching characteristics of the host driver output transfer data are shown in Table IX. Table IX presents the desired minimum and maximum table format relative to the typical time of certain signal transitions to occur. For example, from The typical length of the conversion of the data value (the output of a '〇' or fr) from the beginning to the end, a DataO to DataO conversion, which is called ttdd-(host-output), which is 11bit' and which is small The time is approximately ttbit-〇.5 IlSeC.' and the maximum value is approximately ttbit + 0.5 nsec. The relative spacing between the conversions on the DataO, other data lines (DataX) and the flash line (Stb) is shown in Figure 44, wherein the DataO to flash, flash to flash, flash to DataO, DataO to non-DataO, non-DataO to non-DataO, non-DataO to flash, and flash to non-DataO conversion, respectively For ttds -(host-output) Λ ttss-(host-output), ttsd-( host-output) N ttddx-(host-output ), ttdxdx-(host-output) ttd xs-(host-output) ttsdx-(host-output) °

Table IX Parameter Description Minimum Typical Maximum Unit ttdd-(host-output) DataO to DataO Conversion ttbit - 〇.5 ttbit Ottbit + 0.5 nsec ttds-(host-output) DataO to Flash Cut ttbit - 〇·8 ttbit titbit + 0.8 nsec ttss-(host-output) flash cut to flash cut conversion ttbit " 〇·5 ttbit tttbit + 0.5 nsec ^tsd-(host-output) flash cut to DataO conversion powder bit - 0.8 ttbit tt theory + 0.8 nsec Ttddx-(host-output) DataO to non-DataO conversion ttbit nsec ttdxdx-(host-output) Non-DataO to non-DataO conversion ttbit - 〇·5 ttbit it· + 0.5 nsec ttdxs-(host-output) Non-DataO to flash cut Convert ttbit nsec tsdx-(host-output) flash to non-DataO conversion ttbit nsec The typical MDDI timing requirements for the same signal transfer data at the client receiver input of the forward link are shown in Table X. Because the same signal -74- this paper ^ home standard (CNS} A4 specifications (210 X 297 public love; >

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Line 1255118 A7 B7 V. Inventive Note (72) is being discussed, but will be postponed, and it does not require new drawings to illustrate the signal characteristics or meaning of individual marks, as will be appreciated by those skilled in the art.

Table X Parameter Description Minimum Typical Maximum Unit ttdd-(display-input) Data 〇 to data 〇 conversion ttbit-1-O ttbit ttbit + 1.0 nsec ttds-(display-input) Data 0 to flash-cut conversion ttbit '1.5 ttbit Ttbit +1-5 nsec ttss-(display-input) flash to flash conversion ttbit -1·〇ttbit ttbit + 1.0 nsec ttsd-(display-input) flash to data 0 conversion ttbit -1 · 5 ttbit ttbit + 1-5 nsec ttddx-(host-output) data to non-data conversion ttbit nsec ttdxdx-(host-output) non-data 0 to non-data 0 conversion ttbit nsec ttdxs-(host-output) non-data to flash Convert ttbit nsec ttsdx-(host-output) Flash to data 0 conversion ttbit nsec Figures 45 and 46 show a delay in response to when the host is disabled or enabled. In an example where a host transmits certain packets, such as the reverse link wrap packet or the round trip delay measurement packet, the host dismisses the line driver after transmitting the desired packet, such as parameter CRC, flash The tangential alignment, and all zero packets, are shown in Figure 45 as if they had been transmitted. However, as shown in Figure 45, the state of the line does not need to be immediately switched from '0' to a higher value, although this may be achieved by the presence of certain controls or circuit components, but it takes a while, called The host driver responds with a delay period. When it can actually occur immediately, such that the period is 0 nanoseconds (nsec) in length, it can more immediately extend to some longer period of 10 nsec, which is a desired maximum period length, which is Guard time 1 or turn to 1 packet period occurs. Referring to Figure 46, it can be seen that when the host driver is enabled to transmit a -75- National Standard (CNS) A4 specification (210 X 297 mm) I255ll8

V. Description of the invention (A7 B7 73)

When the packet is encapsulated, for example, a reverse link wrap packet or the round trip delay measurement packet, the signal level change is performed. Here, after the guard time 2 or the turn 2 packet period, the host driver is enabled and starts to drive a bit, here '0, whose value approaches or arrives over a period of time. The king driver enables a delay period that occurs during the = driver reactivation period prior to transmitting the first packet. ~,, a similar process will occur for the signal transmission of the driver and the client device, here a display. The general principles of these cycle lengths and their individual relationships are shown in Table XI below. Table XI shows the minimum value of the maximum unit unit drive de-energization delay 0 _10 Π ρ ρ ρ host driver enable delay 0 2.0 ii. O w V/ η ο Ρ ρ display driver disable delay ----- 0 _] .〇Α1 ο C w η ο ρ Display driver enable delay 0 _2.0 Α1. ο ww nsec ------- C. Data flash timing Reverse link is used on the reverse link The switching characteristics and timing relationship of the data and the flash-cut signal of the data transmitted by the client driver are shown in Figures 47 and 48. A typical time for a signal conversion is explained below. Figure 47 shows the relationship between the timing of the data being transmitted and the leading and trailing edges of the flash pulse at the host receiver input. That is, it is referred to as the set time tsu-sr of the rising or leading edge of the flash cut signal, and the set time tsu-sf of the trailing edge or falling edge of the flash cut signal. The typical inter-distance length of some of the set periods is a minimum of 8 nanoseconds. -76- 淡淡 China National Standard (CNS) Α4 specification (210X297 public Chu·)

η

Line 1255118 A7 B7 V. Description of the invention (74 Figure 48 shows the switching characteristics developed by the reverse data timing and the corresponding client output delay. In Figure 48, it can be seen the timing of the data being transmitted. 'The relationship between the leading edge and the trailing edge of the flashing pulse responsible for causing the delay. That is, it is called the propagation delay tpd sr between the rising or leading edge of the flashing signal and the data (valid), And the propagation delay between the data and the trailing or falling edge of the flashing signal. The typical maximum length of these transfer delay periods is 8 nanoseconds. VIII. Chain Control Implementation (Chain Controller Operation) A • The state machine packet processor transmits packets on the MDDI link with a fast rate of 300 Mbps or higher, although lower rates are acceptable as needed. This bus or transport link rate is currently commercially available. (Economy) A general-purpose microprocessor or the like is too large to control. Therefore, an implementation of such a signal is used to perform such a signal transmission. The device is used to analyze the input seal. Packet flow to produce the desired packet to be transmitted or redirected to the appropriate sound-visual subsystem. It can be used to operate or manipulate more information, such as control, using a general purpose controller, processor or processing element. Or stateful packets, which have a higher/rate requirement. When those packets (control, status, or other pre-sufficient packets) are received, the state machine must pass it through—data, punch, or similar processing component. The general purpose processor, so the packet can be: used to provide a desired result (effect) and sent to its appropriate destination to function. See the order ie ^

The function of the general purpose processor can be implemented in a ft embodiment H-77-

1255118 A7 B7 V. INSTRUCTIONS (75) The processing power available to the microprocessor (CPU) in a computer application is excessively exceeded, or processed by a processor, digital signal processor (DSP), or wireless device. The ASIC, with some data processors or graphics processors that use the CPU processing power on the computer, performs some functions and reduces hardware complexity and cost. However, this has a negative impact on the processing rate, timing or overall operation of such components, so in many applications y is preferred for this general processing using proprietary circuitry or components - for a display (microdisplay) To view the image data, or to reliably receive all packets transmitted by the host, the display signal processing must be synchronized to the forward link channel timing. That is, the signal arriving at the display and the display circuit must occur in synchronization with the appropriate signal processing time. A high-order state diagram achievable by such a synchronization-implementable signal processing step or method is presented in FIG. In FIG. 49, a possible forward link synchronization "state" of a state machine 4900 displays a classification as an unsynchronized frame state 4904, two acquired synchronization states 4902 and 4906, and three synchronized intermediate states 4908, 4910 and 4912. As shown in the start step or state 4902, the display begins with a pre-selected "no sync" state and searches for the unique character in the detected first frame header packet. It should be noted that this unsynchronized state represents the minimum communication setting or "fallback" setting, which selects the Form I interface. The display stores the sub-frame length field when the unique character is found during the search. The CRC bit is not checked when processing this first frame, or until synchronization is achieved. If the length of the frame is zero, the synchronization state processing according to this method proceeds to state 4904, where it is labeled as "unsynchronized frame j-78- This paper size applies to the Chinese National Standard (CNS) A4 specification (210 x 297 mm) 001830 1255118

, 3⁄4, its generation A soil

For the Η 49 φ has been encountered to synchronize. This step in the process is to determine the shape in Figure 49, and the F degree is greater than zero, π C〇n ). Otherwise, if the long-range status of the frame is set to =::,: enter: 亍 to the state • its anger machine sees - the frame header is sealed and (: 22, in addition, if the state is Π; Going to the "Discovery - Synchronization Frame" shape = the cake does not reach the situation 6 (c〇nd6) in Figure 49. :: In a situation, the system is in a state of not "no synchronization", The character is detected, and for the header packet of the subframe to determine the CRC result 'and the length of the subframe is greater than zero', the interface is changed to the _ "synchronization" state side. This step in the process is not the situation that has already encountered the picture... In other words, if the only character or the crc is not correct in the header packet of the subframe, then the child is in sync. Processes the interface 4902 that proceeds or returns to the "no sync frame" state. This portion of the process is labeled as encountering condition 2 (cond 2) in the state diagram of the graph. B. Synchronizing time is reached. Set to accommodate a certain number of "synchronization errors" before deciding to lose synchronization and return to the "no sync frame" state In Fig. 49, once the blame machine has reached the "synchronized state" and no error is found, it continuously encounters the result of the condition 1 and maintains the "synchronized" state. As a result of the situation 2, the process changes the far state to the "one sync error" state 4 9 10. At this time, if the processing ______: 79- the paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 public sauce) ) 001831 1255118

AT __ B7 _ V. Invention Description (77) If the result of detecting another condition 1 is detected, the state machine returns to the "synchronized" state, otherwise it encounters another status 2 result and moves to a " Two sync errors" status 49 12. Again, if a situation 1 occurs, processing returns to the state machine to the "in sync" state. Otherwise, another condition 2 is encountered and the state machine returns to the "no sync" state. It is also apparent that encountering a "link closure packet" will cause the link to terminate the data transfer and return to the "no sync frame" state, since nothing in the state diagram of Figure 49 can be synchronized. Call it status 4 (cond 4). It can be seen that there may be a repeated "error copy" of the unique character, which will appear in some fixed positions in the subframe. In this situation, the state machine is very difficult to synchronize to the subframe, because the CRC on the header packet of the subframe must also be valid during processing, whereby the MDD interface processing can proceed to the "synchronized" state. . The length of the subframe in the header header packet can be set to zero to indicate that the host will only transmit one subframe before the link is closed, and the MDD interface is placed or set to a standby state. Hibernation. In this example, the display must receive the packet on the forward link immediately after detecting the subframe header packet because only a single frame is transmitted before the link transitions to the standby state. In normal or typical operation, the frame length is non-zero, and the display only processes forward link packets, and the interface is collectively displayed in those states as "IN-SYNC, state in Figure 49, state . The time required for a display to be synchronized to the forward link signal varies depending on the size of the subframe and the forward link data rate. In the forward _ 80 _ paper 怅 home standard (CNS) A4 specification (210X297 mm) '' 1255118 A7 B7 5, invention description (78) The "error copy" of the unique character detected in the link becomes The probability of random or more random data will increase as the frame becomes larger. At the same time, the ability to recover from an error detection is also low, and the time required to do so is longer, when the rate of a forward link is lower. C. Initialization As mentioned earlier, at "on", the host sets the forward link to be at or below the minimum required or desired data rate of 1 Mbps and is appropriate for a given application. The length of the sub-frame and the media frame. That is to say, both the forward and reverse links use the Form I interface to begin operation. These parameters are usually only used temporarily, and the host determines the capabilities of the client display (or other device) or the desired configuration. The host sends or transmits a frame header packet on the forward link, which is followed by a reverse link wrap packet, wherein the request flag bit 1 is set to a value of 1, thereby requesting the request The display responds to a display capability packet. Once the display synchronizes the forward link, it transmits a display π capability packet and a display request and status packet on the reverse link or channel. The host checks the contents of the display capability packet to determine how to reconfigure the link to achieve the best or desired performance level. The host checks the protocol version and the minimum protocol version barrier to confirm that the protocol versions used by the host and display are compatible with each other. The version of the agreement is maintained at the first two parameters of the display capability packet, so the compatibility can be determined even when the elements of the agreement are incompatible or fully understood to be compatible. D· CRC processing For all packet forms, the packet processor state machine guarantees the -81 - 激国苏^(10)) Α4 specification (210 X 297 mm) 1255118 A7 B7 V. Invention description (79) CRC checker can Control appropriately or properly. When the CRC comparison causes one or more errors to be detected, it also increments the CRC error counter and resets the CRC counter at the beginning of each processing subframe. IX. Packet Processing For each of the packets received by the state machine described above, a special processing step or series of steps is taken to implement the operation of the interface. Forward chain packets are typically processed according to the exemplary processing listed in Table XII below.

Table XII

Packet form packet processor state machine response sub-frame header (SH) confirm good packet, capture sub-frame length field and transmit packet parameters to a general-purpose processor fill (F) ignore data video stream (VS) interpretation The video data format descriptor and other parameters, and when necessary, decompose the packaged pixel data, interpret the pixels via the color map if necessary, and nest the pixel data to the appropriate location in the bitmap. Sound Stream (AS) transmits the sound sample rate set to the sound sample clock generator, isolates the sound packet form, and the packet processor state machine reacts to the sample of the specified size 'decomposes the sound sample data when needed and directs the sound sample to the appropriate sound Sample FIFO -82- This paper home standard (CNS) A4 specification (210 X297 mm) 1255118 A7 B7 V. Invention description (80) Color map (CM) Read color map size and offset parameters, and write the color The map data is transferred to a color map memory or storage location reverse link wrap (REL) at the appropriate time in the reverse direction. Check the reverse link flag and transmit the display capability envelope as needed. Display requests and status packets are also transmitted as appropriate. Display Capability (DC) Transmits such a packet when requested by a host, which uses the reverse link flag of the reverse link wrapper packet to intercept the keyboard (K) to transmit the packet to a general purpose processor, or It is transmitted, which communicates with a device in the form of a keyboard, if any, and when it is needed. Pointing devices (PDs) transmit these packets to or from a general purpose processor, communicating with a pointing device, if any, and when needed. Link closure (LS) records the fact that the key is closed ^ and informs a general purpose processor. Display Service Request and Status (DSRS) to transmit the packet as the first packet bit transfer (BPT) interpretation packet parameter in the reverse link wrap packet, such as a video data format descriptor, to determine which pixels are to be Move first and move the pixels in the bitmap as needed. -83- Paper National Standard (CNS) A4 Specification (210 X 297 mm) A7 B7 1255118 V. Invention Description (81) Packet Form Packet Processor State Machine Reaction Bitmap Area Fill (BAF) Interpret packet parameters, if If necessary, interpret the pixels through the color map, and write the pixel data to the appropriate position bitmap pattern fill (BPF) to interpret the packet parameters in the bitmap, and decompose the packed pixel data as needed, and interpret the pixels through the color map as needed. And writing the pixel data to the appropriate location in the bit map. The communication link channel (CLC) directly transfers this data to a general-purpose processor during the hibernation display service request (DSR). The general-purpose processor controls the low-order function of the transfer request, and Detect conflicts when their own links start over. Interface form handover request (ITHR) and interface form notification (ΙΤΑ) which can transmit these packets to or from the general purpose processor. The logic to receive such a packet and form a response to a notification is essentially minimal. Therefore, this operation can also be implemented in the packet processor state machine. The resulting handover occurs as a low-level physical layer action that is unlikely to affect the functionality or operation of the general purpose processor. Execution form handover (ΡΤΗ) can be applied directly to such a packet, or by passing it to the general purpose processor, which also instructs the hardware to make a mode change. -84- The current θβ national standard (CNS) Α4 specification (210Χ 297 mm) 1255118 A7 B7 V. Description of invention (82 X. Reducing the rate of the reverse link data. The inventors have observed that the host link Some of the parameters used by the controller can be adjusted or set in such a way as to achieve a maximum or more optimized (proportional) reverse link data rate, which is highly desirable. For example, During the reverse link encapsulation of the reverse data packet field of the packet, the far MDDI-Stb signal pairing trigger generates a periodic data clock at half of the forward link data rate. This occurs because the host chain The junction controller generates the MDDI_Stb signal corresponding to the MDDI_DataO signal as if it transmitted all zeros. The MDDI-Stb signal is transmitted from the host to a display, wherein it is used to generate a clock signal for use from the display Transmitting the reverse link data, wherein the reverse data is transmitted back to the host. Figure 50 is a diagram showing typical transmission and processing of the signal on the forward and reverse paths in the MDDb々 system. Delay In Figure 50, 'shows a series of delay values of 15 nSec., 8.0 nsec., 2.5 nsec., 2.0 nsec·, lo nsec., i 5 nsec, 8 〇nsec, and 2 5 nsec. The processing portion generated by the Stb+Λ, the cable is transmitted to the display, the display receiver, the clock generation, the signal timing, the DataO+Λ generation, the cable transmission to the host, and the host receiver stage. According to the forward link The data rate and the processing delay encountered, for this "round trip" effect or combination of events to be completed, requires more time on the MDDI_Stb signal than a loop, which causes an undesired time or loop to be consumed. To prevent this problem The reverse rate divisor makes it possible to expand a plurality of cycles of the MDDI_Stb signal for one bit time on the reverse link. This represents that the reverse link data rate is less than the forward link rate. - the paper

Wf837 Qiao China National Standard (CNS) A4 specification (210 X 297 mm) l2s5ll8

It must be noted that the actual signal delay length via the interface may vary depending on each particular host-client system or hardware used. Each system can typically be made to use the round trip delay measurement packet to measure the actual delay in a system to perform better, so the reverse rate divisor can be set to an optimum value. A back delay is measured by causing the host to transmit a round trip delay measurement packet to the display. The display responds to the packet by transmitting a sequence of 1 back to the host, either within or during a pre-selected measurement window in the packet called the measurement period block. The detailed timing of this measurement is as previously described. This round trip delay is used to determine the rate at which the reverse link data can be safely sampled. The round-trip delay volume includes determining, detecting, or calculating the number of clock intervals of the forward link, which occurs at the beginning of the measurement period and when the Oxff, Oxff, 0x00 response sequence is at the host The display is received between the beginning of the time period. Note that it is possible that the response from the display can receive a fraction of the forward link clock cycle before the measurement count is about to increase. If this uncorrected value is used to calculate the reverse rate divisor' it causes a bit error on the reverse link due to unreliable data sampling. An example of this situation is shown in Figure 51, which graphically shows the mdDI Stb representing the MDDI_Data' at the host at the host, the forward link data clock within the host, and a delay number of signals. In Figure 51, the reaction sequence receives a portion of a forward link clock cycle from the display before the number of delays is increased from 6 to 7. If the delay is assumed to be 6, the host will sample immediately after the one-bit conversion -86-scale scale (GBS) A-view (21〇X 297 mm) ---- V01839 A7 B7 1255118 V. INSTRUCTIONS (84) The reverse data may be in the middle of a one-bit conversion. This can result in erroneous sampling at the host. For this reason, the delay of the measurement must basically be increased by 1 before it is used to calculate the inverse rate divisor. The reverse rate divisor is the number of MDDI_Stb cycles that the host must wait before sampling the reverse link data. Since MDDI_Stb is circulated at half the rate of the forward link, the modified round trip delay measurement needs to be divided by 2 and then up to the next integer. If the formula does not 'this relationship is: round _ trip _ delay + Γ 2 reverse_rate_divisor = RoundUpToNextlnteger For the given example, this becomes: reverse_rate_divisor = RoundUpToNextlnteger - = 4 one by one v 2 y if used in this example The round trip delay is measured as 7 instead of 6, and the reverse rate divisor can also be equal to 4. The reverse link data is sampled by the host on the rising edge of the reverse link clock. A counter or similar known circuit or device is present in both the host and the client (display) to generate the reverse link clock. The counter is initialized so that the first rising edge of the reverse link clock occurs at the beginning of the first bit in the reverse link packet field of the reverse link wrapper. This is shown in Figure 52 for the following example. The meter-87- paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 001839 A7 B7 1255118 V. Invention description (85) The number of digits increases at each rising edge of the MDDI_Stb signal, and The number of counts that occur until they overlap is the reverse rate divisor parameter in the packet that is wrapped by the reverse link. Because the MDDI_Stb signal triggers at half the rate of the forward link, then the reverse link rate is half of the forward link rate divided by the reverse rate divisor. For example, if the forward link rate is 200 Mbps and the reverse rate divisor is 4, then the reverse link data rate is expressed as: ^ 200MM ^ 25Mbps displayed in a reverse link package An example of the timing of the MDDI_DataO and MDDI_Stb signal lines in the overlay is shown in Figure 52, where the packet parameters used for the description have the following values: Packet length = 1024 (0x0400) Steer 1 length = 1 packet format = 65 (0x41) Steering 2 length=1 Reverse chain flag=0 Reverse rate divisor=2 Parameter CRC 2 0xdb43 All zeros are 0x00 The packet data between the packet length and the parameter CRC block is: 0x00, 0x04, 0x41, 0x00, 0x02, 0x01, 0x01, 0x43, Oxdb, 0x00,... The first reverse link packet returned from the display is a display request and status packet having a packet length of 7 and a packet form 70. This packet begins with the byte values 〇x〇7, 0x00, 0x46... and so on. However, in Figure 52 only -88 - the paper scale applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 001840 1255118 A7 B? V. Invention Description (86) The first byte can be seen ( 0x07). The first reverse link packet is time shifted by approximately one reverse link clock cycle in the figure to illustrate an actual reverse link delay. - The ideal waveform with zero is displayed as a trace of the line from the host to the display. The MS byte of the CRC field of this parameter is transmitted before the packet form, and then all the zero fields. The flash from the host switches from 丨 to 〇 and returns to 1, because the data from the host changes to form a wider pulse level. When the data becomes zero, the flash switching is at a higher rate, and the change in data on the data line causes a change near the end of the alignment block. The flash cuts at a higher rate for the remainder of the map due to a fixed chirp or 1 level for the data signal for an extended period of time, and the transition falls at the pulse pattern (edge). The reverse link clock of the host is at zero until the end of the turn cycle, when the clock begins to accommodate the reverse link packet. The arrows in the lower part of the figure represent when the data is sampled, which can be understood from the following disclosure. The first byte of the packet field being transmitted (here, Π000000) is shown to start after the turn, and the line level is stabilized since the master drive is removed. The delay in the transmission of the first bit is considered to be bit 3, which can be seen in the dotted line of the data signal. In Fig. 53, it is possible to observe a typical value of the reverse rate divisor based on the forward link data rate. The actual reverse rate divisor is determined by a return link measurement to ensure proper reverse link operation. A first area 5302 corresponds to a safely operating area, a second area 53〇4 corresponds to a critical performance area, and a third area 5306 represents an impossible _________-89- *Standard (CNS) A4 specification (other) < 297 public love) 001S41 A7 B7 1255118 V. Description of invention (87) Operation setting. The round trip delay measurement and the reverse rate divisor are set to be the same when operating in any interface form on the forward or reverse link, since it can be represented and operated by the actual clock cycle unit, and The number of bits that are not transmitted or received. XI. Steering and Guard Time As mentioned above, in the reverse link wrap packet, the turn 1 field, and the guard time 1 field in the round trip delay measurement packet represents the value of the length of time, which allows The host interface driver is disabled prior to enabling the display interface driver. The Turn 2 and Guard Time 2 fields provide a time value that allows the display driver to be disabled before the host drive is enabled. The guard time 1 and guard time 2 blocks are typically filled with pre-set or pre-selected length values, which do not indicate an adjustment. Depending on the interface hardware used, these values can be developed using experimental data and adjusted in some instances to improve operation. Several factors contribute to determining the length of the turn to 1 and these are the forward link data rate and the maximum disabling time of the MDDI_Data drive in the host. The maximum host drive disable time is specified in Table XI, which shows that the drive requires up to 10 nsec. to disable and approximately 2 nsec. The minimum number of forward link clocks required for the host drive to be disabled is expressed in terms of the following relationship: • HostDriverDisableDelaymax

Clocks_to_disableTA1 II

ForwardLinkDataRate InterfaceTypeFactorp^ -90- This paper size is applicable to China National Standard (CNS) A4 specification (21〇x 297 mm) 001842 A7 B7 1255118 V. Description of invention (88) The range of values allowed for this steering 1 is based on the following relationship. Indicates:

Turn_ Around _l > RoundUpToNexilnteger

Clocks _disableTM

InterfaceTypeFactoiy where the interface form factor is 1 for Form I, 2 for Form II, 4 for Form III, and 8 for Form IV. Combining the above two equations, it can be seen that the interface form factor can be eliminated, and the turn 1 system is defined as:

Turn _ Around _ 1 = RoundUpToNexilnteger

ForwardLinkDataRate · HostDriverDisableDelaym^ ) - For example, the delay to 1 is: 1500 Mbps Form III forward link will use one revolution

Turn _ Around __ 1 = RoundUpToNextlnteger / 1500Mbps ΛΟη sec g IByies When the round trip delay is increased, the timing margin can be improved from that time when the host is disabled to the time the display is enabled. The factors that are typically used for the length of time of turn 2 are the forward bond rate, the maximum disabling time of the MDDI_Data driver in the display, and the round trip delay of the communication link. The calculation of the time required to disable the display driver is substantially the same as the aforementioned host driver, which is defined according to the following relationship:

InterfaceTypeFactor^

Clock"〇 — disableTA2 = DisplayI)riverDisableDelayii The range of values allowed for Steering 2 is expressed as: -91 - National Standard (CNS>A4 Specification (2l〇x 297 公菱} A7 B7 !255118 V. Invention Description (89)

Turyt Λ ; Ar T Clocks _ϊο_ disable^ + round _ trip _ delay -l· 1 1 urr^ ^ Around _ 2 > RoundUpToNextlnteger -=-=---r---- 8 , ylnterfaceTypeFactorρ^ϋ ^ For example A 1500 Mbps Form III forward link has a round-trip delay forward link clock that basically uses a turn 2 delay, its size,

Clocks Jo _disableTA1 = 1500|^‘l〇n sec :3.75 3.75 + 10 + 1

Turn_ Around__2 > RoundUpToNextlnteger XII. Effect of link delay and skew The delay skew on the forward link between the MDDI_Data pair and MDDI_Stb limits the maximum possible data rate unless delay skew compensation is used. The difference in timing caused by timing skew is due to the controller logic, the line driver and receiver, and the cable and connector, as described below. A. Chain timing analysis limited by skew (MDDI Form I)

1. Example of Delay and Skew of Form I Link A typical interface circuit similar to that shown in Figure 41 is shown in Figure 5-7 to accommodate a Form I interface link. In Fig. 57, exemplary or typical values of transfer delay and skew are shown for each of several processing or interface stages of an MDDI Form I forward link. In MDDI Stb and MDDI DataO -92- This paper scale applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) QQ1844 1255118 A7 B7 V. Invention Description (91 In many systems, because the retention time is zero, This will be zero, and of course the maximum delay of Delay2 can also be zero in this example. The worst case contributes to the skew in the XOR phase of the receiver in the data-late/flash-early example. Among them, Delay 1 is at the maximum value, and the clock output from the X〇R gate will appear as early as possible according to the following relationship: tsKEW-max(RXXOR) = tpD-max(Delayl) " tpD-min(XOR) In this case, the data can vary between two bit periods, η and η+1, which are very close to the time that bit n+1 is clocked in the receiver flip-flop. The maximum data rate (minimum bit period) of the link is a function of the maximum skew encountered by all drivers, cables, and receivers in the MDDI chain plus the overall data set to the RXFF stage. The output of the RXRCVR stage with the highest overall delay skew in the junction, which can be expressed as: fi 7: £:V/-rmx(LW/〇-广+^λ: £ν^-Γτ^(7ΧΟ/?ν7?) ten G/^W-nf^x(CV\SL£) and the minimum bit The meta period is expressed as: tBIT-min = tsKEW-max(LINK) + tsKEW-max(RXXOR) + tpD-max(Delay2) + tsu(RXFF) The example shown in Figure 57 tsKEW-max(LiNK) = L4 nsec, and the minimum bit period can be expressed as: tBiT-mm=14 + 0.3 + 0.2 + 0.5 = 2.4nsec, or described as approximately 416 Mbps. -94- National Standard for Paper (CNS) A4 Specification (210 X 297) I255118 A7 B7 V. INSTRUCTIONS (93) The maximum link rate is determined by the minimum allowable bit period. This is most affected when MDDI_DataX arrives as late as possible. In this example The minimum allowable cycle time is expressed as: tBlT-min tSKEW-max(UNK) + tpD-maX(Dalay3) + tsU(RXFFB) - tpD-min(XOR) The upper limit of the link rate is: tpD- Max(Delay3) — tpD-min(Delay3) and its assumptions are: tBIT-min(lowebbound) = 2 · tsKEW-max(LINK) +tpD-max(XOR) +tsu(RXFFB) +tH(RXFFB) In the above example, the lower limit of the minimum bit period is expressed as the following relationship: tBiT- Min(iower-ievei) — 2 · 1.4 + 1.5 + 0.5 + 0· 1 = 4.8nsec, which; approximately 208 Mbps 〇 This system is much smaller than the maximum data rate available for Form I links. The MDDI's automatic delay skew compensation capability significantly reduces the effect of this delay skew on the maximum link rate. XIII. Physical Layer Interconnection Description A physical connection for implementing an interface in accordance with the present invention can be implemented using commercially available components, such as part number 3260-8S2 (01) manufactured by Hirose Electric, Inc. on the host side, and in the display Part number 3240-8P-C manufactured by Hirose Electric, Inc. on the unit side. Example interface designation for such a connector for a Form 1/Form II interface or "Pit Position - 96 National Standard (CNS) A4 Specification (210X 297 mm) 1255118 A7 B7 V. INSTRUCTIONS INSTRUCTIONS (94) The series is given in Table XIII, which is shown in Figure 61.

Table XIII Signal Name Pin No. Color Signal Name Pin No. Color MDDI Pwr 1 Red MDDIGnd 2 Black with Red MDDI—Stb+ 3 Green MDDI_Stb- 4 Black with Green MDDI—Data0+ 5 Blue MDDIDataO- 6 Black with Blue MDDI_Datal+ 7 White MDDIDatal-8 Black is shielded from white to the MDDI_Gnd in the host interface, and a shielded discharge line in the cable is connected to the shield of the display connector. However, the shield and discharge lines are not connected to the circuit ground in a display. The interconnecting components or devices are selected or designed to be small enough for use in mobile communication and computing devices, such as PDAs and wireless telephones, or portable gaming devices that are not too conspicuous or aesthetically pleasing compared to the relative device size. . Any connector and wiring must be durable enough to be used in a typical consumer environment and allow for small sizes, especially the wiring, which is relatively low cost. The transmitting component must accept data and flash-cut signals, which are differential NRZ data, with Form I and Form II transfer rates up to approximately 450 Mbps, and 8-bit serial form IV versions up to 3.6 Gbps. XIV. Operational Summary of the general steps taken in processing data and packets during operation of the interface using the embodiments of the present invention are shown in Figures 54a and 54b, and the interface device of Figure 55 is processed. the summary of. At this -97- this paper scale applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 〇〇184ύ 1255118 A.7

In these drawings, the process begins with a step 5, which determines whether the client and the host are to be connected using a communication path, here a cable. This can happen through the use of ital polling by the babies, #software or hardware can detect whether there is a connector or cable or signal to the host on the input side (9) as shown in the USB interface), & Other known techniques. If there is no client connection to the machine, it can only enter a predetermined length of waiting state, become a hibernation mode, or shut down to wait for future use, which requires a user to take action to restart the Host. For example, when the -host exists in a computer-like device i, the user can click on the screen image or request a program to start the host processing to find the client. Again, simply inserting a USB-type connection, such as the interface for the form u, can initiate host processing. Once a client is connected to the child host, or vice versa, or detected to be present, the client or the host transmits the appropriate packet request service in steps 5404 and 54-6. The client transmits a display service request or a packet in the step 5404. It is to be noted that, as described above, the link may have been previously turned off or in a hibernation state, so this is not followed by full initialization of the communication link. Once the communication link is synchronized and the host attempts to communicate with the client, the client also needs to provide a display capability packet to the host, as in step 5408. The host can now begin to determine the form of support that the client can accept, including the transfer rate. In general, the host and client also coordinate the form of the service mode (rate/speed) to be used, e.g., Form I, Form u, Form π, etc., as in step 54 10. Once the child service form is established, the host can start to transfer the capital -98 - S S Home Standard (CNS) A4 specification (21GX 297 public) G01S50 !255118

alum. In addition, the host can use round trip delay measurement packets to optimize the timing of the communication link parallel to other signal processing, as shown in step 54U. As previously mentioned, all transmissions begin with a frame header packet, which is not transmitted in step 5412, followed by the form of the data, here a video and sonar string mud packet, and a padding packet, The display is sent in step 54 14 . The S-sound and video data will have been prepared or mapped in advance, and the padding packet is inserted as needed to fill the number of bits required for the media frame. The host can transmit a packet such as the forward sound channel enabled packet to activate the audio device, or in addition, the host can transmit commands and information using the above-described packet form, which is shown here to transmit color in step 5416. Map, bit block transfer or other packet. In addition, the host and client can use appropriate packets to exchange data with respect to a keyboard or pointing device. During operation, one of several different events will occur, causing the host or client to require a different data rate or interface mode. For example, a computer or other device transmitting data encounters a load condition in the processing data, which causes a decrease in the rate of delivery or presentation of the packet. A display that receives the data can be changed to a more limited battery power supply by a dedicated Ac power source and it is not capable of transmitting data as quickly as possible, processing commands immediately, or not being able to use the same degree of resolution or color depth, This is under this more limited power setting. In addition, a limited condition can be attenuated or eliminated, allowing each device to transmit data at a higher rate. This is more desirable to cause a request to change to a higher transfer rate mode. If these or other forms of known conditions occur or change, the host or -99- Cat Country 榡 (CNS) A4 specification (210X297 mm) 1255118

A7 B7

V. Invention Description The client can detect them and try to re-coordinate the interface mode. The system is shown in step 5420, wherein the host transport interface forms a handover request packet to the client to request a handover to another mode, and the client transmits an interface notification packet to confirm that a change is found, and the The host transmits an execution form delivery packet to make the change to the specified mode. Although it does not need to have a specific processing sequence, the client and the host can also exchange packets with respect to the desired data, or receive from a pointing device, a keyboard or other user-form input device, which is mainly incorporated into the customer%. 'Although these components may also be present on the host side. These packets are basically processed using a general purpose processing or form element rather than the state machine (5502). In addition, some of the above commands will also be handled by the general processor (5504, 5508). After the data and commands have been exchanged between the host and the client, a decision is made at some point whether additional information is to be transmitted, or the host or client is about to suspend the service. This is shown in step 5422. If the link is to enter a hibernation state, or is completely turned off, the host transmits a two-link closure packet to the client, and both ends terminate the transfer of the data. The packets transmitted in the above operational process will be transmitted using the aforementioned drivers and receivers associated with the host and client controllers. These line drivers and other logic components are coupled to the state machine and general purpose processor described above' as shown in the Summary of Figure 55. In FIG. 55, a state machine 55〇2 and general purpose processors 5504, 55〇8 can be further connected to the bit display and its components, such as a dedicated USB interface, a memory component, or the like, which is present in the link control H. Outside and Xiao Qi's interactive materials, including but not limited to viewing -100-

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1255118 A7 —--- B7 V. INSTRUCTIONS (98) Display device data source and video control chip. The processor and state machine provide enabling and disabling of guard time related to guard time as described above, and so on, to ensure efficient establishment or termination of the k-key and packet transmission. XV. Appendices In addition to the format, structure, and content of the different packages described above for implementing the architecture and protocols of the specific embodiments of the present invention, more detailed field content or operations are presented herein for some packet forms. These are presented here to further clarify their individual uses or operations so that the skilled artisan can more quickly understand and use the invention in a variety of applications. Only a few fields that have not yet been discussed are discussed further here. A. For the video stream packet, the child display attribute block has a series of bit values, which are interpreted as follows. Bits 1 and 〇 select how to direct the display pixel data. For the eyes that are not to be given to the eyes, 〇〇 'or, 丨丨, the bit value of the data, the bit value, 丨〇, the data is only guided by the left eye, and the bit value, 〇 1, data That is only to the right eye. Bit 2 represents whether the pixel data exists in an alternate format, where the value '〇' represents that the pixel data is in a standard asymptotic format, and wherein the column number (pixel Y coordinate) is increased when advancing from one column to the next. 1. When the value of this bit is T, the pixel data is in an alternate format, and the number of columns is increased by 2 when advancing from one column to the next. Bit 3 represents the pixel data in an alternate pixel format. This is similar to the standard alternate mode enabled by bit 2, but the alternation is vertical rather than horizontal. When bit 3 is 〇, the 'S pixel data is in the standard asymptotic format, and the line number (like -101- ¥ paper ruler standard (CNS) person 4 specification (21C) X297 public) '1255118 A7 invention The description (" prime X coordinate) is incremented by 1 when each successive pixel is received. When bit 3 is 1, the pixel data is in an alternate pixel format, and the row number is incremented by 2 when each pixel is received. Bits 7 through 4 are reserved for future use and are typically set to zero. The 2-byte X start and γ start fields specify the absolute X and Y coordinates of the point (X Start, Y Start) of the first pixel in the pixel data field. The 2-byte X left edge and the Y upper edge field specify the X coordinate of the left edge of the screen window and the Y coordinate of the upper edge filled by the pixel data field, and the X right edge and the Y lower edge column The bit specifies the X coordinate of the right edge of the window to be updated and the Y coordinate of the lower edge. The number of pixels field (2 bytes) specifies the number of pixels in the pixel data block below. The CRC field (2 bytes) of this parameter contains the CRC from the length of the packet to all the bytes of the number of pixels. If this CRC cannot be checked, the entire packet is discarded. The Pixel Data field contains the original video information to be displayed, which is formatted in the manner described by the Video Data Format Descriptor field. This information is transmitted one column at a time, as described elsewhere. The Pixel Data CRC field (2 bytes) contains a 16-bit CRC with only that pixel data. If the CRC verification of this value fails, the pixel data is still available, but the number of CRC errors is increased. B. For sound stream packets The sound channel field (1 byte) identifies a particular sound channel that is transmitted by the client device. The physical sound channel is specified at -102- Home Standard (CNS) A4 Specification _x297 mm > 1255118 A7 B7

V. Description of the invention (1) This block or the field is mapped, because the values of 丄, 2, j, 4, 5, 6 or 7 represent the left front, the six lun, the singer ^ ^ one, the right Then, left rear, right rear, front center, sub-subwoofer, left channel of the rim field, and the ring-shoulder woman, s..., Jiucheng% right Wantong forced. A channel ID value of 254 represents the single stream The digital 择 择 J double ix 耷 q samples are simultaneously transmitted to the left front and right front channels. This can be used in a simple application, in which a stereo headset is used for voice communication, and the yield enhancement application in the PDA , a single user interface generates a warning tone, or a simple user interface in any application or any application. A field value from 1 to 253, while the current 255 system retains its use, of which new design Additional specification is required. The sound sample quantity field (2 bytes) specifies the number of sound samples in this packet. The bits of each sample and package field contain a byte that specifies the sound data. Step format. The format usually used is bit 4 to 定义 to define each The number of bits of the PCM sound sample. Then the bit 5 specifies whether the digital sound material is a package. As previously mentioned, Figure 12 shows the difference between the packaged and byte aligned sound samples. The value of element 5, 〇, represents that each PCM sound sample in the digital sound data block is aligned to the interface byte boundary, and the value, 丨, represents each successive pCM sound sample. The previous sound samples are wrapped. This bit is only a multiple of the number defined in bits 4 through 0 (the number of bits per pCM sound sample). Bits 7 through 6 are reserved. Use, where the system design requires additional designation, which is usually set to the value 〇. The sound sample rate field (1 byte) specifies the sound pCM sampling rate. The format used is the value 〇 representing 8 per second, 〇 The speed of one sample -103- This paper home standard (CNSy A4 size (210X297 mm) 1255118 A7 B7 V. Invention description (1〇1) Rate (sps), the value 1 represents 16,000 sps., the value 2 represents 24,000 Sps, the value 3 represents 32,000 sps, the value 4 represents 40,000 sps., the value 5 represents 48,000 5卩3, the value 6 represents 11,025 5卩5, the value 7 represents 22,050 $卩5, and the value 8 represents 44,100 sps, while the values 9 to 15 are reserved for future use. So it is currently set to 0. The CRC field (2 bytes) contains the 16-bit CRC of all bytes from the packet length to the sound sample rate. If this CRC cannot be properly checked, the entire packet is The digital sound data field contains the original sound sample to be played, which is usually in the form of a linear format that becomes an unsigned integer. The voice data CRC field (2 bytes) contains a 16-bit CRC with only that voice material. If this CRC check fails, the sound data is still available, but the number of CRC errors is increased. C. User-Defined Streaming Packets The 2-byte Streaming ID Number field is used to identify a specific user-defined stream. The contents of the streaming parameter and the contention data field are defined by the MDDI device manufacturer. The 2-bitstream stream parameter CRC field contains a 16-bit CRC of all bytes from the packet length to the stream parameter of the voice-encoded byte. If this CRC cannot be checked, the entire packet is discarded. The 2-bit stream data CRC block contains a CRC with only the stream data. If this CRC cannot be checked correctly, the use of this _stream is optional, depending on the needs of the application. The use of _stream data with good CRC conditions usually requires that the _stream data be buffered until the CRC is confirmed to be good. The number of CRC errors is if the CHC day is not checked. -104- Paper Home Standard (CNS) A4 Specification (210X297 mm) 1255118 A7 B7 V. Invention Description (1〇2 For color map packets, this color map data size field (2 bytes) specifies the color map table The total number of logins is in the color map data in this package. The number of bytes in the color map data is three times the size of the color map. The size of the child color map is set to 〇 to not transmit the color map. If the size of the color map is 〇, a color map offset value is still transmitted, but it is ignored by the display. The color map offset block (2 digit group) specifies the color map material in the packet. The offset from the beginning of the color map table in the display device. A 2-byte parameter CRC field contains the CRC from the packet length to all the bytes of the voice-encoded byte. If this crC Unable to check, the entire packet is discarded. For the color map data field, each color map location is a 3-byte value 'where the first byte specifies a strong blue The second byte specifies the intensity of the green, and the third byte specifies the intensity of the red. The color map size field specifies the number of the 3-byte color map table item that exists in the color map data field. If a single color map cannot conform to a video data format and a color map packet, the entire color map can transmit multiple packets with different color map data and color map offsets in each packet. The CRC field of the tuple color map data contains only the CRC of the color map material. If the CRC check fails, the color map data can still be used, but the number of CRC errors is increased. Package-105-本_家榡准 (cns) A4 specification (210X297 mm) A7 B7

1255118 V. Description of the invention (1〇3 The child reverse link flag field (1 byte) contains a set of flags to request information from the display. If a bit (here is bit 0) is set For i, the host requests the specified information from the display using the display capability packet. If the bit is 0, the host does not need information from the display. The remaining bits (here, bit 1 to 7) Reserved for future use and set to 0. 泫 Reverse rate divisor field (1 byte) specifies the number of MDDI_Stb cycles 'which occurs in relation to the reverse link data clock. The link data clock system is equal to the forward link data clock divided by twice the reverse rate divisor. The reverse link data rate is related to the reverse link data clock and I Hai reverse The interface form on the link. For a formal interface, the reverse data rate is equal to the reverse link data clock. For the form π, the form ΠΙ and the formal IV interface, the reverse data rate is equal to the inverse Two times, four times and eight times the clock of the link data. The nibble (1 byte) specifies the total number of bytes configured for the turn 1. The recommended length of the turn 1 is the number of bytes required for the MDDI-Data drive in a host that will disable the output. This is based on the above-mentioned output de-energizing time, the forward link data rate, and the forward link interface form used. - A more complete description of the setting of the steering 1 is given above. The length field (1 byte) specifies the total number of bytes configured for steering. The recommended length of the steering 2 is the number of bytes required by the MDDI-Data drive in the display to disable it. The output is added to the round trip delay. The description of the setting for the steering 2 is given above. -106- National Standard (CNS) A4 Specification (210X 297 public)

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______ BT V. Invention Description (1Q4~) " The CRC block (2-byte) of this parameter contains the 16-bit CRC of all bytes from the packet length to the steering length. If this CRC cannot be checked, the entire packet is discarded. The zero field (1 byte) is set equal to zero and is used to ensure that all MDDI-Data signals are in the zero state during the first guard period before the line driver is disabled. The steering 1 stop is used to establish a first steering cycle. The number of bytes specified by the steering length parameter is thereby configured to allow the MDDI-Data line driver in the host to be disabled before the line driver in the client (display) is enabled. The host disables its MDDI-Data line driver during a bit 转向 turn, and the client (display) enables its line driver immediately after turning to the last bit of the 丨. The MDm_Stb signal behaves as if the steering cycle were all zero. The S reverse lean packet block contains a series of data packets that are transmitted by the client to a host. As mentioned earlier, the padding packet is transmitted to fill the remaining space that is not used by other packet forms. The Turn 2 Block is used to establish a second steering cycle. The number of bytes specified by the steering length parameter is configured by this field. A byte is used for the drive re-enabling field, which is equal to 〇 to ensure that all MDDI-Data signals are re-enabled before the packet length field of the next packet. F. For Display Capability Packets The 琢 足 版本 version field uses 2 bytes to specify the version of the collaboration used by the client. The initial version is set equal to 〇, and the minimum agreement version -107-

1255118 A7 _ B7___ V. INSTRUCTIONS (1〇5) This field uses 2 bytes to specify the minimum protocol version that the client can use or interpret. The display data rate capability block (2 bytes) specifies the maximum data rate that the display can receive on the forward link of the interface and is specified in the form of megabits per second (Mbps). The interface form capability field (1 byte) specifies the interface form that is supported on the forward and reverse links. This is currently represented by selecting bit 0, bit 1 or bit 2 to select the Form II, Form III or Form IV mode on the forward link, respectively, and bit 3, bit 4, or Bit 5 selects Form II, Form III or Form IV mode on the reverse link, respectively; and Bits 6 and 7 are reserved and set to 〇. The bit map width and height block (2 bytes) specify the width and height of the bit map in the pixel. The monochrome capability field (1 byte) is used to specify the number of bits of resolution, which can be displayed in a monochrome format. If a display cannot use a single color format, its value is set to zero. Bits 7 through 4 are reserved for future use and are therefore set to zero. Bits 3 through 0 define the maximum number of bits of gray scale, which may exist for each pixel. These four bits make it possible to assign a value of 1 to 15 for each pixel. If the value is zero, the monochrome format is not supported by the display. The far color map footprint (3 bytes) specifies the maximum number of table images in the color map that is present in the display. If the display cannot use the color map format, this value is zero. The far RGB capability shelf (2 bytes) specifies the number of bits that can be displayed in the resolution of the RGB format. If the display cannot use the RGB format, this value is zero. The RGB capability character consists of three independent unsigned values, -108 - This paper scale applies to the Chinese National Standard (CNS) A4 specification (210X 297 oc ocisfin 1255118)

Where: Bits 3 through 0 define the maximum number of bits in blue, bits 7 through 4 define the maximum number of bits in green, and bits 丨丨 to 8 define the maximum number of bits in red in each pixel. Currently, bits 15 through 12 are reserved for future use, which is typically set to zero. The Y Cr Cb capability block (2 bytes) specifies the number of bits that can be displayed in the resolution of the γ cr Cb format. This value is zero if the display cannot use γ Cr ’ format. The γ Cr Cb capability character is composed of three independent main helmet symbol values, wherein: bit 3 to 〇 defines the maximum number of bits in the sample 'bits 7 to 4 define the maximum number of bits in the Cr sample, The bits 到J to 8 are the maximum number of bits in the Y sample, while the bits 15 to 12 are currently reserved for future use, which is set to zero. The display feature capability indicator clamp uses 4 bytes, which contain a set of flags to represent particular features in the supported display. A one-bit setting of 1 means support for this ability, and a one-bit setting of zero means that the ability is not supported. The value of this bit 代表 represents whether or not the bit map block transfer packet is supported (packet form 71). The values of bits 2, 2, and 3 respectively indicate whether the bit map area is filled in the packet (packet form 72), the bit pattern fill packet (packet form 73), or the communication link data channel packet (packet form 74). . The value of bit 4 represents whether the display has the ability to make a color transparent, and the values of bits 5 and 6 represent the video data or sound data if the display can be in the format of the package, respectively, and the value of bit 7 Representing a reverse link video stream that can be transmitted by a camera if it is far away. The values of bits 12 and 12 represent that the client communicates with a pointing device and can transmit and receive pointing device data packets, or communicate with a keyboard, which can respectively transmit -109- the Ugg branch country standard ( CNS) A4 size (210X297 mm)

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And receive keyboard data packets. Units 13 through 31 are currently reserved for future use, or otherwise used by system designers, which are usually set equal to 〇. The display video frame rate capability block (1 byte) refers to the maximum video stream update capability of the child frame. A host may choose to update the video buffer depth field (2 bytes) at a rate that is slower than the value specified in the block to specify that the video is dedicated to each of the audio streams. The depth of the elastic buffer. The sound channel capability field (2 bytes) contains a set of flags that represent which sound channel is supported by the display (client). A one-bit setting of 1 means that the channel is supported, and a one-bit setting of zero means that the channel is not supported. The bit position is assigned to different channels, so that the bit positions 〇, 1, 2, 3, 4, 5, 6, and 7 represent the left front, the right front, the left rear, the right rear 刖 center, and the person is low, The left channel of the ring field and the right channel of the ring field. Bits 8 through 15 are currently reserved for future use and are typically set to zero. The 2-byte sound sample rate capability field for the forward link contains a set of flags to represent the sound sample capture rate capability of the client device. According to this, the bit positions assigned to different rates are respectively specified as bits 〇, 1, 2, 3, 4, 5, 6, 7, and 8 respectively, which are assigned to 8 每秒, 16 每秒 (), respectively. , 24,000, 32,000, 40,000, 48,000, 11,025, 22 〇 5 〇 and 44, 10 〇 samples (SPS), where bits 9 to 15 are reserved for future or other rates as needed. For '〇'. For a bit value of one of these bits, a value of 1 means that it has a specific sample rate, and sets the bit to 0 to indicate that it does not support the sample rate. -110-

This paper national standard (CNS) A4 specifications (2l0X297 public love) A7 B7

1255118 V. INSTRUCTIONS The minimum frame rate block (2-byte) specifies the minimum frame rate, which is the number of frames per second. The minimum subframe rate maintains the display rate of updates to read some of the sensors or pointing devices in the display. A 2-bit microphone sampling rate capability field for which the pair of flags contains a set of flags to represent the sound sampling rate capability of the microphone in the client device. For MDDi, a client device microphone is set to support a minimum of at least 8000 samples per second. The bit position of this field is specified as a different rate, and its bit positions 0, 1, 2, 3, 4, 5, 6, 7, and 8 are used to represent 8 〇〇〇' 16 每秒, respectively. 〇, 24,000, 32,000, 40,000, 48, 0〇〇, 11, 〇25, 22, 050 and 44,100 samples (SPS), where bits 9 to 15 are reserved for future use or other rates as needed, so The setting is set to '〇'. The bit value for one of these bits is set to 'represents that it supports a particular sample rate, and the bit is set to, 〇, to indicate that it does not support the sample rate. If the microphone is not connected, each microphone sampling rate capability bit setting is equal to zero. The far content protection form field (2 bytes) contains a set of flags representing that the digital content protection is supported by the display. Currently, the bit position is used to support DTCP on its behalf, and the bit position 1 is used to represent HDCP support, where bit positions 2 to 15 are reserved for other protection schemes as needed or available, so they are currently set. Zero. G. For display request and condition, the reverse link request field (3 bytes) specifies that the display needs to transmit information to the host's byte on the reverse link in the next subframe. Number -111, home standard (CNS) A4 size (210X297 mm)

▲ This paper size applies to China 001863 1255118 A7 B7 V. Invention Description (109) The CRC error number block (1 byte) represents how many CRC errors have occurred since the beginning of the media frame. The number of crc is reset when a subframe header packet with a zero number of frames is transmitted. If the actual number of Crc errors exceeds 2 5 5 ', then the value saturates at 2 $ 5. The capability change field uses a 1-byte to represent the change in the capabilities of the display. This can happen if a user connects to a peripheral device, such as a microphone, keyboard or display, or for some other reason. This capability has not changed since the last display capability packet was transmitted when bit [7:0] is equal to 0 ’. However, when the bit [7: 〇] is equal to 1 to 255, the ability changes. The display capability packet is checked to determine the new display characteristic. H. Transmitting Packets for Bit Blocks The X value and gamma value fields of the upper left corner of the window use 2 bytes, each of which specifies the X and γ values of the coordinates of the upper left corner of the window to be moved. The window width and height block uses 2 bytes, each of which specifies the width and height of the window to be moved. The Window X Move and Y Move Blocks use 2 bytes, each of which specifies the number of pixels the window will move horizontally and vertically. A positive value of X causes the window to move to the right, while a negative value causes a leftward movement, while a positive value of Y causes the window to move downward, and a negative value causes the upward movement. I. Filling the packet for the bitmap area The X and γ values in the upper left corner of the window use 2 bytes, each of which specifies the X and Y values of the coordinates of the upper left corner of the window to be filled. The window width and height fields (each of which is 2 bytes) specify the width of the window to be filled and -112 wtar National Standard (CNS) A4 specification (210X297 dongdong) 1255118 A7 B7 V. Description of invention (11〇) height. The Video Data Format Descriptor field (2 bytes) specifies the format of the padding value for this Pixel Area. This format is the same as the field of the video stream packet. The pixel area fill value field (4 bytes) contains the pixel value specified by the above-mentioned block to fill the window. The format of this pixel is specified in the video data formatter blocker. J. For the bitmap image fill packet The coordinate X value and gamma value field in the upper left corner of the window uses 2 bytes, each of which specifies the x and γ values of the coordinates of the upper left corner of the window to be filled. The window width and height fields (each of which are 2 bytes) specify the width and height of the window to be filled. The pattern width and pattern height fields (each being 2 bytes) specify the width and height of the fill pattern, respectively. The 2-byte video data formatter field specifies the format of the padding value for the pixel region. Figure 11 shows how to encode the video material format descriptor. This format is the same as the placement of the video stream packet. The CRC field (2 bytes) of this parameter contains the CRC from the length of the packet to all the bytes of the video formatter. If this CRC cannot be checked, the entire packet is discarded. The pattern pixel data field contains the original video message 'which specifies the padding pattern in the format indicated by the video material format descriptor. The data is packed into bytes, and the first pixel of each column must be aligned. The fill pattern data is transmitted one column at a time. The pattern pixel data CRC field (2 bytes) contains the CRC of the pixel data only by the pattern. If this CRC check fails, the pattern pixel data is still available, but the number of CRC errors must be increased. K. Communication Link Data Channel Packet -113- National Standard for Paper (CNS) A4 Specification (210X297 mm) ""."" 1255118 A7 B7

V. INSTRUCTIONS (111) The CRC field (2 bytes) of this parameter contains a 16-bit CRC from the length of the packet to all bytes of the packet. If this CRC cannot be checked, the entire packet is discarded. The communication key data shelf contains the original data from the communication channel. This material is only transferred to the computing device in the display. The $Hayton k-bonded CRC shelf (2-byte) contains a 16-bit CRC of only the communication keying material. If this CRC check fails, the communication link information is still available or useful, but the number of CRC errors is increased. L. For interface form handover request packet The interface form field (1 byte) specifies the new interface form to be used. The values in this field specify the interface form as follows. If the value in bit 7 is equal to 0, the formal handoff request is for the forward link, and if it is equal to 1, the form handoff request is used for the reverse link. Bits 6 through j are reserved for future use and are typically set to zero. Bits 2 through 〇 are used to form the interface form to be used. The value 1 represents the transfer to the formal 1 mode, the value 2 is the transfer to the formal η mode, the value 3 is the transfer to the formal mode, and the value 4 is For delivery to Form IV mode. This value 〇, and 5 to 7 are reserved for future combinations of other modes or modes. For the interface form notification packet S; the 1-sided form barrier (1 byte) has a value to confirm the new interface form to be used. The value in this field specifies the interface form as follows. If bit 7 is equal to 0 'the child form handover request is used for the forward link, and if it is equal to i, then the form delivery request is used for The reverse link. Positions 6 to 3 are currently reserved as needed to specify other handovers -114- 1255118 A7

Form, which is usually set to 〇. However, the position 2 to the system is used to define the interface form to be used. The value is 砉 1 丄, & μ /, the value U represents an unknown, or the parent of the request does not execute, the value 1, 2, 3 and 4 points become the master, A, and the knife represents the fork to Form I, Form II, Form III and Form IV mode. Disk #, ^ values 5 to 7 are reserved for other mode assignments as needed. N. For execution form delivery packet The 1-byte interface form field represents the new interface form to be used. The value present in this block first uses the value of bit 7 to specify the interface form to be handed over to the forward or reverse link. The value |0, represents that the form of the delivery request is for the forward link, and the value, 丨, is the reverse link. Bits 6 through 3 are reserved for future use and are therefore usually set to a value of zero. However, bits 2 through 用来 are used to define the interface form to be used, and the values 1, 2, 3, and 4 specify the use of the transfer to Form I, Form π, Form III, and Form IV modes, respectively. The use of the values 〇 and 5 to 7 for these bits is reserved for future use. 〇 对于 如 如 如 如 如 如 远 远 远 远 远 远 远 远 远 远 远 远 远 远 远 远 远 致 致 致 致 致 致 致 致 致 致 致 致 致 致 致 致 致 ( ( ( ( ( ( A bit is set to 1 to enable the corresponding channel, and a bit is set to 〇 to disable the corresponding channel. Bits 0 through 5 represent channels 〇 to 5, which handle the left front, right front, left rear, front center, and subwoofer channels, respectively. Bits 6 and 7 are reserved for future use and are set to 〇.对于. For the reverse sound sample rate packet, the sound sampling rate field (1 byte) specifies the digital sound sampling rate -115-® home standard specification (21. X 297 mm) 1255118 A7 B7 V. Description of invention ( 113. The value of this field is specified as a different rate, and its bit positions 〇, 1, 2, 3, 4, 5, ό, 7, and 8 are used to represent 8, respectively. 16,000, 24,000, 32,000, 40, 〇〇〇, 48, 〇〇〇, 11, 〇 25 '22,050 and 44, 1 〇〇 sample 01^), where values 9 to 254 are reserved for future or other rates as needed To use, so it is currently set to, oh,. The value 255 is used to disable the reverse link sound. The far sample format field (1 byte) specifies the format of the digital sound sample. When the bit [1:0] is equal to 0, the digital sound sample is in a linear format, and when it is equal to 1, the digital sound sample is in a law format, and when it is equal to 2, the digital sound sample is a law-Α law. formula. Bits [7:2] are reserved for other purposes to specify the sound format as needed, which is usually set to 〇. Q. For the digital content protection burden package 琢 The content protection form field (1 byte) specifies the digital content protection method to be used. The value 〇 stands for Digital Transfer Content Protection (DTCp) and the value 1 stands for High Frequency Wide Digital Content Protection System (HDCP). The range of values from 2 to 255 is currently not specified, but is reserved for other protection schemes as needed. The content protection burden message is blocked by a variable length field containing content protection messages transmitted between the host and the client. R· For Transparent Color Enable Packets This transparent color enabled palm position (1 byte) specifies the transparent color mode. If the bit is. Equal to 01 disables the transparency =, if it is equal to 1, the transparent color mode is enabled, and the transparent color is specified by the following two parameters. The byte of this byte is reserved for future use and is set to 〇. -116- Paper (4) S-standard (CNS) A4 size (21. X 297 mm) — -------;- A7 B7

1255118 V. Description of Invention (114) The video data formatter blocker (2-byte) specifies the format of the padding value of the pixel area. Figure 11 shows how to encode the video data format into the symbol. The video stream packet has the same field. The S pixel area padding value is calculated using the 4-bit field to the pixel value to be filled in the window. The format of this pixel is specified in the video data format descriptor field. • For the round trip delay measurement packet, the CRC field (2 bytes) contains the 16-bit CRC from the packet length to all the bytes in the packet form. If this CRC cannot be checked, the entire packet is discarded. The all zeros (1 byte) contain zeros to ensure that all MDDI-Data signals are in the zero state during the first guard period before the line driver is disabled. The field (8-bit) is used to allow the MDDI-Data line driver in the host to be disabled before the line driver in the client (display) is enabled. The host is at guard time 1 bit. In addition to its MDDI-Data line driver, the display enables its line driver immediately after the last bit of the guard time 1. The measurement period is clamped to a 5 12-bit window, which is used to allow The display responds to Oxff, Oxff, 〇x〇, which is half the data rate used on the forward link. This rate is in response to the reverse link rate divisor being 1. The display is in the measurement period. This response is immediately sent to the beginning. This response will be received by a host whose exact link has a round-trip delay after the first bit of the measurement period at the host. The --___-117 in the display - 豕 Standard (CNS) A4 size (210X297 mm)

This paper" 1255118 A7 B7 V. Description of the invention 〇 15) The MDDI_Data line driver is disabled immediately after or after the display responds to 〇xff, 0xff, 0x00. The value (8 bytes) in the 2 guard time field allows the client MDDI_Data line driver to be disabled before the line driver in the host is enabled. Guard time 2 is always present' but only needed if the round trip is delayed by the maximum amount measured during the measurement period. The client disables its line driver during bit 0 of guard time 2, and the host enables its line driver immediately after the last bit of guard time 2. The drive re-enabling field (1 byte) is set equal to 〇 to ensure that all MDDI__Data signals are re-enabled before the packet length field of the next packet. T. For Forward Bonding Skew Correction Packet The CRC field (2 bytes) of this parameter contains the 16-bit CRC from the packet length to all the bytes of the packet. If this CRC cannot be checked, the entire packet is discarded. The corrected data sequence block contains a sequence of 5 12-bit data that causes the MDDI_Data signal to be triggered during each data cycle. During processing of the calibration data sequence, the MDDI host controller sets all MDDI_Data signals equal to the flash signal. The display clock recovery circuit must use only MDDI_Stb instead of MDDI_Stb xor MDDI_DataO to recover the data clock when the correction data sequence field is received by the client display. According to the correct phase of the MDDI_Stb signal at the beginning of the correction data sequence field, the correction data sequence will generally be one of the following according to the interface form used to transmit the packet: -118- The paper scale applies to the Chinese national standard (CNS) A4 size (210 X 297 mm) 001870 1255118 A7 B7 V. Description of invention (116) Form I - Oxaa, Oxaa ... or 0x55, 0x55 ... Form II - Oxcc, Oxcc ... or 0x33, 0x33 ... Form III - OxfO, OxfO ... or OxOf, OxOf ... Form IV - Oxff, 0x00, Oxff, 0x00 ... or 0x00, Oxff, 0x00, Oxff ... possible MDDI_Data for the Form I and Form II interfaces and Examples of MDDI_Stb waveforms are shown in Figure 62. XVI. Conclusions While various specific embodiments of the invention have been described hereinabove, it is to be understood that Therefore, the spirit and scope of the invention are not limited by the foregoing exemplary embodiments, but are defined only by the scope of the following claims and their equivalents. -119- China National Standard (CNS) A4 Specification (210 X 297 public I)

The above columns are filled by this Council. 1255118 A4 C4 Chinese Manual Replacement Page (April, 1993) Patent Specification Chinese A digital data interface, method, device, computer program product processor and state machine for transmitting digital data English"DIGITAL DATA INTERFACE, METHOD, APPARATUS, COMPUTER PROGRAM PRODUCT, PROCESSOR AND STATE MACHINE FOR TRANSFERRING DIGITAL DATA, Name 1. Su Kunhan 2. George Allen Willi 3. Brian Stitch

QIUZHEN ZOU GEORGE ALAN WILEY BRIAN STEELE Country 2, Invention 2 The person who wants to live in this paper, the name of the residence, the name of the residence (name) Nationality 1 · China PEOPLE'S REPUBLIC OF CHINA 2.3. Both USA 1 · Ruger, Raja, California, USA 5791 RUTGERS ROAD, LA JOLLA, CALIFORNIA 92037, USA 2. 5740 BRITTANY FORREST LANE, SAN DIEGO, CALIFORNIA 92130, USA 3, Curacao, San Diego, California, USA 1074 ILIAD WAY, LAFAYETTE, COLORADO 80026, USA, 1074 Ayla Road, Lafayette, Texas

QUALCOMM INCORPORATED US Québec Company USA 5775 MOREHOUSE DRIVE, SAN DIEGO, CALIFORNL· 92121-1714, USA Philippe R. Waldham PHILIP R. WADSWORTH Chinese 丨

1 grid (210 X sharp 55 every 1) 8 fine 55 patent application r...: 丨中.文书书 replacement page (April 1993) V. Invention description ( ) Play), and based on the corresponding available The rendering resolution and control components are prepared to be done when presented. For example, a typical computer video resolution is measured in units of X by gamma pixels, basically ranging from a minimum of 480x640 to 600x800 and l〇24xl〇24, although there are usually more than 4 other The resolution can be determined according to the needs. The image presentation is also affected by the image content and the capabilities of a given video controller, which is not a pre-defined color level or color depth (the number of bits used to generate each pixel of color) and intensity. And any additional burdens used. For example, a typical computer presentation can be expected to have 8 to 32 or more bits per pixel anywhere, so that the king can have different colors (shadows and hues), although other values are encountered. . From the above values, it can be seen that a given screen image will need to transmit data from 2.45 Mb to about 33.35 Mb, ranging from a typical minimum to a maximum resolution and depth. When viewing video or animated images at a rate of 3 frames per second, the amount of data required is approximately 73.7 to 1,006 million bits per second (Mbps), or approximately every second. 9.21 to 125 is a million-digit number (Mbps). In addition, it may need to cooperate with the image to present sound material, such as for a multimedia presentation, or as an independent high resolution sound presentation, such as CD quality music. It can also use additional signals to handle interactive commands, controls and signals. Each of these options will add more information to be transferred. In either case, when it needs to transmit high-quality or high-resolution image data and high-quality sound information or data signals to the end user to generate a rich content experience, present the components and the source used to provide such data. A data transfer rate link is required between the master devices. -6 - This paper size applies to Chinese National Standard (CNS) A4 specification (210 X 297 mm) 1255 W〇8i 120455 t A7 B7 Chinese manual replacement page (April 1993) V. Invention description (for 琢 client device The desired video and audio data can be transmitted using a twisted pair of low power and high speed capabilities, which can be transmitted using other cables, as described below. A particular embodiment of the invention using a USB interface allows for a set of conductors Idle transmission, and the main signaling and control on the USB connection, it shuts down when not in use, and consumes a small amount of power. The USB interface is the standard for the use of today's personal computer devices, and the USB interface and its operation The details are well known in the art, so it is not explained here. For the USB interface, the communication between the host and the display conforms to the universal serial bus specification version 2. In the application using the form u interface, USB It is the primary messaging gateway, and there may be a voice return channel, which is the host's choice to poll the client through the MDDI, column data signal.

A high-performance display in the form of HDTV or similar high resolution requires a data stream at a rate of approximately 1.5 Gbps to support full animation video. The Form II interface supports high data rates by transmitting 2 bits in parallel. Form III transfers 8 bits in parallel by the parallel transmission of 4 bits. The protocol used by MDDI allows each form of I, π, ΠΙ or iv host to communicate with any form j, η, (1) or IV client or display by coordinating the highest data rate that may be used. The ability or feature available to the lowest power device is used to set the performance of the link. As a rule, even if the host and client in the system can use the Form II, Form III or Form IV interface, they all begin to operate in the form j interface. The host then determines the capabilities of the target client or display, and coordinates a handover or reset operation to form Z, form π or form IV -24-degree applicable to the standard specification (210X297 public test)读录) Pan φ〇 455 Patent Application Replacement Page (April 1993) Invention Description (In Figure 41, the input is negative. The output is - logic!, if: (v is greater than 〇. Another way To describe this condition as a differential amplifier with a gain of ::; infinitely large, whose output is cropped at the logical phantom voltage ^ 1 delay skew between different pairs y-slope skew must be taken The miniaturization operates the differential transmission system at the highest possible rate. In Figure 42, the host controller side and the client or display controller 4204 display the transmission of packets on the communication link 42〇6. The host control ^ uses a series of three drivers 421, 4212 and 4124 to receive the host DATA and STB signals, and receives the client lean signal to be transmitted. The driver responsible for transmitting the host data is consistently used. Can signal input to allow The communication link is only used when it is required to pass from the host to the client. Since the STB signal forms a flaw in the data transmission, no additional enable is used for the drive state (4212). Signals. The output of each DATA and STB driver is connected to the termination impedance or resistors 4216a, 4216b, 4216c, and 4216d, respectively. The termination resistors 4216a and 4216b can also be used as inputs to the receiver 4230 at the client of the STB signal processing. Impedance, and additional termination resistors 4236a and 4236b are placed in series resistors 4216c and 4216d, respectively, at the input of the customer processing received as 4 2 3 2 . The sixth driver 4234 in the client controller is used. The data signal is prepared for transmission by the client to the host, wherein the driver 42 14 on the input side processes the data for transmission to the host via the termination resistors 42 16c and 4126d. -70- This paper scale applies China National Standard (CNS) A4 specification (210 X 297 mm)

Order » 125 5 Halo 1^120455 Patent Application + Document Replacement Page (April, 1993) V. Invention Description (_ Γ~ Α7 Β7 The delay between the skew causes the output clock of the output clock to be distorted. The lean material at the D input of the receiver flip-flop (RXFF) stage using the flip-flops 5728, 5730 must be slightly changed after the clock edge, so it can be sampled guilty. The figure shows two The series of delay lines 5732& and 5732b are used to solve two different problems in generating this timing relationship. In practical implementations, these can be integrated into a single delay element. Figure 5 is not an example of the interface. The data on the formal link of the signal processing, Stb and pulse recovery timing. The significant overall delay skew usually comes from the sum of the skew in the following stages. The transmitter flip-flop (TXFF) with the flip-flops 5704, 5706 a transmitter driver (tXDRVR) with drivers 5708, 5710; a cable 5702; a receive line receiver (RXRCVR) with receivers 5722, 5724; and a receiver XOR logic (RXXOR). The delay 5732a must match or exceed In the RXXOR phase The delay of X〇R gate 5736 is determined by the following relationship: t pd - min (Delay 1) 2 tp£) - max ( XOR ) It is necessary to meet this requirement, so the receiver flip-flop 5728 The D input of 5 73 2 does not change before its clock input. This is true when the hold time of rxff is zero. The purpose or function of the Delay2 is to compensate the hold time of the RXFF flip-flop according to the following relationship: tpD - min(Delay 2) = tH(RXFF) -93- This paper scale applies to China National Standard (CNS) A4 specification. (210 x 297 mm)

装

Line Α7 Β7 1 丨 诈 045 0045 Patent Application, Book Replacement Page (April 1993) V. Invention Description (^) B. MDDI Form II, ΙΗ and IV Chain Timing Analysis is similar to Figure 41 and The typical interface circuit of 5 7 is not the same as Figure 5 9 ' to accommodate the Form II, III and IV interface links. It uses additional components in the TXFF (5904), TXDRVR (5908), RXRCVCR (5924), and RXFF (5928, 593 0) stages to accommodate additional signal processing. In Figure 59, exemplary or typical values for transmission delay and skew are shown for each of several processing or interface stages of an MDDI Form II forward link. In addition to the skew of the delay between MDDI_Stb and MDDI_DataO, the duty cycle of the output clock is affected, and there is also a skew between the two signals and another MDDI_Data signal. The data at the D input of the receiver flip-flop B (RXFFB) stage including the flip-flops 5928, 5930 is slightly changed after the clock edge, so that it can be reliably sampled. If MDDI_Datal arrives earlier than MDDIStb or MDDI_DataO, then MDDI_Datal must delay to sample at least the amount of delay skew. For this purpose, the data is delayed using the Delay3 delay line. If MDDI_Datal arrives later than MDDI_Stb and MDDI_DataO, and it is delayed by Delay3, the point changed by MDDI_Datal moves closer to the next clock edge. This process determines the upper limit of the data rate for a MDDI Form II, III or IV link. Some exemplary differences in the timing or skew relationship between the two data signals and MDDI_Stb are shown in Figures 60a, 60b, and 60c. When MDDI-DataX arrives as early as possible, in order to reliably sample data in RXFFB. , Delay3 is set according to the following relationship: bD-niinpelayS)匕tSKEW-max(LINK) + tH(RxFFB) +tpD-max(XOR) -95- This paper scale applies to China National Standard (CNS) A4 specification (21 〇x 297 mm) 1255 Μ (8ι 120455 Patent Application) Chinese Manual Replacement Page (April 1993) V. Invention Description () 117 Graphical Symbol Description 100 Computer 102 Wireless Device or Personal Data Assistant Device 104 Display Device 106 Display Device 108 Sound Regeneration System 110 Communication Link 112 Sound Regeneration System 114 External Speaker 202 Host 202' Host 204 Client 204' Client 206 Communication Channel 208 Forward Link 210 Reverse Link 402 MDDI Link Controller 404 MDDI link controller 406 communication channel 408 USB host device 410 USB client device 502 MDDI link controller 504 MDDI link controller 506 communication channel -120 - the paper size is suitable China National Standard (CNS) A4 specification (210 X 297 mm),, - ":, A7 B7 mwm l|20455 patent application 卞月中文疑疑(四)书 replacement page (April 1993) V. Invention description ( 3502 Delay 3504 Delay 3600 CRC Generator and Checker 3602 CRC Register 3604 Multiplexer 3606 Multiplexer 3608 NAND Gate 3610 NOR Gate 3612 OR Gate 3614 AND Gate 4002 DATA Signal 4004 STB Signal 4006 Clock Signal 4100 Transmission Section 4102 Signal Path 4104 Circuit Element 4106 Circuit Element 4108 Differential Line Driver 4110 Differential Line Driver 4112 Logic Element 4120 Receiver Section 4122 Differential Line Receiver 4124 Differential Line Receiver 4126 Logic Element 4128 Circuit - 121 - This paper size applies to China Standard (CNS) A4 Specification (210 X 297 mm) I255_ 120455 Patent Application Replacement Page (April 1993) V. Invention Description 4130 Circuit 4132 Delay Element 4202 Host Controller 4204 Client or Display Controller 4206 Communication Bond 4210 Driver 4212 Driver 4214 Driver 4216a Terminal Impedance or Resistor 4216b Termination Impedance or Resistor 4216c Termination Impedance Resistor 4216d Terminal Impedance or Resistor 4218a Resistor 4218b Resistor 4220 Voltage Source 4230 Client Receiver 4232 Data Processing Receiver 4234 Driver 4236a Termination Resistor 4236b Termination Resistor 4900 State Machine 4902 Status 4904 Status 4906 Status 4908 Status - 122- This paper size applies China National Standard (CNS) A4 specification (210 X 297 mm)

Ig55 test] 〇 & 120455 patent application this ... L binding text manual replacement page (9) year of the month) ^ five, invention description (_) 4910 state 4912 state 5302 area 5304 area 5306 area 5502 state machine 5504 processor 5508 processing 5702 cable 5704 flip-flop 5706 flip-flop 5708 driver 5710 driver 5722 receiver 5724 receiver 5728 flip-flop 5730 flip-flop 5732a delay line 5732b delay line 5736 XOR gate 5904 flip-flop 5908 flip-flop 5924 flip-flop 5928 Pros and cons 5930 Pros and cons -123 - This paper scale applies to China National Standard (CNS) A4 specification (210X 297 mm)

Claims (1)

|2〇 455 Patent Application Benefits η 3 +文(四)7_The scope of patent replacement (April, 1993) Yiliu, the scope of patent application is between the host device and a client device in the communication path. The rate transfer digital presentation data digitizing data interface includes: a plurality of packet structures linked together to form a communication protocol for transmitting a pre-selection between a host and/or a client on the communication path a combination of digital control and presentation data; and at least one chain controller present in the host device coupled to the client device via the communication path or link for generation, transmission, and reception The packet of the communication protocol is formed into a digital representation of the poor material for one or more data packets. 2. As in the interface of the first application of the patent scope, the dream includes that the packets are grouped together in a media frame, which is transmitted between the host and the client device, and includes reservations having different and variable lengths. The predefined fixed length of the number of packets. 3. 4. 5. If the interface to claim 1 of the patent scope is further included, the sub-frame header packet is placed at the beginning of the population transmitted by the host. For example, if you want to apply for the interface of the patent scope, you can use the interface between the host and the client for two-way navigation. The face junction controller is an interface as claimed in the patent application scope, wherein the female-host link controller further includes at least one link controller to the H, the host device, and one of the paths is coupled to the path The client device is configured to generate a packet forming the communication protocol via the communication, and form a digital transmission and reception or a plurality of data packets. The current data is a paper scale applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) 8 8 8 8 AB c D JE55M8 VI. Patent application scope 6. If the interface of the patent application scope 5 is included, The host link controller includes one or more differential line drivers; and the client link controller includes one or more differential line receivers coupled to the communication path. 7. The interface of the first application of the patent scope, further comprising a video stream packet of the video format data, and a sound stream packet of the voice form data, for transmitting data to the client by the host on a forward link, Used to present to a client user. 8. The interface of claim 1 of the patent application further includes one or more reverse link wrap packets of the client to transmit data to the host. 9. The interface of claim 1, wherein the host link controller requests display capability information from the client device to determine which data and data rate the client can accept through the interface. 10. The interface of claim 1, wherein the host device comprises a wireless communication device. 11. The interface of claim 1 wherein the host device comprises a portable computer having a wireless data unit disposed therein. 12. The interface of claim 1 wherein the host device comprises a central processing unit. 13. The interface of claim 1 of the patent application, wherein the host device is set as a human productivity device. 14. The interface of claim 1 wherein the host device is provided as a personal entertainment device. 15. The interface of claim 1 wherein the client device includes a portable video display. -2- This paper scale applies to China National Standard (CNS) A4 specification (210 X 297 mm) msm A8 B8 C8 D8 VI. Patent application scope 16. For the application of the patent scope, the client device contains A portable video presentation system. π· The application of the 16th item of the patent scope, wherein the portable video presentation system comprises a DVD player. 18. The interface of the sixth application of the patent scope of claim μ, wherein The portable video presentation system comprises a game player device. The interface of the above item of claim 1, wherein the client device comprises a portable sound presentation system. The interface further includes: a plurality of transfer modes, each of which allows data of different maximum number of bits to be transmitted in parallel within a given time period, wherein each mode is coordinated between the host and the client link driver To select; and the transmission mode is dynamically adjustable between the modes during data transmission. 21· The interface of the first item of the patent scope of the application, further including a plurality of packets It can be used to transmit video information selected from a group consisting of a color map, a bit block transfer, a bit map area fill, a bit pattern fill, and a transparent color enable form packet. The interface of the one item further includes a padding form packet generated by the host to occupy a period of forward link transmission without data. 23) The interface of the first item of the patent application scope further includes a transmission interface for use. The user-defined stream form packet of the defined data. 24 · The interface of the i-th application scope of the patent application, further including the host - 3- paper scale applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 Dong) 1255118 VI. Patent Application A8 B8 C8 D8 Transmit a link closure form to the client to terminate the data transfer in either direction on the communication path. 25·If you apply for the interface of the patent garden, Further including the client device to wake up the host by the hibernation state. 26 - is in the communication path between a host device and a client device A method of transmitting digital data at a high rate, comprising: generating one or more of a plurality of predefined packet structures and chaining them together to form a predefined communication protocol; using the communication protocol in the communication Transmitting a combination of pre-selected digital control and presentation data between the host and the client device; coupling at least one link controller present in the host device to the client device via the communication path, The host link controller is configured to generate, transmit, and receive a packet forming the communication protocol, and form a digitalized presentation data into one or more data packets; and use the link controller to form a packet on the communication path Transfer data. 27. The method of claim 26, further comprising grouping the packets together in a media frame to communicate between the host and the client, the media frame comprising different and variable lengths A predetermined fixed length of a predetermined number of packets. 28. The method of claim 26, further comprising packet transmission by the host using a header frame form packet. 29·If the method of applying for the scope of patent No. 26 is further included in the communication-4 - the paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) A BCD position 8 VI, the patent application scope link The information is transmitted in both directions between the host and the client. 30. The method of claim 26, further comprising at least one link controller present in the host device coupled to the host device via the communication path or link for generating Transmitting and receiving packets forming the communication protocol, and forming the digital presentation data into one or more data packets. 31. The method of claim 3, wherein the host link controller includes one or more differential line drivers; and the client link controller includes one or more of the communication paths Differential line receiver. 32. The method of claim 26, wherein the method further comprises: transmitting, by the host, the data to the one or more video stream packets and the sound stream form of the voice form data using the video feed' The client presents to a client user. 33. The method of claim 26, further comprising using one or more reverse link wrap-around packets to transfer data to the host by the client. 34. The method of claim 26, further comprising requesting display capability information from the client by a host link controller to determine which data and data rate the client can accept through the interface. 35. The method of claim 34, further comprising transmitting, by the client chain controller, a display or presentation capability to the host link controller using at least one display capability form packet. 36. The method of claim 26, wherein the communication path comprises a series of four or more conductors and a shielded cable. -5- W«Applicable to China's national standard ----- AB c D 1255118 VI. Patent application scope 37. The method of claim 26, further comprising operating one by each of the chain controllers The USB data interface becomes part of the communication path. 38. The method of claim 26, wherein the host device comprises a wireless communication device. 39. The method of claim 26, wherein the host device comprises a portable computer having a wireless data unit disposed therein. 4. The method of claim 26, wherein the client device comprises a portable video display. 41. The method of claim 40, wherein the portable video display comprises a microdisplay device. 42. The method of claim 26, wherein the client device comprises a portable sound presentation system. 43. The method of claim 26, further comprising storing the multimedia material at the host for transmission to the client device. 44. The method of claim 26, wherein each packet can include a packet length field, one or more packet data fields, and a cyclic redundancy check block. 45. The method of claim 27, further comprising: coordinating between the host and the client link driver, using one of a plurality of transfer modes in each direction, each of which is allowed for a given period of time The data of different maximum number of bits is transmitted in parallel; and dynamically adjusted between the transmission modes during the delivery of the lean material. 46. The method of applying for the scope of patent No. 26 further includes the use of the plural -6- This paper scale applies the Chinese National Standard (CNS) A4 specification (210^717 1255118) ...^ or a plurality of video information selected from a group consisting of a color map, a bit block transfer area fill, a bit pattern fill, and a transparent color enable form packet. A. The method of claim 26, further comprising the period in which the host-generated packet occupies a forward chain that does not have data. The method of clause 26 of the patent scope further includes transmitting the user-defined data of the interface using the user's 44 string package. 49. The method of claim 26, further comprising terminating data transfer in either direction on the communication path by the host transmitting a link closure form to the client. 50. The method of claim 26, further comprising waking up the host by a hibernation state by communicating with the client. 51. A device for transmitting digital data at a high rate between a host device and a client device over a communication path, comprising: at least one host link controller disposed in the remote host device for generating one or a plurality of predefined pre-defined packet structures, linked together to form a predefined communication protocol, and utilizing the communication protocol to transmit a pre-selection between the host and the client device over the communication path a combination of digital control and presentation data; placed in at least one client controller of the client device and coupled to the host link controller via the communication path; and each link controller is also used to generate and transmit And receiving a packet forming the communication protocol and used to form a digital representation of one or more capital paper scales applicable to the Chinese National Standard (CNS) A4 specification (210X 297 mm) A8 B8 C8 D8 Shenha patent range Material package. 52. The device of claim 5, wherein the host controller comprises a state machine. 53 'j〆 • A device as claimed in claim 5, wherein the host controller includes a general purpose signal processor. 54. The device of claim 5, wherein the remote packets are grouped together in the media frame to communicate between the host and the client, and the media frame includes different and variable lengths. A predetermined fixed length of a predetermined number of packets. 55. The apparatus of claim 51, further comprising a sub-frame header packet placed at the beginning of the transmission of the packet by the host. 56. The device of claim 5, wherein the link controller is operative to transmit information bidirectionally between the host and the client device on the communication link. 57. The device of claim 51, wherein the client controller includes a client receiver of the client device. 58. The device of claim 57, wherein the host controller includes one or more differential line drivers; and the client receiver includes one or more differential line receivers coupled to the communication path Device. The device n of claim 51 includes a video stream form packet using the (4) form data and a voice stream form packet of the voice form data, which is transmitted by the host to the client for presentation to a client. When. 6〇. As in the application for the scope of the 51st device m multiple reverse 1255118 as -: B8 C8 P«««- . . ‘... D8 VI. Patent Application The link wraps the packet to be sent by the client to the host. 61. The device of claim 5, wherein the host link controller is configured to request display capability information from the client device to determine which data and data rate the client can accept through the interface. 62. The device of claim 6, wherein the dream comprises at least one display capability form packet to transfer display or presentation capabilities to the host link controller by a client chain controller. 63. The device of claim 5, wherein the communication path comprises a series of four or more conductors and a shielded cable. 64. The device of claim 63, wherein the cable comprises six conductors and a shield. 65. The device of claim 63, wherein the cable comprises 8 conductors and a shield. 66. The device of claim 63, wherein the communication path comprises a cable having four conductors, a USB form interface, and a shield. 67. The device of claim 63, wherein each of the conductors comprises a plurality of bundles of electrical wires having a resistance of about 11 ohms per thousand inches per length and a signal transmission speed of about 66.66c. The maximum delay of the cable is less than about 8 nsec·, and a shadow. 68. The device of claim 51, wherein the host is equipped with a wireless communication device.口 69·If the device of the fifth paragraph of the patent application scope, Α &gt; Zhongluwang machine package has a wireless data machine placed in it, 祥 〇 八 八 八 -9 -9 1255118 as B8 C8 --------- - D8 VI. Application for Patent Park 70. For the device of claim 51, the client device includes a portable video display. 71. The device of claim 7, wherein the portable video display comprises a display device. 72. The device of claim 5, wherein the client device comprises a portable sound presentation system. 73. The apparatus of claim 51, further comprising storing the multimedia material at the host for transmission to the client device. 74. The device of claim 51, wherein each packet can include a packet length field, one or more packet data fields, and a cyclic redundancy check field. 75. The device of claim 5, wherein the host and client chain, &gt; control state is used to use a plurality of transmission modes in each direction, each of which is allowed to be given The data of different maximum number of bits is transmitted in parallel within a predetermined period of time; and can be dynamically adjusted between the transmission modes during transmission of the data. I. The device of claim 51, further comprising transmitting one or more of the plurality of packets from the color map, the bit block transport, the bit map fill, the bit pattern fill, and the transparent color The video information selected in the group formed by the enabled form packet. The device of claim 51, further comprising a padding packet generated by the host to occupy a period of forward link transmission without data. 78. The device of claim 51 of the patent application' further includes keyboard information. -10- This paper scale applies to the Chinese National Standard (CNS) A4 specification (210X 297 public D 79. 80. The client device makes the data to the user input device that is integrated into the four households, or from the device of the 51st item of the patent application, the shellfish, the field, the bitterness The king machine controller is packaged in the end transport-link closed form to the data transfer that terminates in the direction of the communication path - a computer program product used in an electronic system, with a path on the - king device and A client device is presented to the user by using the digital data, which includes: a computer-usable medium, which is implemented in the media readable program, so that an application can be: Executing the 'β% brain readable code device includes: a private month to select the first code device for causing the computer system to generate one or more plural predefined packet structures, and the chain Formed together to form a predefined communication protocol; a computer can be referred to as a second code device for causing the computer to transmit a communication between the host and the client device over the communication path using a communication protocol Pre-selected digits And a presentation data# combination; a computer capable of accessing a third code device for causing the computer system to couple at least one chain controller disposed in the host device to the client via the communication path At least one client controller in the end device, the link controller is configured to generate, transmit and receive a packet forming a far-reaching h agreement, and form a digitalized presentation material as one or more data packets; and -11 paper The scale applies to the Chinese National Standard (CNS) Α 4 specifications (21〇X 297 DON) 裴 η VI. Application for Patent Scope A computer can read the fourth code for the computer system to use the link controller to transmit the data in the form of a packet on the communication path. 81. A device for transmitting digital data to a user at a high rate between a host device and a client device over a communication path, the method comprising: generating one or more plurality of predefined packets Structures' and chained together to form a pre-defined communication coordinating device; for transmitting a preselected digital control between the host and the client device over the communication path using the communication protocol Means for presenting a combination of data; means for coupling at least two links to control the 'being together' via the communication path, each bit being in the host and the client, and each for generating, transmitting, and receiving The packet of the communication protocol 'and forms a digital presentation material as one or more data packets; and means for transmitting data in the form of a packet on the communication path by the link controller. 82. The device of claim 81, further comprising means for grouping the packets together in the media frame to communicate between the host and the client, the media frame comprising different and A predefined fixed length of a predetermined number of packets of variable length. 83. The device of claim 81, further comprising a package for transmitting packets by the host in a header frame format. -12- The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) A8 B8 C8 Sixth, the scope of application for patents. One step included in the A host controller coupled to the host device, such as the device of claim 81, into one of the link controller packages, and the second link controller includes a coupled device to the client device The client receives crying. 86. The device of claim 85, wherein the host controller includes - or a plurality of differential line actuators; and the read client receiver includes one or more differential lines that are lightly coupled to the communication path receiver. 87. The device of claim 81 of the patent application 'further: containing one or more video stream packets for use in the form of video format and a voice first stream form packet for the poor form of sound to be transmitted by the host to the guest ^ The device that presents to a client user. 88. The device of claim 81, further comprising means for transmitting data from the client to the host using one or more reverse link wrap-around packages. 89. The device of claim 81, further comprising means for requesting display capability information from the client by the host link controller to determine which type of data and data the client can accept through the interface The device of claim 89, further comprising transmitting, by means of a client chain controller, a presentation or presentation capability to the host link controller using at least one display capability form packet. This paper scale applies to the Chinese National Standard (CMS) A4 specification (210X297 mm) Patent Application No. 1 255 181 </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; 92. If the device of claim 8 of the patent scope is applied, the -step includes the operation of a USB data link controller for the operation of the parent device, and the pin interface becomes the communication path. Part of the device. 93. If the device of claim 8 is applied, the medium-sized child machine includes a wireless communication device. ^ A device as claimed in claim 81, wherein the host device comprises a device having a wireless data unit disposed therein as claimed in claim 81; the = device includes a portable video device monitor. 94. 95. 96. The device of claim 95, wherein the portable video display comprises a microdisplay device. 97. The device of claim 81, wherein the client device comprises a portable sound presentation system. 98. 99. The device of claim 81, wherein the device further comprises means for storing multimedia material on the host for transmission to the client device. For example, in the device of claim 81, each of the packets includes a packet length field, one or more packet data fields, and a plurality of check shelves. 100. The apparatus of claim 82, further comprising: means for coordinating, between the host and the client link driver, one of a plurality of transfer modes in each direction, each of which is allowed in one Data of different maximum number of bits transmitted in parallel for a given period of time; -14- This paper scale applies to China National Standard (CNS) A4 specification (210 X 297 mm) 丨Application for patent parks and = Dynamically during data transmission Adjusting the muscle between the transmission modes = the device step of the 81st patent range includes the use of the go, the, the transfer from the color map, the bit block conveyance, the bit map area 埴 _ ^, The device of the video information selected in the group consisting of the graphic pattern expansion and the transparent color-blocking-enabled form packet (^^=_ the device of the 81st item, the step-by-step includes the packet for the form A device for occupying a cycle of a forward link transmission without data. 1ω· = ί Device of the 81st patent range, the step further comprises means for encapsulating the value of the value by means of the user's footstream匕尜传迗interface User-defined poverty 〇4· As claimed in the patent scope, 衮 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , The apparatus for dressing the material. ^ The muscle is as in the device of claim 81, and the step-by-step includes the use of the parent machine to transmit a link closure form to the client to terminate any direction on the child communication path. 106. A device for transmitting data. 106. A processor for use in an electronic system for transmitting digital data at a high rate between a host device and a client device in a two-way path. To produce one or more multiple pre-defined -15- each paper scale applicable to China National Standard (CNS) Α4 specification (210 X 297 mm) A BCD 1255118 VI. The patented package structure is linked and linked Forming a device of a predefined communication protocol; forming a digital presentation data to one or more data packets; using the communication protocol on the communication path to the host and the Transmitting a combination of pre-selected digital control and presentation data between the client devices; and transmitting the data in the form of a packet on the communication path. 107. - for use in an electronic system to reach a host on a communication path a synchronized state machine for transmitting digital data at a high rate between the device and a client device, the state machine being configured to have at least one non-synchronized frame-like synchronization state, at least two synchronized state synchronization states, and At least three synchronized state synchronization states. -16- This paper scale applies to China National Standard (CNS) A4 specification (210X 297 mm)