TW504788B - A probing method for testing with high frequency - Google Patents

A probing method for testing with high frequency Download PDF

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Publication number
TW504788B
TW504788B TW90125045A TW90125045A TW504788B TW 504788 B TW504788 B TW 504788B TW 90125045 A TW90125045 A TW 90125045A TW 90125045 A TW90125045 A TW 90125045A TW 504788 B TW504788 B TW 504788B
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Taiwan
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detection
wafer
wafers
test
endpoints
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TW90125045A
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Chinese (zh)
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John Liu
Yeong-Her Wang
Noty Tseng
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Chipmos Technologies Inc
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  • Measuring Leads Or Probes (AREA)

Abstract

A probing method for testing with high frequency comprises the step of contacting successively a wafer by a probe card. The probe card has a plurality of sets of probe terminals so as to constitute a probing area. While the probe card probing the wafer. The chips probed by probe terminals is less than the chips within the probe area. Thus, the circuit density of the probe card is reduced for avoiding signal interference and cross-talk.

Description

【發明領域】 本發明係有關於一種適 別係有關於一種具有間隔排 法,以判別在晶圓上晶片之 【先前技術】 用於高頻測試之探測方法,特 列組數之探測端點之探測方 好壞。 口 ,f半導體裝置運算時脈〔clock〕之增加與各式產 =价夕樣化,例如高於1(^2微處理器、速度超過MM。之[Field of the invention] The present invention relates to a kind of adaptability. It relates to a method with a spaced row method to discriminate a wafer on a wafer. [Prior art] A detection method for high-frequency testing, and a special number of detection endpoints The detection side is good or bad. The increase of the clock of the f semiconductor device [clock] and various types of products = price, such as higher than 1 (^ 2 microprocessor, speed exceeds MM.

。速率 5己憶體〔double data rate memory, DDR. Rate 5 memory (double data rate memory, DDR

memory〕以及心射頻晶片等半導體裝置,複數個半導體裝 ^在晶圓上完成積體電路後,均需要加以檢測其電性性 月匕’通常測試半導體裝置之測試設備包含有一探測卡 〔probe card〕,而探測卡具有複數個探針〔pr〇be needle〕’以接觸半導體裝置之電極部〔或稱焊墊〕,經 由探測卡在測試設備與半導體裝置之間傳送訊號,然而測 試高頻之半導體裝置時,容易產生訊號干擾與串音 〔cross talk〕之問題。memory] and semiconductor radio frequency chips and other semiconductor devices. After completing the integrated circuit on the wafer, they need to be tested for electrical properties. The test equipment for testing semiconductor devices usually includes a probe card. ], And the probe card has a plurality of probes [prObe needle] 'to contact the electrode portion [or solder pad] of the semiconductor device, and the signal is transmitted between the test equipment and the semiconductor device via the probe card, In semiconductor devices, problems such as signal interference and cross talk tend to occur.

在美國專利案第6, 262, 586號「最佳探測模式之探測 方法」〔其在中華民國申請之公告號碼為337603〕中係提 供一種防止探針損害與偏移之探測方法,如第1圖所示, 其測試設備之基本架構係包含一測試機台34經由信號線33 連接至一測試頭32〔 test head〕,該測試頭32係可裝設 一探測卡31,當探測卡31接觸一晶圓,經由測試頭32與信 號線34可傳送電性資料至測試機台34,以分析判別晶圓上 晶片之好壞;如第2圖所示,在一晶圓41上製備複數個晶In U.S. Patent No. 6,262,586 "Detection method of the best detection mode" (its application number is 337603 in the Republic of China) is to provide a detection method to prevent probe damage and offset, such as No. 1 As shown in the figure, the basic structure of the test equipment includes a test machine 34 connected to a test head 32 via a signal line 33. The test head 32 can be equipped with a detection card 31. When the detection card 31 contacts A wafer can transmit electrical data to the test machine 34 through the test head 32 and the signal line 34 to analyze and judge the quality of the wafer on the wafer; as shown in FIG. 2, a plurality of wafers are prepared on a wafer 41 crystal

504788504788

五、發明說明(2) 片後’其曰日片之位置係以X轴〔1〜〕與y袖〔1〜11〕表 示’而探測卡31係具有四組探測端點〔如第2圖右侧之1、V. Description of the invention (2) After the film, "the position of the Japanese film is indicated by the X axis [1 ~] and y sleeve [1 ~ 11] ', and the detection card 31 has four sets of detection endpoints [as shown in Figure 2 Right of 1,

2、3及4〕,其係呈斜向4 5度排列,可同時測試四個晶 片,如第2圖右側晶圓上號碼1至丨9所示,其係連續地移動 探測卡31進行十九次探測,在第一次探測42a中,第一組 探測端點1係接觸座標(2,6 )之晶片,並電性測試四個晶 片’在第十九次探測42d中,重複接觸之晶片〔即被第2至 4組探測端點接觸之晶片〕係不電性測試,以縮短測試時 間,在每一次探測之過程中,每一組探测端點均接觸一晶 片’不接觸至晶圓之邊緣,可避免探針損害與偏移,但此 一習知之探測方法係仍不能解決高頻測試中訊號干擾與串 音之問題。 【發明目的及概要】 本發明之主要目的係在於提供一種適用於高頻測試之 探測方法,當一探測卡接觸晶圓時,被複數組探測端點所 丨二 測觸之晶片數量係小於在探測區域内之晶片數量,以適用 陰刹 於高頻測試。 本發明之次一目的係在於提供一種探測方法,當一探 測卡接觸晶圓時,被複數組探測端點所測觸之晶片數量係 小於在探測區域内之晶片數量,使得探測卡具有較大設計 _ 彈性與較不密集之電路分佈’以避免訊號干擾與串音問 題。 、 為達上述之目的,依本發明之探測方法,以一探測卡 連續性接觸一晶圓,該探測卡係具有與晶圓之晶片呈不對2, 3, and 4], which are arranged at an oblique 45 degrees, and can test four wafers at the same time. As shown by the numbers 1 to 9 on the right wafer in Figure 2, it continuously moves the detection card 31 for ten Nine probes. In the first probe 42a, the first set of probing endpoints 1 were the wafers with contact coordinates (2, 6), and the four wafers were electrically tested. In the nineteenth probe 42d, the contacts were repeated. Wafers [ie wafers that are touched by the 2nd to 4th group of detection endpoints] are non-electrical tests to shorten the test time. During each detection process, each group of detection endpoints is in contact with a wafer. The round edge can avoid probe damage and offset, but this conventional detection method still cannot solve the problems of signal interference and crosstalk in high frequency testing. [Objective and Summary of the Invention] The main object of the present invention is to provide a detection method suitable for high-frequency testing. When a detection card contacts a wafer, the number of wafers touched by the detection points of the complex array is less than The number of wafers in the detection area is suitable for high-frequency testing of female brakes. A second object of the present invention is to provide a detection method. When a detection card contacts a wafer, the number of wafers touched by the detection point of the complex array is less than the number of wafers in the detection area, so that the detection card has a larger size. Design_ Flexible and less dense circuit distribution 'to avoid signal interference and crosstalk issues. In order to achieve the above-mentioned object, according to the detection method of the present invention, a wafer is continuously contacted with a detection card, and the detection card has a mismatch with the wafer of the wafer.

第5頁 504788 五、發明說明(3)Page 5 504788 V. Description of the invention (3)

稱組數分佈之探測端點,該複數組探測端 測區域’如探測卡之多層陶兗電路板表面 探測端點係為間隔行或列或者交錯排列, 晶圓時,被複數組探測端點所測觸之晶片 測區域内之晶片數量,使得探測卡的電路 避免訊號干擾與串音而能適用於高頻測試 【發明詳細說明】 點係構成為一探 ’其中該複數組 故當探測卡接觸 數量係小於在探 分佈密度降低, 請參閱所附圖式,本發明將列舉以下夕杳^ / t r炙貫施例說明: 依本發明之一具體實施例,如第3圖所示,本發 探測方法係建構在一半導體之測試設備中,装日之 丹含有一測 試機台34,由信號線33接至一測試頭32〔test head〕, 測試頭32可裝設一探測卡20,用以在測試時電性^觸在’晶 圓上半導體裝置〔即晶片〕’在探測卡2 0下方係為一承座 10〔pedestal〕,用以固定支撐一晶圓1]L,該承座1〇係可 相對應於辦測卡2 0移動。 如第5圖所示,習知晶圓11係包含有複數個晶片,其 晶片數量依晶圓與晶片尺寸不同可由數十至數千,在本實 施例之圖例中,係以數十個晶片〔在X軸1〜8與y軸1〜8之範 圍内〕簡化表示,晶片之積體電路與焊墊係形成於晶圓i J 之正面,如第3圖所不’探測卡2 0係包含有多層印刷電路 板21,其結合至測試頭3 2,印刷電路板2 1係固設多層陶兗 電路板22,而該多層陶瓷電路板22之下表面〔朝向晶圓11 之表面〕具有複數組探測端點2 3 ’如凸塊、垂直探針 〔vertical needle〕或懸臂式探針〔cantileverIt is called the detection end point of the group number distribution. The detection end-point area of the complex array is the detection end point of the multilayer ceramic ceramic circuit board on the detection card. It is spaced rows or columns or staggered. The number of chips in the touched area of the tested chip makes the circuit of the probe card suitable for high-frequency testing to avoid signal interference and crosstalk. [Detailed description of the invention] The point system is configured as a probe, where the complex array is used as the probe card The number of contacts is less than the decrease in the distribution density of the probe. Please refer to the attached drawings. The present invention will list the following embodiments: / According to a specific embodiment of the present invention, as shown in FIG. The detection method is constructed in a semiconductor test equipment. The installation of the sun contains a test machine 34, which is connected to a test head 32 by a signal line 33, and a test card 20 can be installed on the test head 32. It is used to electrically contact the 'semiconductor device on a wafer [ie wafer]' during the test. It is a pedestal 10 [pedestal] under the probe card 20, which is used to fixedly support a wafer 1] L. Block 10 can correspond to office Card 20 moves. As shown in FIG. 5, the conventional wafer 11 includes a plurality of wafers, and the number of wafers may vary from tens to thousands depending on the size of the wafer and the wafer. In the illustration of this embodiment, tens of wafers (in X-axis 1 to 8 and y-axis 1 to 8] Simplified representation, the integrated circuit and pads of the wafer are formed on the front side of the wafer i J, as shown in Figure 3, the probe card 2 0 contains The multilayer printed circuit board 21 is bonded to the test head 32. The printed circuit board 21 is fixed with a multilayer ceramic circuit board 22. The lower surface of the multilayer ceramic circuit board 22 (the surface facing the wafer 11) has a complex array. Probe end 2 3 ′ such as bump, vertical needle or cantilever

第6頁 性檢測被緣數組探測端點2 3所測觸之晶片,如第5圖所 示’在本實施例中’需進行八次之移動與測試,在第一次 504788 五、發明說明(4) needle〕,如第4圖所示,每一組探測端點23係與其中一 晶片之電極部〔即焊墊或凸塊〕呈鏡像排列之分佈,並由 複數組探測端點23構成一探測區域A,該探測區域A係小於 該探測卡20之多層陶瓷電路板22用以結合探測端點23之表 面〔如第3圖所示〕,在本實施例中,該探測區域A在測試 時係最多可涵蓋十二個晶片,而探測區域A内係包含八組 探測端點2 3,其係呈間隔行或列之排列,可在一移動後之 探測過程中,測試不超過八個晶片。 依本發明之探測方法,首先以一測試設備之承座1 〇固 定支撐一待測晶圓11,之後,連續性移動該承座1 〇,每一 次移動係先水平面移動該承座1 〇後再上下升降移動,使探 測卡20接觸該晶圓11之部份晶片,當該探測卡2〇接觸晶圓 11時,被複數組探測端點23所測觸之晶片數量係小於在探 測區域A内所涵蓋之晶片數量,在每一次移動定位後,電 移動與測試中,探測區域A係涵蓋(1,〇至(3,4)之範圍, 共具有六個晶片被探測區域A涵蓋,而探測端點2 3僅接觸 其中相對應之部伤晶片,第一次測試所接觸之晶片τ 1係 四個、在第二次移動與測試中,探測區域A係涵蓋(2,〇 (4, 4)之範圍,共具有九個晶片被探測區域A涵蓋,而探 端點23僅接觸相對應之部份晶片,第二次測試所接觸之 =2係為六個;在=三次移動與測試中,探測區域a係沒 盘,1)至(7,4)之fe圍,共具有九個晶片被探測區域a泪Page 6 Sexual detection of the wafer touched by the edge array detection endpoint 2 3, as shown in Figure 5, 'in this embodiment' requires eight times of movement and testing, the first time 504788 5. Description of the invention (4) needle], as shown in Figure 4, each group of detection endpoints 23 is distributed in a mirror image with the electrode portion of one of the wafers (ie, pads or bumps), and the endpoints 23 are detected by a complex array A detection area A is formed. The detection area A is smaller than the multilayer ceramic circuit board 22 of the detection card 20 and is used to combine the surface of the detection terminal 23 (as shown in FIG. 3). In this embodiment, the detection area A During the test, it can cover a maximum of twelve wafers, and the detection area A contains eight groups of detection endpoints 23, which are arranged in spaced rows or columns. During the detection process after a movement, the test does not exceed Eight wafers. According to the detection method of the present invention, a wafer 10 to be tested is fixedly supported by a holder 10 of a test device, and then the holder 10 is continuously moved. Each movement is performed by horizontally moving the holder 10 Then it moves up and down to make the probe card 20 contact a part of the wafer 11. When the probe card 20 contacts the wafer 11, the number of wafers touched by the detection point 23 of the complex array is less than that in the detection area A. The number of wafers included in the area, after each movement and positioning, in the electric movement and test, the detection area A covers the range (1, 0 to (3, 4). There are a total of six wafers covered by the detection area A, and The detection endpoints 23 and 3 only contact the corresponding damaged wafers. The wafers τ 1 contacted in the first test are four. In the second movement and test, the detection area A covers (2, 0 (4, 4), a total of nine wafers are covered by the detection area A, and the probe end 23 only touches the corresponding part of the wafer. The second test contact = 2 is six; in = three movements and tests In the detection area a, there is no disk, and the area around 1) to (7,4) has a total of nine A wafer is detected tear region

,/88 五、發明說明(5) "" ' "" 〜— -, / 88 5. Invention Description (5) " " '" " ~ —-

蓋’而探測端點23僅接觸其中相對應之部份晶片,第三次 7式所接觸之晶片T 3係為六個;在第四次移動與測試中, 探測區域A係涵蓋(6, 1)至(8, 4)之範圍,共具有六個晶片 被探測區域A涵蓋,而探測端點2 3僅接觸其中相對應之晶 片’第四次測試所接觸之晶片T4係為四個;以下類推,進 行第五次測試〔其接觸之晶片以Τ5表示〕、第六次測試 、〔其接觸之晶片以Τ6表示〕、第七次測試〔其接觸之晶片 以Τ7表示〕及第八次測試〔其接觸之晶片以Τ8表示〕,以 完成在晶圓11上全部晶片之測試。在上述之探測方法中, 晶圓11上之每一晶片均只有被接觸一次,不會有重覆接觸 之情況’故不需要有特別的測試辨識程式,並且,由於探 測^域Α内探測端點23之組數係小於探測區域a涵蓋之晶片 數量’故探測卡20具有較大設計彈性並可供設計較不密集 之電路分佈’以避免訊號干擾與串音問題,使得本發明之 探測方法特;別適用於高頻測試。 複數組探測端點2 3除了可呈間隔行或列之排列之外,The detection terminal 23 only touches the corresponding part of the chip, and the number T 3 of the third type 7 contacts is six. In the fourth movement and test, the detection area A covers (6, 1) to (8, 4), a total of six wafers are covered by the detection area A, and the detection end point 23 is only in contact with the corresponding wafer '; the wafer T4 contacted by the fourth test is four; The following analogy is performed for the fifth test [wafers in contact with T5], the sixth test, [wafers in contact with T6], the seventh test [wafers in contact with T7], and the eighth The test [the contact wafer is represented by T8] to complete the test of all wafers on the wafer 11. In the above detection method, each wafer on the wafer 11 is only touched once, and there is no repeated contact. Therefore, there is no need for a special test identification program, and because the detection terminal in the detection area A The number of points 23 is smaller than the number of chips covered by the detection area a. Therefore, the detection card 20 has greater design flexibility and can be used to design less dense circuit distributions to avoid signal interference and crosstalk problems, making the detection method of the present invention Special; Do not apply to high frequency testing. In addition to the detection points 2 and 3 of the complex array, in addition to being arranged in spaced rows or columns,

在本發明之另一實施例中,如第6圖所示,在探測區域A i 之複數組探測端點23係呈交錯排列,使得被複數組探測端 點23所測觸之晶片數量係小於在探測區域“内之晶片數 量。 、故本發明之保護範圍視後附之申請專利範圍所界定者 為準’任何熟知此項技藝者,在不脫離本發明之精神和範 圍内所作之任何變化與修改,均屬於本發明之保護範園。In another embodiment of the present invention, as shown in FIG. 6, the plurality of array detection endpoints 23 in the detection area A i are staggered, so that the number of wafers touched by the plurality of array detection endpoints 23 is less than The number of wafers in the detection area. Therefore, the scope of protection of the present invention is determined by the scope of the appended patent application. 'Any person skilled in the art will make any changes without departing from the spirit and scope of the present invention. And modifications belong to the protection domain of the present invention.

第8頁 504788 圖式簡單說明 【圖式說明】 第1圖:在美國專利案第6, 262, 58 6號「最佳探測模式之 探測方法」,一探測卡之相對關係方塊圖; 第2圖··在美國專利案第6, 262, 58 6號「最佳探測模式之 探測方法」,檢測區域之狀態示意圖; 第3圖:依本發明之一具體實施例,晶圓測試設備之截面 圖; 第4圖:依本發明之一具體實施例,探測卡之探測區域示 意圖, 第5 圖:依本發明之一具體實施例,以該探測卡探測一晶 圓之示意圖;及 第6圖:依本發明之另一具體實施例,另一探測卡之探測 區域示意圖。 1 第一組探測端點 2 第二組探測端點 3 第三組探測端點 4 第四組探測端點 10 承座 11 晶圓 1 ,一 ::· 八ί 20 探測卡 1 i: ί:,、 21 印刷電路板 22 多層陶瓷電路板 23 探測端點 丨 • 31 探測卡 32 測試頭 33 信號線 34 測試機台 41 晶圓 42a第一次探測 42d第十九次探測 【圖號說明】Page 504788 Brief description of the drawings [Illustration of the drawings] Figure 1: In the US Patent No. 6, 262, 58 6 "detection method of the best detection mode", a block diagram of the relative relationship of a detection card; Figure ·· Schematic diagram of the state of the detection area in US Patent No. 6,262, 586 "Detection method of the best detection mode"; Figure 3: Cross-section of wafer test equipment according to a specific embodiment of the present invention Figure 4: A schematic diagram of a detection area of a probe card according to a specific embodiment of the present invention, Figure 5: A schematic diagram of a wafer detected by the probe card according to a specific embodiment of the present invention; and Figure 6 : According to another embodiment of the present invention, a schematic diagram of a detection area of another detection card. 1 The first group of probing endpoints 2 The second group of probing endpoints 3 The third group of probing endpoints 4 The fourth group of probing endpoints 10 Socket 11 Wafer 1, one :: eight Eight probe cards 1 i: ί: , 21 Printed circuit board 22 Multi-layer ceramic circuit board 23 Detection endpoint 丨 31 Probe card 32 Test head 33 Signal line 34 Test machine 41 Wafer 42a First detection 42d Nineteenth detection [Illustration of drawing number]

第9頁 504788 圖式簡單說明 A 探測區域 A1 探測區域 T1 第一次測試晶片 T2 第二次測試晶片 T3 第三次測試晶片 T4 第四次測試晶片 T5 第五次測試晶片 T6 第六次測試晶片 T7 第七次測試晶片 T8 第八次測試晶片Page 504788 Simple description of A detection area A1 detection area T1 first test wafer T2 second test wafer T3 third test wafer T4 fourth test wafer T5 fifth test wafer T6 sixth test wafer T7 Seventh test wafer T8 Eighth test wafer

第ίο頁Page ίο

Claims (1)

MM788MM788 六、申請專利範圍 【申請專利範圍】 1、一種探測方法,其係以探測卡測試在一晶圓之複數個 半導體晶片,其步驟包含有·· 以一測試設備之承座固疋支樓该晶圓’該承座係可相 對應於探測卡移動; 連續性移動該承座,在每一次移動後係使探測卡接觸 該晶圓之部份晶片,其中該探測卡具有複數組探測端點 而構成一探測區域,每一組探測端點之分佈係與一晶片 之電極部呈鏡像排列,當該探測卡接觸晶圓時,被複數 組探測端點所測觸之晶片數量係小於在探測區域内之晶 片數量;及 在母一次移動定位後’電性檢測被複數組探測端點所 測觸之晶片。 2、如申請專利範圍第1項中所述之探測方法,其中該探 測卡之钱數組探測端點係呈間隔行或列之挑别。、°6. Scope of patent application [Scope of patent application] 1. A detection method, which uses a probe card to test a plurality of semiconductor wafers on a wafer. The steps include ... Wafer 'The holder can move corresponding to the probe card; moving the holder continuously, after each movement, the probe card contacts a part of the wafer of the wafer, wherein the probe card has a plurality of array detection endpoints A detection area is formed. The distribution of each set of detection endpoints is mirror-imaged with the electrode portion of a wafer. When the detection card contacts the wafer, the number of wafers touched by the detection points of the complex array is less than that in the detection. The number of wafers in the area; and 'electrically detect the wafers touched by the detection points of the complex array after the mother has moved and positioned. 2. The detection method as described in item 1 of the scope of patent application, wherein the detection end points of the money array of the detection card are sorted at intervals of rows or columns. , ° 法,其中由複 ,以結合探測端點。 中所述之探測方法,戈 504788 六、申請專利範圍 數組探測端點所構成之探測區域係小於該探測卡之多層 陶瓷電路板用以結合探測端點之表面。 ϋ 第12頁Method, which consists of complex to combine detection of endpoints. The detection method described in the above, 504788 VI. Patent application scope The detection area formed by the array detection endpoints is smaller than the multilayer ceramic circuit board of the detection card used to combine the surface of the detection endpoints. ϋ Page 12
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI705255B (en) * 2019-09-20 2020-09-21 中華精測科技股份有限公司 Testing device for testing chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI705255B (en) * 2019-09-20 2020-09-21 中華精測科技股份有限公司 Testing device for testing chip

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