TW463166B - Logic circuit - Google Patents
Logic circuit Download PDFInfo
- Publication number
- TW463166B TW463166B TW089103242A TW89103242A TW463166B TW 463166 B TW463166 B TW 463166B TW 089103242 A TW089103242 A TW 089103242A TW 89103242 A TW89103242 A TW 89103242A TW 463166 B TW463166 B TW 463166B
- Authority
- TW
- Taiwan
- Prior art keywords
- logic
- switching device
- potential
- node
- control
- Prior art date
Links
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- PCTMTFRHKVHKIS-BMFZQQSSSA-N (1s,3r,4e,6e,8e,10e,12e,14e,16e,18s,19r,20r,21s,25r,27r,30r,31r,33s,35r,37s,38r)-3-[(2r,3s,4s,5s,6r)-4-amino-3,5-dihydroxy-6-methyloxan-2-yl]oxy-19,25,27,30,31,33,35,37-octahydroxy-18,20,21-trimethyl-23-oxo-22,39-dioxabicyclo[33.3.1]nonatriaconta-4,6,8,10 Chemical compound C1C=C2C[C@@H](OS(O)(=O)=O)CC[C@]2(C)[C@@H]2[C@@H]1[C@@H]1CC[C@H]([C@H](C)CCCC(C)C)[C@@]1(C)CC2.O[C@H]1[C@@H](N)[C@H](O)[C@@H](C)O[C@H]1O[C@H]1/C=C/C=C/C=C/C=C/C=C/C=C/C=C/[C@H](C)[C@@H](O)[C@@H](C)[C@H](C)OC(=O)C[C@H](O)C[C@H](O)CC[C@@H](O)[C@H](O)C[C@H](O)C[C@](O)(C[C@H](O)[C@H]2C(O)=O)O[C@H]2C1 PCTMTFRHKVHKIS-BMFZQQSSSA-N 0.000 claims 3
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
- H03K3/35613—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
- H03K3/356139—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration with synchronous operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
- H03K3/356147—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
- H03K3/356156—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates with synchronous operation
Landscapes
- Logic Circuits (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP36566499A JP2001186009A (ja) | 1999-12-22 | 1999-12-22 | 論理回路 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW463166B true TW463166B (en) | 2001-11-11 |
Family
ID=18484821
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW089103242A TW463166B (en) | 1999-12-22 | 2000-02-24 | Logic circuit |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6374393B1 (https=) |
| EP (1) | EP1111615A1 (https=) |
| JP (1) | JP2001186009A (https=) |
| KR (1) | KR100613738B1 (https=) |
| CN (1) | CN1175421C (https=) |
| TW (1) | TW463166B (https=) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10022263A1 (de) * | 2000-05-08 | 2001-11-22 | Infineon Technologies Ag | Speicher-Leseverstärker |
| US6557149B2 (en) * | 2001-04-04 | 2003-04-29 | Intel Corporation | Algorithm for finding vectors to stimulate all paths and arcs through an LVS gate |
| DE10217375B4 (de) * | 2002-04-18 | 2006-08-24 | Infineon Technologies Ag | Schaltungsanordnung und Verfahren zur Erzeugung eines Dual-Rail-Signals |
| US6886152B1 (en) * | 2002-08-09 | 2005-04-26 | Xilinx, Inc. | Delay optimization in signal routing |
| AU2003257119A1 (en) * | 2002-08-23 | 2004-03-11 | Sun Microsystems, Inc. | Clocked full-rail differential logic with sense amplifier and shut-off |
| DE102004037591A1 (de) * | 2004-08-03 | 2006-03-16 | Infineon Technologies Ag | Dual-Rail Precharged Flip-Flop |
| US7131092B2 (en) * | 2004-12-21 | 2006-10-31 | Via Technologies, Inc. | Clock gating circuit |
| JP4859370B2 (ja) * | 2005-01-19 | 2012-01-25 | 三菱電機株式会社 | 電子素子 |
| US7302659B2 (en) * | 2005-02-10 | 2007-11-27 | International Business Machines Corporation | System and method for unfolding/replicating logic paths to facilitate propagation delay modeling |
| US7447620B2 (en) * | 2006-02-23 | 2008-11-04 | International Business Machines Corporation | Modeling asynchronous behavior from primary inputs and latches |
| US7437584B2 (en) * | 2006-02-27 | 2008-10-14 | Atmel Corporation | Apparatus and method for reducing power consumption in electronic devices |
| US7490305B2 (en) * | 2006-07-17 | 2009-02-10 | International Business Machines Corporation | Method for driving values to DC adjusted/untimed nets to identify timing problems |
| US7882473B2 (en) * | 2007-11-27 | 2011-02-01 | International Business Machines Corporation | Sequential equivalence checking for asynchronous verification |
| US20090167395A1 (en) * | 2007-12-31 | 2009-07-02 | Texas Instruments Incorporated | High performance latches |
| US7861200B2 (en) * | 2008-03-24 | 2010-12-28 | Freescale Semiconductor, Inc. | Setup and hold time characterization device and method |
| US8122410B2 (en) * | 2008-11-05 | 2012-02-21 | International Business Machines Corporation | Specifying and validating untimed nets |
| US20110016367A1 (en) * | 2009-07-14 | 2011-01-20 | Bo Tang | Skew tolerant scannable master/slave flip-flop including embedded logic |
| KR20110105153A (ko) * | 2010-03-18 | 2011-09-26 | 삼성전자주식회사 | 플립플롭 회로 및 스캔 플립 플롭 회로 |
| US8975949B2 (en) * | 2013-03-14 | 2015-03-10 | Samsung Electronics Co., Ltd. | Integrated clock gater (ICG) using clock cascode complimentary switch logic |
| US9256245B2 (en) * | 2014-04-02 | 2016-02-09 | Mediatek Inc. | Clock tree circuit and memory controller |
| KR20160005535A (ko) * | 2014-07-07 | 2016-01-15 | 에스케이하이닉스 주식회사 | 반도체 장치의 리시버 회로 |
| TWI705666B (zh) * | 2015-06-15 | 2020-09-21 | 日商新力股份有限公司 | 傳送裝置、接收裝置、通信系統 |
| US11658656B2 (en) | 2020-11-26 | 2023-05-23 | Samsung Electronics Co., Ltd. | Low power clock gating cell and an integrated circuit including the same |
| KR20220143272A (ko) | 2021-04-16 | 2022-10-25 | 삼성전자주식회사 | 직렬 스택 구조의 트랜지스터들을 포함하는 플립 플롭 |
| TW202533531A (zh) * | 2023-12-27 | 2025-08-16 | 日商索尼半導體解決方案公司 | 邏輯運算電路 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6002270A (en) * | 1995-11-09 | 1999-12-14 | Spaceborne, Inc. | Synchronous differential logic system for hyperfrequency operation |
| JPH10269774A (ja) * | 1997-03-26 | 1998-10-09 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| KR100434965B1 (ko) * | 1997-12-29 | 2004-07-16 | 주식회사 하이닉스반도체 | 센스앰프 구동장치 |
-
1999
- 1999-12-22 JP JP36566499A patent/JP2001186009A/ja not_active Abandoned
-
2000
- 2000-02-24 TW TW089103242A patent/TW463166B/zh not_active IP Right Cessation
- 2000-02-28 US US09/514,256 patent/US6374393B1/en not_active Expired - Fee Related
- 2000-02-29 KR KR1020000010243A patent/KR100613738B1/ko not_active Expired - Fee Related
- 2000-02-29 CN CNB001083511A patent/CN1175421C/zh not_active Expired - Fee Related
- 2000-02-29 EP EP00400539A patent/EP1111615A1/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| US6374393B1 (en) | 2002-04-16 |
| KR100613738B1 (ko) | 2006-08-22 |
| CN1175421C (zh) | 2004-11-10 |
| JP2001186009A (ja) | 2001-07-06 |
| CN1301023A (zh) | 2001-06-27 |
| EP1111615A1 (en) | 2001-06-27 |
| KR20010082496A (ko) | 2001-08-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GD4A | Issue of patent certificate for granted invention patent | ||
| MM4A | Annulment or lapse of patent due to non-payment of fees |