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Application filed by Vanguard Int Semiconduct CorpfiledCriticalVanguard Int Semiconduct Corp
Priority to TW085115188ApriorityCriticalpatent/TW344113B/en
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A method for producing a polysilicon structure of integrated circuit, which comprises: forming a first dielectric layer on a semiconductor wafer; planarizing the first dielectric layer; using a photolithography technique and an etching technique to etch the first dielectric layer to expose the semiconductor wafer thereby forming holes; forming a layer of doped polysilicon; using a photolithography technique and an etching technique to etch the doped polysilicon thereby forming a doped polysilicon pattern; forming dot-like undoped silicon particles; and etching the undoped silicon particles and doped polysilicon pattern by a plasma etching technique using SFx as a reactive gas thereby forming trenches on the surface of the doped polysilicon pattern.