TW339473B - Electronic package with multilevel connections - Google Patents
Electronic package with multilevel connectionsInfo
- Publication number
- TW339473B TW339473B TW084100344A TW84100344A TW339473B TW 339473 B TW339473 B TW 339473B TW 084100344 A TW084100344 A TW 084100344A TW 84100344 A TW84100344 A TW 84100344A TW 339473 B TW339473 B TW 339473B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- circuit design
- contact point
- circuit
- provision
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 4
- 239000012774 insulation material Substances 0.000 abstract 3
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/141—Disposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/233,193 US5712192A (en) | 1994-04-26 | 1994-04-26 | Process for connecting an electrical device to a circuit substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
TW339473B true TW339473B (en) | 1998-09-01 |
Family
ID=22876273
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW084100344A TW339473B (en) | 1994-04-26 | 1995-01-16 | Electronic package with multilevel connections |
Country Status (7)
Country | Link |
---|---|
US (2) | US5712192A (zh) |
EP (1) | EP0683513A1 (zh) |
JP (1) | JP2862126B2 (zh) |
KR (1) | KR100187867B1 (zh) |
CN (1) | CN1079582C (zh) |
MY (1) | MY116347A (zh) |
TW (1) | TW339473B (zh) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6471115B1 (en) | 1990-02-19 | 2002-10-29 | Hitachi, Ltd. | Process for manufacturing electronic circuit devices |
US6227436B1 (en) | 1990-02-19 | 2001-05-08 | Hitachi, Ltd. | Method of fabricating an electronic circuit device and apparatus for performing the method |
US5904499A (en) * | 1994-12-22 | 1999-05-18 | Pace; Benedict G | Package for power semiconductor chips |
US6614110B1 (en) | 1994-12-22 | 2003-09-02 | Benedict G Pace | Module with bumps for connection and support |
WO1996037913A1 (en) * | 1995-05-22 | 1996-11-28 | Hitachi Chemical Company, Ltd. | Semiconductor device having a semiconductor chip electrically connected to a wiring substrate |
JPH1070153A (ja) * | 1996-08-26 | 1998-03-10 | Hitachi Ltd | 電子部品の接続方法 |
US6093971A (en) * | 1996-10-14 | 2000-07-25 | Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. | Chip module with conductor paths on the chip bonding side of a chip carrier |
US5942805A (en) * | 1996-12-20 | 1999-08-24 | Intel Corporation | Fiducial for aligning an integrated circuit die |
US5858254A (en) * | 1997-01-28 | 1999-01-12 | International Business Machines Corporation | Multilayered circuitized substrate and method of fabrication |
US6040618A (en) * | 1997-03-06 | 2000-03-21 | Micron Technology, Inc. | Multi-chip module employing a carrier substrate with micromachined alignment structures and method of forming |
KR100298205B1 (ko) * | 1998-05-21 | 2001-08-07 | 오길록 | 고집적삼색발광소자및그제조방법 |
US6055723A (en) * | 1998-06-01 | 2000-05-02 | Trw Inc. | Process of fabricating high frequency connections to high temperature superconductor circuits |
US6965165B2 (en) * | 1998-12-21 | 2005-11-15 | Mou-Shiung Lin | Top layers of metal for high performance IC's |
TW556329B (en) * | 1999-02-26 | 2003-10-01 | Hitachi Ltd | Wiring board, its production method, semiconductor device and its production method |
US6544902B1 (en) * | 1999-02-26 | 2003-04-08 | Micron Technology, Inc. | Energy beam patterning of protective layers for semiconductor devices |
JP2000312075A (ja) * | 1999-04-27 | 2000-11-07 | Nec Corp | プリント配線板への接続方法および構造 |
US7003641B2 (en) * | 2000-01-31 | 2006-02-21 | Commvault Systems, Inc. | Logical view with granular access to exchange data managed by a modular data and storage management system |
US6734570B1 (en) | 2003-01-24 | 2004-05-11 | Gennum Corporation | Solder bumped substrate for a fine pitch flip-chip integrated circuit package |
US20050133933A1 (en) * | 2003-12-19 | 2005-06-23 | Advanpack Solutions Pte. Ltd. | Various structure/height bumps for wafer level-chip scale package |
CN1560911B (zh) * | 2004-02-23 | 2010-05-12 | 威盛电子股份有限公司 | 电路载板的制造方法 |
JP2006019361A (ja) * | 2004-06-30 | 2006-01-19 | Sanyo Electric Co Ltd | 回路装置およびその製造方法 |
KR100688514B1 (ko) * | 2005-01-05 | 2007-03-02 | 삼성전자주식회사 | 다른 종류의 mcp를 탑재한 메모리 모듈 |
TWI292614B (en) * | 2006-01-20 | 2008-01-11 | Advanced Semiconductor Eng | Flip chip on leadframe package and method of making the same |
JP5483085B2 (ja) * | 2010-02-19 | 2014-05-07 | 株式会社オートネットワーク技術研究所 | 回路構成体及び電気接続箱 |
CN102315580B (zh) * | 2010-06-30 | 2013-09-18 | 欣兴电子股份有限公司 | 制作连接器的方法 |
US20120273937A1 (en) * | 2011-04-30 | 2012-11-01 | Stats Chippac, Ltd. | Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer |
US9252094B2 (en) * | 2011-04-30 | 2016-02-02 | Stats Chippac, Ltd. | Semiconductor device and method of forming an interconnect structure with conductive material recessed within conductive ring over surface of conductive pillar |
CN114365584A (zh) * | 2020-06-29 | 2022-04-15 | 庆鼎精密电子(淮安)有限公司 | 线路板及其制作方法 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3484933A (en) * | 1967-05-04 | 1969-12-23 | North American Rockwell | Face bonding technique |
US3997963A (en) * | 1973-06-29 | 1976-12-21 | Ibm Corporation | Novel beam-lead integrated circuit structure and method for making the same including automatic registration of beam-leads with corresponding dielectric substrate leads |
US4289846A (en) * | 1979-12-28 | 1981-09-15 | General Electric Company | Process for forming low-reactance interconnections on semiconductors |
US4430365A (en) * | 1982-07-22 | 1984-02-07 | International Business Machines Corporation | Method for forming conductive lines and vias |
US4949224A (en) * | 1985-09-20 | 1990-08-14 | Sharp Kabushiki Kaisha | Structure for mounting a semiconductor device |
US4774630A (en) * | 1985-09-30 | 1988-09-27 | Microelectronics Center Of North Carolina | Apparatus for mounting a semiconductor chip and making electrical connections thereto |
US4667404A (en) * | 1985-09-30 | 1987-05-26 | Microelectronics Center Of North Carolina | Method of interconnecting wiring planes |
JPS62169459A (ja) * | 1986-01-22 | 1987-07-25 | Hitachi Ltd | 半導体装置 |
US4835593A (en) * | 1986-05-07 | 1989-05-30 | International Business Machines Corporation | Multilayer thin film metallurgy for pin brazing |
US4801067A (en) * | 1986-08-29 | 1989-01-31 | Ngk Spark Plug Co., Ltd. | Method of connecting metal conductor to ceramic substrate |
JPS6366993A (ja) * | 1986-09-08 | 1988-03-25 | 日本電気株式会社 | 多層配線基板 |
US4945399A (en) * | 1986-09-30 | 1990-07-31 | International Business Machines Corporation | Electronic package with integrated distributed decoupling capacitors |
IL82113A (en) * | 1987-04-05 | 1992-08-18 | Zvi Orbach | Fabrication of customized integrated circuits |
US4805683A (en) * | 1988-03-04 | 1989-02-21 | International Business Machines Corporation | Method for producing a plurality of layers of metallurgy |
US4983250A (en) * | 1989-06-16 | 1991-01-08 | Microelectronics And Computer Technology | Method of laser patterning an electrical interconnect |
AU645283B2 (en) * | 1990-01-23 | 1994-01-13 | Sumitomo Electric Industries, Ltd. | Substrate for packaging a semiconductor device |
DE4101042C1 (en) * | 1991-01-16 | 1992-02-20 | Messerschmitt-Boelkow-Blohm Gmbh, 8012 Ottobrunn, De | Contact and encapsulation of micro-circuits using solder laser - and laser transparent contact film segments with conductor sheets of solderable material, geometrically associated with solder protuberances |
US5173763A (en) * | 1991-02-11 | 1992-12-22 | International Business Machines Corporation | Electronic packaging with varying height connectors |
US5534442A (en) * | 1991-05-10 | 1996-07-09 | Northern Telecom Limited | Process of providing uniform photoresist thickness on an opto-electronic device |
JPH0637143A (ja) * | 1992-07-15 | 1994-02-10 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
US5401687A (en) * | 1993-04-15 | 1995-03-28 | Martin Marietta Corporation | Process for high density interconnection of substrates and integrated circuit chips containing sensitive structures |
-
1994
- 1994-04-26 US US08/233,193 patent/US5712192A/en not_active Expired - Fee Related
-
1995
- 1995-01-16 TW TW084100344A patent/TW339473B/zh active
- 1995-03-07 EP EP95103214A patent/EP0683513A1/en not_active Withdrawn
- 1995-03-28 JP JP7070241A patent/JP2862126B2/ja not_active Expired - Fee Related
- 1995-04-04 MY MYPI95000855A patent/MY116347A/en unknown
- 1995-04-07 CN CN95104003A patent/CN1079582C/zh not_active Expired - Fee Related
- 1995-04-25 KR KR1019950009705A patent/KR100187867B1/ko not_active IP Right Cessation
-
1996
- 1996-01-11 US US08/584,757 patent/US5612573A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH07297321A (ja) | 1995-11-10 |
US5712192A (en) | 1998-01-27 |
CN1119342A (zh) | 1996-03-27 |
KR100187867B1 (ko) | 1999-06-01 |
MY116347A (en) | 2004-01-31 |
JP2862126B2 (ja) | 1999-02-24 |
CN1079582C (zh) | 2002-02-20 |
EP0683513A1 (en) | 1995-11-22 |
US5612573A (en) | 1997-03-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW339473B (en) | Electronic package with multilevel connections | |
TW337030B (en) | Multi-stage buried wiring structure and the manufacturing method for Ics | |
TW338185B (en) | Multi-electronic device package | |
TW358992B (en) | Semiconductor device and method of fabricating the same | |
EP0952762A4 (en) | PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD | |
HK1029662A1 (en) | Semiconductor device and method for manufacturing the same circuit substrate and electronic device. | |
TW337035B (en) | Semiconductor device and method of manufacturing the same | |
TW243584B (en) | Apparatus having inner layers supporting surface-mount components and a method of manufacturing the same | |
AU4322097A (en) | Semiconductor device, method for manufacturing the same, circuit board, and flexible substrate | |
TW332962B (en) | The manufacture and package of semiconductor device | |
SG49343A1 (en) | Semiconductor and a method for manufacturing an oxide film on the surface of a semiconductor substrate | |
TW373256B (en) | A semiconductor device having discontinuous insulating regions and the manufacturing method thereof | |
HK1020391A1 (en) | Semiconductor device, film carrier tape, and method for manufacturing them. | |
AU5844698A (en) | Semiconductor substrate having compound semiconductor layer, process for its production, and electronic device fabricated on semiconductor substrate | |
EP0362161A3 (en) | Method of manufacturing a substrate for microwave integrated circuits | |
KR970006534B1 (en) | Semiconductor integrated circuit package and its manufacture and its mounting method | |
TW344098B (en) | Semiconductor integrated circuit device and process for making the same | |
TW344125B (en) | Semiconductor device and its manufacture | |
TW328172B (en) | Ferroelectric device for use in integrated circuits and method of making the same | |
ZA965179B (en) | Method and installation for measuring the thickness of a non-ferromagnetic conductive layer on a ferromagnetic conductive substrate. | |
EP0149317A3 (en) | Circuit packaging | |
TW337590B (en) | Manufacture of semiconductor device having reliable and fine connection hole | |
HK1020394A1 (en) | Substrate for semiconductor device, semiconductor device and method for manufacturing the same, circuit board, and electronic equipment | |
MY123345A (en) | Semiconductor device, its fabrication method and electronic device | |
TW356587B (en) | Semiconductor device having interlayer insulator and the method for fabricating thereof |