TW202303912A - 具有整體熱散播器之電子封裝 - Google Patents

具有整體熱散播器之電子封裝 Download PDF

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TW202303912A
TW202303912A TW111111188A TW111111188A TW202303912A TW 202303912 A TW202303912 A TW 202303912A TW 111111188 A TW111111188 A TW 111111188A TW 111111188 A TW111111188 A TW 111111188A TW 202303912 A TW202303912 A TW 202303912A
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Taiwan
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gan
substrate
semiconductor die
electronic device
electronic
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TW111111188A
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English (en)
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查爾斯 拜利
喬治 朱
丹尼爾 Ｍ 金策
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愛爾蘭商納維達斯半導體有限公司
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Publication of TW202303912A publication Critical patent/TW202303912A/zh

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Abstract

一種電子裝置包括一基板及形成於電耦接至該基板之一第一半導體晶粒上的一第一氮化鎵（GaN）電晶體。一第二GaN電晶體形成於一第二半導體晶粒上且亦電耦接至該基板。一整體熱散播器熱耦接至該第一及該第二氮化鎵半導體晶粒且電耦接至該基板。一第一偏壓電壓經由該整體熱散播器施加至該第一GaN電晶體，並且一第二偏壓電壓經由該整體熱散播器施加至該第二GaN電晶體。

Description

具有整體熱散播器之電子封裝
本申請案係關於電子裝置，且更特定言之，係關於包括氮化鎵之電子裝置。
當前有廣泛多種電子裝置可以彼此配合使用，以形成一或多個電路以供用於功率管理。為了提高該等電子裝置之效能，通常將其附接至一或多個散熱片。然而，在可採用電偏壓半導體基板之諸如氮化鎵之電子裝置的情況下，習知散熱片技術及電子封裝架構不能既對半導體基板施加電偏壓，同時又提供有效散熱。
氮化鎵半導體裝置需要新電子封裝架構及整合散熱片。
本揭示案之一些實施例係關於用於氮化鎵基半導體裝置之電子封裝。一些實施例係關於能夠實現低熱阻以及將一電壓偏壓施加至該氮化鎵基半導體裝置之半導體基板之能力的電子封裝。其他實施例可使得多個氮化鎵半導體裝置能夠被共同封裝，從而形成一電源電路之一或多個相。
在一些實施例中，一電子裝置包含一基板且包括形成於一第一半導體晶粒上且電耦接至該基板之一第一氮化鎵（GaN）基電晶體。一第二GaN基電晶體形成於一第二半導體晶粒上且電耦接至該基板。一整體熱散播器熱耦接至該第一及該第二半導體晶粒。在各種實施例中，該整體熱散播器包括包夾於一底部金屬層及一頂部金屬層之間的一含陶瓷層。在一些實施例中，該整體熱散播器包括包夾於一底部金屬層及一頂部金屬層之間的一陶瓷層，底部銅層包括電耦接至該第一半導體晶粒之一第一部分及電耦接至該第二半導體晶粒之一第二部分，並且其中該第一部分與該第二部分電隔離。
在一些實施例中，該基板電耦接至該第一部分且將一第一偏壓電壓供應至該第一半導體晶粒，並且其中該基板電耦接至該第二部分且將一第二偏壓電壓供應至該第二半導體晶粒。在各種實施例中，該第一半導體晶粒定位在附接至該基板之一第一中間電子封裝內，並且其中該第二半導體晶粒定位在附接至該基板之一第二中間電子封裝內。在一些實施例中，該第一半導體晶粒包括與一背側相對之一主動裝置側，並且其中該主動裝置側面向該基板且該背側面向該整體熱散播器。
在一些實施例中，該背側附接至位於該第一中間電子封裝之一頂部表面處的一引線框槳葉。在一些實施例中，該第一中間電子封裝包括一控制裝置，該控制裝置包括耦接至該第一GaN基電晶體之一閘極驅動器電路。在一些實施例中，該控制裝置係形成於一矽基半導體晶粒上之一電路。在各種實施例中，該電子裝置進一步包含一隔離器裝置，該隔離器裝置耦接至該基板且經配置以隔離控制該第一及該第二GaN基電晶體之操作的控制信號。
在一些實施例中，該第一GaN基電晶體係一高側電晶體且該第二GaN基電晶體係一低側電晶體，並且其中該第一GaN基電晶體與該第二GaN基電晶體串聯耦接以形成一單相半橋電路。在各種實施例中，該電子裝置進一步包含形成於一第三半導體晶粒上且電耦接至該基板之一第三GaN基電晶體，以及形成於一第四半導體晶粒上且電耦接至該基板之一第四GaN基電晶體。在一些實施例中，該第一GaN基電晶體及該第二GaN基電晶體形成一電源電路之一第一相，並且其中該第三GaN基電晶體及該第四GaN基電晶體形成一電源電路之一第二相。
在一些實施例中，該基板、該第一半導體晶粒、該第二半導體晶粒及該整體熱散播器定位在形成於一電子封裝中之一空腔內且藉由一填充材料密封在該空腔內，並且其中該電子封裝包括經配置以耦接至一電路板之一或多個引腳。在各種實施例中，該電子裝置進一步包含自該基板延伸且囊封該第一半導體晶粒、該第二半導體晶粒及該整體熱散播器之至少一部分的一模製化合物。在一些實施例中，該整體熱散播器之一部分形成該電子裝置的一頂部表面之一部分且經配置以耦接至一散熱片。在各種實施例中，該基板係一多層印刷電路板。
在一些實施例中，一種形成一電子封裝之方法包含將一或多個GaN基半導體晶粒耦接至一基板，以及將一整體散熱片附接至該一或多個GaN基半導體晶粒且將該整體散熱片電耦接至該基板。囊封該一或多個GaN基半導體晶粒及該整體散熱片之至少一部分。在各種實施例中，該方法進一步包含經由該整體散熱片將一電偏壓施加至該一或多個GaN基半導體晶粒。在一些實施例中，該方法進一步包含將該一或多個GaN基半導體晶粒整合至一或多個各別中間電子封裝中。
與習知技術相比，藉助於本發明達成了許多益處。舉例而言，本發明之實施例提供了將多個氮化鎵基半導體裝置共同封裝在單個電子封裝中的能力，該電子封裝亦可將單獨電壓偏壓施加至每一半導體裝置之基板。在封裝內使用整體熱散播器可使得降低功率密度，因此熱量可經由熱介面材料有效地傳送至散熱片或冷板。半導體晶粒在單個電子封裝內之緊密鄰近使得能夠提高切換速度及電路穩定性，同時整體熱散播器減輕了由於複數個氮化鎵裝置之緊密鄰近而增加的功率密度之負面熱影響。總體而言，可在更小空間內形成更高效能之電路，同時保持在安全操作溫度內對裝置進行有效操作之能力。
結合下文及附圖更詳細地描述本發明之此等及其他實施例連同其許多優點及特徵。為了更好地理解本揭示案之本質及優點，應參考以下描述及附圖。然而，應理解，提供圖式中之每一者僅係出於說明之目的且並未意欲作為本揭示案的範疇之限制的定義。此外，一般情況下，且除非與描述（其中不同圖式中之元件使用相同附圖標記）明顯相反，否則元件在功能或目的上通常為相同的或至少類似的。
本申請案主張於2021年3月24日申請之題為「ELECTRONIC PACKAGES WITH TOP SIDE COOLING」的美國臨時專利申請案第63/165,529號之優先權，該美國臨時專利申請案出於所有目的以全文引用之方式併入本文中。
本文揭示之技術大體上係關於包括一或多個氮化鎵功率電晶體之電子封裝。更具體言之，本文揭示之技術係關於能夠對包括具有電偏壓基板的氮化鎵功率電晶體之電子封裝實現有效冷卻的電子封裝。本文描述了各種發明性實施例，包括方法、程序、系統、裝置及其類似者。
現將參看構成本文一部分之附圖來描述若干例示性實施例。隨後之描述僅提供實施例且並不意欲限制本揭示案之範疇、適用性或組態。相反，實施例之隨後描述將向本領域中熟習此項技術者提供用於實施一或多個實施例之啟發性描述。應理解，可在元件之功能及配置中進行各種改變而不脫離本揭示案之精神及範疇。在以下描述中，出於解釋之目的，闡述具體細節以便提供對某些發明性實施例之透徹理解。然而，將顯而易見的係，可在無此等具體細節之情況下實踐各種實施例。圖式及描述並不意欲為限定性的。詞「實例」或「例示性」在本文中用以意謂「充當一實例、例項或圖示」。不必將本文中描述為「例示性」或「實例」之任何實施例或設計理解為比其他實施例或設計更佳或更有利。
圖1繪示根據本揭示案之實施例的包括一對氮化鎵（GaN）半導體晶粒及頂側冷卻之電子封裝100之簡化局部橫截面視圖。如圖1中所展示，電子封裝100分別包括第一及第二GaN晶粒105、110，該等晶粒經配置以形成半橋功率轉換器之一部分，然而在其他實施例中，可使用更多數目個或更少數目個GaN晶粒且可將其用於不同電路功能。在此特定實例實施例中，第一GaN晶粒105係高側電晶體，且第二GaN晶粒110係同步降壓轉換器電路之低側電晶體。第一及第二GaN晶粒105、110分別以覆晶組態附接至基板115，即每一晶粒之主動裝置及互連側面向該基板。電互連件120分別形成在第一GaN晶粒105與基板115之間及第二GaN晶粒110與基板115之間，該等電互連件在一個實施例中為焊接至該基板之銅柱，然而在其他實施例中，該等互連件可包含焊球、焊墊或可為任何其他合適之互連結構。覆晶組態使第一及第二GaN晶粒105、110中之每一者之背面125分別曝露，這將在下文更詳細地論述。
整體散熱片130包括分別包夾於頂部銅層140a與底部銅層140b之間的非導電陶瓷135（例如，Al203、AlN、BeO等）之層。在一些實施例中，整體散熱片130可為直接結合銅（DBC）基板或絕緣金屬基板（IMS）組合件，然而也可使用其他合適組態。DBC及IMS基板兩者通常採用包夾於頂部金屬層與底部金屬層之間的含陶瓷層。如本文所定義，含陶瓷層包括完全或部分由陶瓷形成之層，包括常用於IMS基板之聚合物陶瓷複合物。在一些實施例中，金屬係銅、鋁、其組合或其他合適材料。在一些實施例中，底部銅層140b可分成兩個電隔離區域，其中藉由使用導電環氧樹脂、焊料、銀、完全及/或部分燒結之銀或其他合適導電材料，第一隔離區域145a附接至第一GaN晶粒105之曝露背側125且第二隔離區域145b附接至第二GaN晶粒110的曝露背側125。第一及第二隔離區域145a、145b中之每一者可經由一或多個延伸銅柱150（例如，100微米或其他合適高度）分別電耦接至基板115，該等銅柱可附接有焊料或其他合適導電材料（例如，焊料或導電黏著劑）。在其他實施例中，可使用其他合適互連結構，諸如但不限於引線、電線、夾子、翼形件或組件（例如，在底部層145a與基板115之間豎直定向之電阻器、電容器等）。第一及第二隔離區域145a、145b可經由基板115獨立地電偏壓，以將適當電壓偏壓分別施加至第一及第二GaN晶粒105、110中之每一者的體基板。
在一些實施例中，頂部銅層140a係連續的，這使得能夠有效橫向擴散分別由第一及第二GaN晶粒105、110產生的熱能，且因此能夠降低電子封裝100之頂部表面155處的熱功率密度。頂部銅層140a可實質上曝露在電子封裝100的頂部表面155處，因此其可經由熱介面材料160直接熱耦接至冷板165、散熱片或其他設備，以將分別來自第一及第二GaN晶粒105、110中之每一者的熱能有效地傳送穿過底部銅層140b、穿過陶瓷135、穿過熱介面材料160且到達冷板165。整體散熱片130內之陶瓷135提供頂部銅層140a與第一GaN晶粒145a之體基板之間及與第二GaN晶粒145b之體基板之間的電隔離，且亦提供在每一GaN晶粒之體基板中之每一者之間的電隔離。在一些實施例中，陶瓷135之厚度大致為250微米，且頂部銅層140a及底部銅層140b的厚度各自為大致300微米，然而也可使用其他合適厚度。
在一些實施例中，一或多個控制及/或隔離IC 170可附接至基板115且經組態以提供分別形成於第一及第二GaN晶粒105、110中之控制信號及/或驅動電晶體。控制及/或隔離IC 170可使用焊線、覆晶技術或其他合適互連件來電耦接至基板115。控制及/或隔離IC 170可提供隔離、短路保護、切換波形控制、過沖保護、故障報告、過溫保護、ESD保護及/或如下文中更詳細描述之其他特徵及功能。
如本文所描述，在此特定實施例中，第一及第二GaN晶粒105、110形成半橋降壓轉換器電路之一部分，其中基板115包括VIN端子151、切換節點端子153及接地端子157。第一GaN晶粒105及第二GaN晶粒110之緊密鄰近以及形成連接第一GaN晶粒105及第二GaN晶粒110之切換節點端子153（在本實施例中形成於基板115內）的銅之較大橫截面積可使得封裝100能夠具有超低閘極迴路電感及超低換向迴路電感，從而能夠提高切換速度且提高電路穩定性。
一或多個整合被動電子組件175（例如，電阻器、電容器、電感器）可連同其他離散主動組件（例如，二極體、閘流體等）一起附接至基板115。在一些實施例中，一或多個被動元件175可與控制及/或隔離IC 170中之切換功能組合以提供自舉電路。在一些實施例中，基板115係多層有機基板，諸如但不限於具有藉由複數個通孔互連之複數個銅層的四層BT基板，然而在其他實施例中，可使用其他合適材料及其他合適數目個電佈線層。電子封裝100可藉由與頂部銅層140a實質上共面或亞齊平的模製化合物180或其他合適材料來封裝，以使得頂部銅層可與熱介面材料160及冷板165緊密接觸。
圖2繪示圖1中所繪示之封裝100之簡化仰視平面視圖。如圖2中所展示，基板115包括具有三個大功率連接之焊盤柵格陣列，包括耦接至第一GaN晶粒105（例如，用作半橋電路中的高側晶粒）之Vin焊墊205（Vin端子151）、耦接至分別形成於第一GaN晶粒105與第二GaN晶粒110之間的互連件之SW（切換節點）焊墊210（切換節點端子153），以及耦接至第二GaN晶粒110（例如，用作半橋電路中的低側晶粒）之PGND焊墊215（接地端子157）。基板115亦包括複數個I/O連接件220，該複數個I/O連接件可將信號耦接進出封裝100，例如閘極控制信號、故障信號、邏輯功率信號及其類似者。圖2係可在封裝100上形成之電連接件的一個實例，且其他實施例可具有其他合適配置、尺寸及連接件組態。
圖3繪示圖1及圖2中所繪示之封裝100之簡化俯視圖。如圖3中所展示，整體散熱片130之頂部銅層140a經曝露且由模製化合物180包圍。在一些實施例中，頂部銅層140a與模製化合物共面，然而在其他實施例中，模製化合物係亞齊平的，因此銅略微延伸出封裝之頂部以促進與熱介面材料形成可靠介面。在一些實施例中，頂部表面165可經陽極化、鍍覆或塗佈有油漆、熱介面材料或其他合適材料。
圖4繪示具有與圖1至圖3中所繪示之電子封裝100類似之特徵的電子封裝400之簡化局部橫截面視圖（其中類似附圖標號指示類似特徵），然而電子封裝400包括兩個ePad來代替在電子封裝100中使用的整體散熱片130。在一些實施例中，ePad 405、410可主要由鍍覆有一或多種金屬之銅製成，然而其他實施例可包含銅鎢合金、銅鈹合金、銀、金、鋁、陶瓷、金剛石、碳化矽或其他合適材料。如圖4中所展示，封裝400分別包括高側及低側GaN晶粒105、110，該等晶粒各自分別耦接至各自為大致200微米厚之單獨銅ePad 405、410。ePad 405、410彼此電隔離且電耦接至各別GaN晶粒體基板105、110及基板115。基板115可將單獨偏壓電壓施加至每一晶粒105、110之體基板。在一些實施例中，在ePad 405、410與冷板165之間使用電絕緣熱介面材料460以確保電隔離。在一些實施例中，封裝400與圖1至圖3中所繪示之電子封裝100相比可具有降低之熱阻抗，此係因為去除了陶瓷間層，該陶瓷間層的熱導率可比銅之熱導率低。然而，在其他實施例中，封裝100可具有降低之熱阻抗，限制條件為整體散熱片足夠大以降低功率密度以有效地橫穿熱介面材料。
圖5繪示圖4中所繪示之電子封裝400之簡化仰視圖，且展示與電子封裝100的互連佈局類似之焊盤柵格陣列。
圖6繪示圖4及圖5中所繪示之電子封裝400之簡化俯視圖。如圖6中所展示，存在曝露於電子封裝400之頂部表面415處的兩個單獨電偏壓之ePad 405、410。
圖7繪示具有與圖1至圖3中所繪示之電子封裝100類似之特徵的電子封裝700之簡化局部橫截面視圖（其中類似附圖標號指示類似特徵），然而電子封裝700在中間封裝705、710中包括GaN及矽晶粒。如圖7中所展示，電子封裝700分別包括各自位於單獨中間電子封裝705、710中之高側及低側GaN晶粒715、720。在此特定實施例中，GaN晶粒715、720具有背面725，該等背面使用導電環氧樹脂、焊料、銀、完全及/或部分燒結之銀或其他合適導電材料來各自附接至引線框部分727、729（亦稱作槳葉）。引線框部分727、729使用導電環氧樹脂、焊料、銀、完全及/或部分燒結之銀或其他合適導電材料來附接至整體散熱片130之隔離區域145a、145b。
如在圖7中進一步展示，在此實施例中，中間電子封裝705、710各自分別包括可為分別耦接至GaN晶粒715、720之矽、GaN或其他半導體裝置的單獨控制晶粒730、735。GaN晶粒715、720及控制晶粒730、735可經由焊線、覆晶或其他合適互連方法電連接至中間電子封裝705、710，且藉由模製材料740包覆成型。在一些實施例中，GaN晶粒715、720之體基板可經由中間封裝連接及/或經由類似於延伸銅柱150（參見圖1）之外部連接而經電偏壓。在此實施例中，中間電子封裝705、710係雙邊扁平無引線（DFN）封裝，然而中間封裝可為任何合適焊線、覆晶、晶片級或其他封裝，且可包括一或多個GaN及/或矽晶粒所附接至的金屬焊墊。
在一些實施例中，使用中間電子封裝705、710可能夠提高電子封裝700之良率，此係因為能夠在整合之前測試中間電子封裝705、710。此外，中間電子封裝705、710之使用可實現電子封裝700的簡化組裝，此係歸因於與處理裸晶粒時所需的相比之中間電子封裝之增大的特徵大小以及縮減的清潔度及處置程序。
在一些實施例中，可選擇模製化合物180以充當填充中間電子封裝705、710與電子封裝700之間的間隙之底部填充材料。在各種實施例中，模製化合物180、740與整體散熱片130之熱膨脹係數（CTE）可經選擇為大致相同以最小化內應力。
圖8繪示整體散熱片130之底部銅層140b的平面視圖。如圖8中所展示，在一些實施例中，第一隔離區域145a與第二隔離區域145b之間的介面區域805可經配置為不規則的、階梯狀的、鋸齒狀的或其他合適幾何形狀，以增加銅對陶瓷之黏著力。
圖9繪示具有與圖7中所繪示之電子封裝700類似之特徵的電子封裝900之簡化局部橫截面視圖（其中類似附圖標號指示類似特徵），然而與具有單相架構之電子封裝700相比，電子封裝900包括兩相架構。如圖9中所展示，電子封裝900包括第一相半橋電路905及第二相半橋電路910。如本文更詳細解釋，每一相可包括單獨之高側及低側GaN基電晶體。其他實施例可在單個電子封裝內包括三相、四相或更多相。
如在圖9中進一步展示，電子封裝900包括定位在基板920內之穿孔引腳915。穿孔引腳915可經組態以焊接至接收板之通孔中、連接至插座或壓配至接收板之通孔中。本文所揭示之任一電子封裝皆可使用穿孔組態，且類似地，電子封裝900亦可經組態為如圖1至圖2中所展示之焊盤柵格陣列。
圖10繪示具有與圖7中所繪示之電子封裝700類似之特徵的電子封裝1000之簡化局部橫截面視圖（其中類似附圖標號指示類似特徵），然而電子封裝1000係具有倒置中間電子封裝之底部冷卻架構。如圖10中所展示，電子封裝1000包括兩個中間電子封裝1005、1010，該等中間電子封裝各自包括分別附接至每一各別中間電子封裝之引線框部分1025、1030的GaN電晶體1015、1020。在一些實施例中，每一中間電子封裝1005、1010可包括一或多個控制裝置，如本文所描述。然而，在此實施例中，控制裝置1035展示為在中間電子封裝之外且附接至基板1040。在一些實施例中，基板1040可為通常所說的絕緣金屬基板（IMS），其具有相對較高熱導率，從而使得熱能能夠經由熱介面材料1045自GaN電晶體1015、1020耦接至冷板1040。
圖11繪示具有與圖9中所繪示之電子封裝900類似之特徵的電子封裝1100之簡化局部橫截面視圖（其中類似附圖標號指示類似特徵），然而電子封裝1100在穿孔模組1100內包括兩相架構。如圖11中所展示，模組1100包括塑膠主體1105，該塑膠主體包括可為焊入組態或壓配組態之複數個穿孔引腳1110。塑膠主體1105可包括接收耦接至引腳1110之基板1120的空腔1115。基板1120可包括全部耦接至一體式整體散熱片1130之四個GaN基電晶體1125a至1125d。GaN基電晶體1125a至1125d可如例如圖7中所展示而置放於中間封裝內，或可為如例如圖1及圖4中所展示之裸晶粒。整體散熱片1130可具有本文所展示之任一組態或任何其他合適組態。空腔1115可藉由填充材料1135填充，該填充材料可為任何類型之凝膠、填充物、模製化合物、底部填充物或任何其他合適材料。如本文所揭示，一或多個控制晶粒可附接至基板1120或定位於中間電子封裝內。如受益於本揭示案之本領域中熟習此項技術者所理解，可在模組1100內形成更多數目個或更少數目個相。
圖12繪示可在本文所展示之任一電子封裝中採用的單相半橋電路1200之簡化電氣示意圖。第一GaN晶粒1205係高側GaN電晶體，且第二GaN晶粒1210係低側GaN電晶體，其以在兩個晶粒之間形成切換節點（Vsw）1215之半橋組態耦接在一起。第一GaN晶粒1205可耦接至第一控制晶粒1220，且第二GaN晶粒1210可耦接至第二控制晶粒1225。控制晶粒1220、1225可各自包括以下電路中之一或多者：閘極驅動器、欠壓閉鎖、dV/dt偵測及保護、功率調節、過溫保護、位準移位、自舉電源、隔離、過電流保護、微調功能及/或保護電路系統。每一控制晶粒1220、1225可經配置以經由視情況選用之隔離器裝置1235自控制器1230接收控制信號，該隔離器裝置可為例如光學耦接、數位耦接、磁耦接或其他合適類型之隔離器裝置。在其他實施例中，可不使用隔離器裝置1235。在一些實施例中，隔離器1235、控制晶粒1220、1225以及第一及第二GaN晶粒1205、1210分別可整合於單個電子封裝1240內，然而其他實施例可使此等裝置中之一或多者整合於電子封裝內。
圖13繪示根據本揭示案之實施例的與形成電子封裝之方法1300相關聯的步驟。步驟1305包括形成基板。在一些實施例中，基板可為多層印刷電路板，然而在其他實施例中，其可僅具有一個層及/或可由諸如陶瓷、金屬、介電質及其類似者之其他材料製成。
步驟1310包括形成一或多個GaN晶粒。在一些實施例中，每一GaN晶粒可包括一或多個電晶體，然而在其他實施例中，每一GaN晶粒可包括一或多個邏輯、驅動器及/或控制電路。在一些實施例中，每一GaN晶粒可具有包括一或多個電晶體之主動表面，該主動表面與作為體半導體基板之一部分的背面相對定位。
步驟1315包括將一或多個GaN晶粒附接至基板。在一些實施例中，一或多個GaN晶粒以覆晶組態附接至基板，其中晶粒之主動表面面向基板，然而在其他實施例中，晶粒可在背側附接至基板且主動表面經由焊線電耦接至基板之處附接。
步驟1320包括形成整體散熱片。在一些實施例中，整體散熱片包括包夾於兩個銅層之間的陶瓷層，可稱為直接結合銅（DBC）或絕緣金屬基板（IMS）。在其他實施例中，整體散熱片可包括例如銅、鋁、陶瓷、金剛石及其類似者之相對較高熱導率材料之一或多個層。
步驟1325包括將整體散熱片附接至一或多個GaN晶粒且將整體散熱片電耦接至基板。在一些實施例中，整體散熱片可藉由焊料、導電黏著劑、燒結銀、擴散結合或其他合適技術來電耦接且熱耦接至一或多個GaN晶粒。在各種實施例中，整體散熱片可電耦接至基板，以使得基板可經由整體散熱片將電偏壓施加至體半導體基板。在一些實施例中，柱、引線或其他互連件可用於將電偏壓電壓自基板施加至每一GaN晶粒。
步驟1330包括囊封一或多個GaN晶粒及整體散熱片之至少一部分。在一些實施例中，使用模製化合物，然而在其他實施例中，可使用任何類型之凝膠、底部填充物或其他合適材料。
應瞭解，程序1300係例示性的，且變化及修改係可能的。描述為依序之步驟可並行執行，步驟之次序可改變，且步驟可加以修改、組合、添加或省略。
儘管前述實施例中所論述之GaN晶粒經描述為形成半橋電路，但受益於本揭示案之本領域中熟習此項技術者應瞭解，單個GaN裝置以及任何數目個GaN裝置可用於不同電目的且可根據所揭示實施例中之一或多者來使用。例如，在一個實施例中，一系列GaN裝置可用在多相馬達驅動器電路中，而在另一實施例中，複數個GaN裝置可用於高速、高功率多工切換矩陣。此等實施例中之任一者可整合於本文所揭示的封裝組態中之一或多者中。
為簡單起見，諸如電容器、電阻器、二極體及其類似者之各種周邊組件未在圖式及電氣示意圖中展示。
在一些實施例中，GaN基晶粒可包括形成於矽基基板上之一或多個氮化鎵及/或其他層，其中主動裝置形成於一或多個氮化鎵層中且矽充當晶粒之體基板。GaN電晶體可包括其中可形成導電通道之二度電子氣區域。
在前述說明書中，已參考可根據不同實施方案而變化之大量具體細節來描述本揭示案之實施例。因此，應在說明性意義上而非限定性意義上看待本說明書及圖式。本揭示案之範疇之唯一及排他性指示以及申請者意欲作為本揭示案的範疇之物為：以申請專利範圍發佈之特定形式而自本申請案發佈的此類申請專利範圍之集合的文字及等效範疇，包括任何後續校正。可在不脫離本揭示案之實施例之精神及範疇的情況下以任何合適方式組合特定實施例之具體細節。
另外，諸如「底部」或「頂部」及其類似者之空間相對術語可用以描述一元件及/或特徵與另一元件及/或特徵的關係，例如在圖式中所繪示。應理解，空間相對術語意欲涵蓋在使用及/或操作裝置時除圖式中描繪之定向外的不同定向。舉例而言，若圖式中之裝置翻轉，則描述為「底部」表面之元件可接著經定向為在其他元件或特徵「上方」。裝置可以其他方式定向（例如，旋轉90度或處於其他定向），且本文中使用之空間相對描述詞相應地進行解釋。
如本文中所使用，術語「及」、「或」以及「一/或」可包括多種含義，該等含義亦預期至少部分地取決於使用此類術語之上下文。通常，「或」若用以關聯一清單，諸如A、B或C，則意欲意謂A、B及C（此處以包括性意義使用）以及A、B或C（此處以排它性意義使用）。另外，如本文中所使用，術語「一或多個」可用於以單數形式描述任何特徵、結構或特性，或可用以描述特徵、結構或特性之某一組合。然而，應注意，此僅為例示性實例且所主張之主題不限於此實例。此外，術語「中之至少一者」若用以關聯一清單，諸如A、B或C，則可解釋為意謂A、B及/或C之任何組合，諸如A、B、C、AB、AC、BC、AA、AAB、ABC、AABBCCC等。
貫穿本說明書對「一個實例」、「一實例」、「某些實例」或「例示性實施方案」之參考意謂結合特徵及/或實例描述的特定特徵、結構或特性可包括在所主張之主題之至少一個特徵及/或實例中。因此，出現在貫穿本說明書之各處的片語「在一個實例中」、「一實例」、「在某些實例中」、「在某些實施方案中」或其他相似片語未必皆指相同特徵、實例及/或限制。此外，特定特徵、結構或特性可組合在一或多個實例及/或特徵中。
在一些實施方案中，操作或處理可涉及對實體量之實體操縱。通常，儘管並非必要，但此等量可呈能夠被儲存、傳送、組合、比較或以其他方式操縱之電信號或磁信號之形式。已證實，大體上出於常見使用之原因，有時將此等信號指代為位元、資料、值、元件、符號、字元、項、數值、標號或其類似者為方便的。然而，應理解，所有此等或類似術語欲與適當實體量相關聯且僅為方便標記。除非另外特定陳述，否則如自本文中之論述顯而易見，應瞭解，在整個本說明書論述中利用諸如「處理」、「計算」、「演算」、「判定」或其類似者之術語係指諸如專用電腦、專用計算設備或類似專用電子計算裝置等特定設備之動作或程序。因此，在本說明書之上下文中，專用電腦或類似專用電子計算裝置能夠操縱或變換信號，該等信號通常表示為專用電腦或類似專用電子計算裝置之記憶體、暫存器或其他資訊儲存裝置、傳輸裝置或顯示裝置內的實體電子量或磁量。
在前述詳細描述中，已闡述了大量具體細節以提供對所主張之主題之透徹理解。然而，本領域中熟習此項技術者將理解，所主張之主題可在無此等具體細節之情況下實踐。在其他情況下，尚未詳細描述本領域中熟習此項技術者所已知之方法及設備以免混淆所主張之主題。因此，意欲所主張之主題不限於所揭示的特定實例，而是此所主張之主題亦可包括屬於所附申請專利範圍及其等效物之範疇內的所有態樣。
100:電子封裝/封裝 105:第一GaN晶粒/高側GaN晶粒/晶粒 110:第二GaN晶粒/低側GaN晶粒/晶粒 115:基板 120:電互連件 125:背面/背側 130:整體散熱片 135:非導電陶瓷/陶瓷 140a:頂部層/頂部銅層 140b:底部層/底部銅層 145a:第一隔離區域/隔離區域 145b:第二隔離區域/隔離區域 150:延伸銅柱 151:VIN端子 153:切換節點端子 155:頂部表面 157:接地端子 160:熱介面材料 165:冷板 170:控制及/或隔離IC 175:整合被動電子組件/被動元件 180:模製化合物 205:Vin焊墊 210:SW焊墊 215:PGND焊墊 220:I/O連接件 400:電子封裝/封裝 405:ePad 410:ePad 415:頂部表面 460:電絕緣熱介面材料 700:電子封裝 705:中間封裝/中間電子封裝 710:中間封裝/中間電子封裝 715:高側GaN晶粒/GaN晶粒 720:低側GaN晶粒/GaN晶粒 725:背面 727:引線框部分 729:引線框部分 730:控制晶粒 735:控制晶粒 740:模製化合物 805:介面區域 900:電子封裝 905:第一相半橋電路 910:第二相半橋電路 915:穿孔引腳 920:基板 1000:電子封裝 1005:中間電子封裝 1010:中間電子封裝 1015:GaN電晶體 1020:GaN電晶體 1025:引線框部分 1030:引線框部分 1035:控制裝置 1040:基板 1045:熱介面材料 1100:電子封裝/穿孔模組/模組 1105:塑膠主體 1110:穿孔引腳/引腳 1115:空腔 1120:基板 1125a:GaN基電晶體 1125b:GaN基電晶體 1125c:GaN基電晶體 1125d:GaN基電晶體 1130:一體式整體散熱片/整體散熱片 1135:填充材料 1200:單相半橋電路 1205:第一GaN晶粒 1210:第二GaN晶粒 1215:切換節點 1220:第一控制晶粒/控制晶粒 1225:第二控制晶粒/控制晶粒 1230:控制器 1235:隔離器裝置/隔離器 1240:電子封裝 1300:方法/程序 1305:步驟 1310:步驟 1315:步驟 1320:步驟 1325:步驟 1330:步驟
圖1根據本揭示案之實施例的包括一對氮化鎵（GaN）半導體晶粒及頂側冷卻之電子封裝之簡化局部橫截面視圖；
圖2繪示圖1中所繪示之電子封裝之簡化仰視平面視圖；
圖3繪示圖1及圖2中所繪示之電子封裝之簡化俯視圖；
圖4繪示根據本揭示案之實施例的包括兩個整體熱散播器之電子封裝之簡化局部橫截面視圖；
圖5繪示圖4中所繪示之電子封裝之簡化仰視圖；
圖6繪示圖4中所繪示之電子封裝之簡化俯視圖；
圖7繪示根據本揭示案之實施例的包括中間電子封裝中之GaN晶粒的電子封裝之簡化局部橫截面視圖；
圖8繪示圖7中所繪示之整體散熱片的底部銅層之平面視圖；
圖9繪示根據本揭示案之實施例的包括電源電路之兩相的電子封裝之簡化局部橫截面視圖；
圖10繪示根據本揭示案之實施例的可與底側冷卻一起使用之電子封裝之簡化局部橫截面視圖；
圖11繪示根據本揭示案之實施例的穿孔電子封裝之簡化局部橫截面視圖；
圖12繪示根據本揭示案之實施例的單相半橋電路之簡化電氣示意圖；以及
圖13繪示根據本揭示案之實施例的與形成電子封裝之方法1300相關聯的步驟。
105:第一GaN晶粒/高側GaN晶粒/晶粒
110:第二GaN晶粒/低側GaN晶粒/晶粒
115:基板
125:背面/背側
150:延伸銅柱
151:VIN端子
153:切換節點端子
157:接地端子
165:冷板
170:控制及/或隔離IC
175:整合被動電子組件/被動元件
180:模製化合物
400:電子封裝/封裝
405:ePad
410:ePad
460:電絕緣熱介面材料

Claims (20)

  1. 一種電子裝置，其包含： 一基板； 一第一氮化鎵（GaN）基電晶體，其形成於一第一半導體晶粒上且電耦接至該基板； 一第二GaN基電晶體，其形成於一第二半導體晶粒上且電耦接至該基板；以及 一整體熱散播器，其熱耦接至該第一及該第二半導體晶粒。
  2. 如請求項1之電子裝置，其中該整體熱散播器包括包夾於一底部金屬層及一頂部金屬層之間的一含陶瓷層。
  3. 如請求項1之電子裝置，其中該整體熱散播器包括包夾於一底部金屬層及一頂部金屬層之間的一陶瓷層，底部銅層包括電耦接至該第一半導體晶粒之一第一部分及電耦接至該第二半導體晶粒之一第二部分，並且其中該第一部分與該第二部分電隔離。
  4. 如請求項3之電子裝置，其中該基板電耦接至該第一部分且將一第一偏壓電壓供應至該第一半導體晶粒，並且其中該基板電耦接至該第二部分且將一第二偏壓電壓供應至該第二半導體晶粒。
  5. 如請求項1之電子裝置，其中該第一半導體晶粒定位在附接至該基板之一第一中間電子封裝內，並且其中該第二半導體晶粒定位在附接至該基板的一第二中間電子封裝內。
  6. 如請求項5之電子裝置，其中該第一半導體晶粒包括與一背側相對之一主動裝置側，並且其中該主動裝置側面向該基板且該背側面向該整體熱散播器。
  7. 如請求項6之電子裝置，其中該背側附接至位於該第一中間電子封裝之一頂部表面處的一引線框槳葉。
  8. 如請求項5之電子裝置，其中該第一中間電子封裝包括一控制裝置，該控制裝置包括耦接至該第一GaN基電晶體之一閘極驅動器電路。
  9. 如請求項8之電子裝置，其中該控制裝置係形成於一矽基半導體晶粒上之一電路。
  10. 如請求項1之電子裝置，其進一步包含一隔離器裝置，該隔離器裝置耦接至該基板且經配置以隔離控制該第一及該第二GaN基電晶體之操作的控制信號。
  11. 如請求項1之電子裝置，其中該第一GaN基電晶體係一高側電晶體且該第二GaN基電晶體係一低側電晶體，並且其中該第一GaN基電晶體與該第二GaN基電晶體串聯耦接以形成一單相半橋電路。
  12. 如請求項1之電子裝置，其進一步包含形成於一第三半導體晶粒上且電耦接至該基板之一第三GaN基電晶體；以及 形成於一第四半導體晶粒上且電耦接至該基板之一第四GaN基電晶體。
  13. 如請求項12之電子裝置，其中該第一GaN基電晶體及該第二GaN基電晶體形成一電源電路之一第一相，並且其中該第三GaN基電晶體及該第四GaN基電晶體形成一電源電路的一第二相。
  14. 如請求項1之電子裝置，其中該基板、該第一半導體晶粒、該第二半導體晶粒及該整體熱散播器定位在形成於一電子封裝中之一空腔內且藉由一填充材料密封在該空腔內，並且其中該電子封裝包括經配置以耦接至一電路板的一或多個引腳。
  15. 如請求項1之電子裝置，其進一步包含自該基板延伸且囊封該第一半導體晶粒、該第二半導體晶粒及該整體熱散播器之至少一部分的一模製化合物。
  16. 如請求項15之電子裝置，其中該整體熱散播器之一部分形成該電子裝置的一頂部表面之一部分且經配置以耦接至一散熱片。
  17. 如請求項1之電子裝置，其中該基板係一多層印刷電路板。
  18. 一種形成一電子封裝之方法，該方法包含： 將一或多個GaN基半導體晶粒耦接至一基板； 將一整體散熱片附接至該一或多個GaN基半導體晶粒且將該整體散熱片電耦接至該基板；以及 囊封該一或多個GaN基半導體晶粒及該整體散熱片之至少一部分。
  19. 如請求項18之方法，其進一步包含經由該整體散熱片將一電偏壓施加至該一或多個GaN基半導體晶粒。
  20. 如請求項18之方法，其進一步包含將該一或多個GaN基半導體晶粒整合至一或多個各別中間電子封裝中。
TW111111188A 2021-03-24 2022-03-24 具有整體熱散播器之電子封裝 TW202303912A (zh)

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