TW201947574A - Testing circuit and testing method - Google Patents

Abstract

A testing circuit includes a time control circuit configured to output a gate control signal and source control signal according to a testing mode control signal. When the testing mode control signal is a first mode, the time control circuit outputs the source control signal to enable a first source driver and outputs the gate control signal to enable a first gate driver to control a first part of a display panel, and outputs disable control signal to stop a second source driver and a second gate driver. When the testing mode control signal is a second mode, the time control circuit outputs the source control signal to enable the second source driver and outputs the gate control signal to enable the second gate driver to control a second part of the display panel, and outputs disable control signal to stop the first source driver and the first gate driver.

Description

   Detection circuit and detection method   

The present disclosure relates to a detection circuit and a detection method, and more particularly to a detection circuit and a detection method which can be used for a gate drive circuit substrate (Gate On Array, GOA) display panel.

In recent years, with the development of display technology, display panels have been applied to various electronic devices, such as smart phones, tablet computers, or various screens.

The liquid crystal display panel uses a control circuit to output signals to drive the liquid crystal display. The GOA circuit design of the panel often adopts the gate double-sided driving method in order to obtain better picture uniformity and optical performance. In the prior art, the GOA panel is used to manually insert and remove a flat flexible cable (FFC) or control the adapter board for unilateral driving picture detection.

One aspect of the present disclosure relates to a detection circuit. The detection circuit includes a timing control circuit. The timing control circuit is coupled to the first source driver, the second source driver, the first gate driver and the second gate driver, and is used to control the signal according to the detection mode to output the gate control signal and the source control signal. The first source driver and the first gate driver are used to control the first part of the display panel, and the second source driver and the second gate driver are used to control the second part of the display panel are different from the first part. Wherein, when the detection mode control signal is the first mode, the timing control circuit outputs a source control signal to enable the first source driver and outputs a gate control signal to enable the first gate driver, and outputs a disable control signal to the first The two source drivers and the second gate driver stop the second source driver and the second gate driver from operating. When the detection mode control signal is the second mode, the timing control circuit outputs a source control signal to enable the second source driver and outputs a gate control signal to enable the second gate driver, and outputs a disable control signal to the first source. The gate driver and the first gate driver stop the operation of the first source driver and the first gate driver.

Another aspect of the present disclosure relates to another detection circuit. The detection circuit includes a timing control circuit, a first control module and a second control module. The timing control circuit is used to output a gate control signal and a source control signal. The first control module is coupled to the timing control circuit, the first source driver and the first gate driver. The first source driver and the first gate driver are used to control the first part of the display panel. The first control module receives the gate. Control signal, source control signal and detection mode control signal. The second control module is coupled to the timing control circuit, the second source driver and the second gate driver, the second source driver and the second gate driver are used to control the second part of the display panel, and the second control module Receives gate control signals, source control signals, and detection mode control signals. Wherein, when the detection mode control signal is the first mode, the first control module outputs a source control signal to enable the first source driver and outputs a gate control signal to enable the first gate driver, and the second control module outputs The control signal is disabled to the second source driver and the second gate driver to stop the second source driver and the second gate driver from operating. When the detection mode control signal is the second mode, the second control module outputs the source control signal to enable the second source driver and outputs the gate control signal to enable the second gate driver, and the first control module output is disabled. Control signals to the first source driver and the first gate driver to stop the first source driver and the first gate driver from operating.

Another aspect of the present disclosure relates to another detection method. The detection method is applicable to a detection circuit to detect a display device. The detection circuit includes a timing control circuit. The display device includes a display panel, a first source driver, a first gate driver, a second source driver, and a second gate driver. The first source driver and the first gate driver are used to control the first part of the display panel, and the second source driver and the second gate driver are used to control the second part of the display panel. The detection method includes: determining a detection mode according to the detection mode control signal; when the detection mode is the first mode, the timing control circuit outputs a source control signal and a gate control signal to the first source driver and the first gate driver, so that The second source driver and the second gate driver stop operating; when the detection mode is the second mode, the timing control circuit outputs the source control signal and the gate control signal to the second source driver and the second gate driver. Stopping the first source driver and the first gate driver; and when the detection mode is the third mode, the timing control circuit outputs the source control signal to the first source driver and the second source driver, and outputs the gate The control signal is sent to the first gate driver and the second gate driver, so that the first part and the second part of the display panel move as a whole.

In summary, in the detection circuit of the present disclosure, the first part or the second part of the display panel is driven according to the detection mode control signal. In this way, one-sided driving picture detection of the GOA panel can be realized.

100‧‧‧ display panel

120L‧‧‧The first part of the display panel

120R‧‧‧The second part of the display panel

140L‧‧‧First source driver

140R‧‧‧Second Source Driver

160L‧‧‧First Gate Driver

160R‧‧‧Second Gate Driver

200‧‧‧ Detection circuit

220‧‧‧sequence control circuit

240‧‧‧Voltage Regulator

260‧‧‧Power supply circuit

280L‧‧‧First Control Module

280R‧‧‧Second Control Module

CS‧‧‧ Detection mode control signal

X-COF‧‧‧Source control signal

G-GOA‧‧‧Gate control signal

DCS‧‧‧ Disable Control Signal

PVS, PVS1, PVS2‧‧‧ supply voltage signal

300‧‧‧Test method

S310 ~ S340‧‧‧ Operation

FIG. 1 is a schematic diagram of a detection circuit and a display panel according to some embodiments of the present disclosure; and FIGS. 2A and 2B are a detection circuit and a display panel according to other embodiments of the present disclosure. FIG. 3 is a schematic diagram of a voltage level signal according to some embodiments of the present disclosure; FIG. 4 is a diagram of a detection circuit and a display panel according to other embodiments of the present disclosure. 5 is a schematic diagram of a detection circuit and a display panel according to other embodiments of the present disclosure; FIG. 6 is a flowchart of a detection method according to some embodiments of the present disclosure; .

The following is a detailed description with examples and the accompanying drawings, but the examples provided are not intended to limit the scope covered by this disclosure, and the description of the structure operation is not intended to limit the order of its execution, and any recombination of components The structure of the device and the device with the same effect are all covered by the present disclosure. In addition, the drawings are for illustrative purposes only, and are not drawn to the original dimensions. In order to facilitate understanding, the same elements or similar elements in the following description will be described with the same symbols.

The terms used throughout the specification and the scope of patent applications, unless otherwise specified, usually have the ordinary meaning of each term used in this field, in the content disclosed herein, and in special content.

Regarding the "first", "second", "third", etc. used in this article, they do not specifically refer to the order or order, nor are they used to limit the present disclosure. They are only used to distinguish the same technology. Elements or operations described by words.

In addition, as used in this document, "coupling" or "connection" can mean that two or more components make direct physical or electrical contact with each other, or indirectly make physical or electrical contact with each other. Multiple elements operate or act on each other.

Please refer to Figure 1. FIG. 1 is a schematic diagram of a detection circuit 200 and a display panel 100 according to some embodiments of the present disclosure.

As shown in FIG. 1, the display panel 100 includes a first portion 120L and a second portion 120R different from the first portion 120L, a first source driver 140L, a second source driver 140R, a first gate driver 160L, and The second gate driver 160R. In some embodiments, the display panel 100 may be implemented by a gate-on-array (GOA) liquid crystal display panel. The first source driver 140L and the first gate driver 160L are electrically coupled to the first portion 120L of the display panel and are used to control the first portion 120L. The second source driver 140R and the second gate driver 160R are electrically coupled to the second portion 120R of the display panel and are used to control the second portion 120R. In other part embodiments, the first part 120L and the second part 120R may be further divided into a plurality of regions, so as to implement separate control of each region. Correspondingly, the first source driver 140L and the second source driver 140R can be further subdivided in detail to realize multi-region separate control.

As shown in the figure, structurally, the detection circuit 200 is electrically coupled to the display panel 100. In operation, the detection circuit 200 is used for detecting the screen of the display panel 100. For example, all or a part of the detection circuit 200 may be implemented on a timing control board (T-con board), a source control board (Source board), or an adapter board.

In some embodiments, the detection circuit 200 includes a timing control circuit 220. In other embodiments, the detection circuit 200 further includes a voltage regulator 240 and a power supply circuit 260. The power supply circuit 260 can be used to provide power to the voltage regulator 240 in the detection circuit 200 so that the voltage regulator 240 can perform its operation.

Specifically, the timing control circuit 220 is electrically coupled to the first source driver 140L and the second source driver 140R, and is electrically coupled to the first gate driver 160L and the second gate driver 160R through the voltage regulator 240. The power supply circuit 260 is electrically coupled to the voltage regulator 240, the first gate driver 160L and the second gate driver 160R, the first source driver 140L, and the second source driver 140R.

In operation, please refer to Figures 2A and 2B. 2A and 2B are schematic diagrams of the detection circuit 200 and the display panel 100 according to some embodiments of the present disclosure. The detection circuit 200 is configured to control the signal corresponding to the signal CS output to drive the display panel 100 according to the detection mode.

Specifically, the timing control circuit 220 is used to receive the detection mode control signal CS, and according to the detection mode control signal CS to be the first mode, the second mode, or the third mode to output a signal to enable a portion corresponding to the display panel to display the detection screen .

For example, as shown in FIG. 2A, when the detection mode control signal CS is the first mode, in some embodiments, the timing control circuit 220 is used to output the source control signal X-COF to enable the first source driver. 140L, and output the gate control signal G-GOA to enable the first gate driver 160L. The source control signal X-COF includes a source start signal and a data communication handshake signal. In other embodiments, the timing control circuit 220 is further configured to output a disable control signal DCS to stop the second source driver 140R and the second gate driver 160R from operating. As shown in FIG. 2A, the timing control circuit 220 can output the gate control signal G-GOA and the disable control signal DCS to the first gate driver 160L and the second gate driver 160R respectively through the voltage regulator 240. The following paragraphs The operation of the voltage regulator 240 will be further explained.

In some embodiments, the voltage regulator 240 is configured to receive the gate control signal G-GOA output from the timing control circuit 220, and adjust the gate control signal G-GOA to an appropriate voltage level through the voltage regulator 240. Output to the first gate driver 160L. For convenience, please refer to Figure 3. As shown in Figure 3, the voltage of the gate control signal G-GOA must be periodically switched between the enable level and the disable level. The gate control signal G-GOA includes a gate start signal GST, a high-frequency control signal HC, or a pull-down control signal LC.

Similarly, in some embodiments, the voltage regulator 240 is further configured to receive the disabling control signal DCS output from the timing control circuit 220, and adjust the disabling control signal DCS to an appropriate potential through the voltage regulator 240 and output it to The second gate driver 160R. As shown in FIG. 3, the voltage level of the disabling control signal DCS is at the disabling level, the adjustable voltage level, or the floating voltage level.

In other words, the voltage level of the disabling control signal DCS output by the timing control circuit 220 can be adjusted according to the picture detection requirements. When the voltage level is the lowest level of the disabled level or a lower adjustable voltage level, it can effectively eliminate the problem of horizontal bright and dark lines in some GOA display panels when detecting on a single-sided driving screen. In this way, the picture detection can be made more convenient.

In addition, in some embodiments, the power supply circuit 260 is used to control the signal CS to output the power supply voltage signal PVS1 to the first gate driver 160L according to the detection mode to supply power to the first gate driver 160L. The power supply voltage signal PVS1 includes a ground reference voltage signal VSS and / or a high voltage reference voltage signal VGHD. In other embodiments, the power supply circuit 260 is used to control the signal CS to output the power supply voltage signal PVS2 to the first source driver 140L according to the detection mode, so as to supply power to the first source driver 140L.

In this way, when the detection mode control signal CS is in the first mode, the first source driver 140L that receives the source control signal X-COF and the first gate driver 160L that receives the gate control signal G-GOA are driven. The first portion 120L of the display panel displays a detection screen. The second portion 120R of the display panel driven by the second source driver 140R and the second gate driver 160R does not display a detection screen.

On the other hand, as shown in FIG. 2B, when the detection mode control signal CS is the second mode, in some embodiments, the timing control circuit 220 is used to output the source control signal X-COF to enable the second source driver. 140R, and output the gate control signal G-GOA to enable the second gate driver 160R. In other embodiments, the timing control circuit 220 is further configured to output a disable control signal DCS to stop the first source driver 140L and the first gate driver 160L from operating. In other embodiments, the power supply circuit 260 stops outputting the supply voltage signal to the first source driver 140L and the first gate driver 160L.

In addition, similar to the embodiment in FIG. 2A, the voltage regulator 240 can also adjust the gate control signal G-GOA to an appropriate potential and output it to the second gate driver 160R, and adjust the disable control signal DCS to After an appropriate potential is outputted to the first gate driver 160L. The power supply circuit 260 is used to output a power supply voltage signal PVS1 to the second gate driver 160R for power supply. In other embodiments, the power supply circuit 260 is used to output a power supply voltage signal PVS2 to the second source driver 140R to supply power to the second source driver 140R. The details have been described in the above paragraphs and will not be repeated here.

In this way, when the detection mode control signal CS is in the second mode, the second source driver 140R and the second gate driver 160R drive the second portion 120R of the display panel to display the detection screen. The first portion 120L of the display panel driven by the first source driver 140L and the first gate driver 160L does not display a detection screen.

In addition, when the detection mode control signal CS is the third mode, the timing control circuit 220 can simultaneously output the source control signal X-COF to enable the first source driver 140L and the second source driver 140R, and output the gate control. The signal G-GOA enables the first gate driver 160L and the second gate driver 160R to drive and control the first portion 120L of the display panel and the second portion 120R of the display panel to simultaneously display the detection screen.

Next, please refer to Figure 4. FIG. 4 is a schematic diagram of the detection circuit 200 and the display panel 100 according to other embodiments of the present disclosure. In the embodiment shown in FIG. 4, components similar to those in the embodiment shown in FIG. 1 are represented by the same component symbols, and their operations have been described in the previous paragraphs, and will not be repeated here. Compared with the embodiment shown in FIG. 1, in this embodiment, the detection circuit 200 further includes a first control module 280L and a second control module 280R.

Structurally, as shown in FIG. 4, the first control module 280L is electrically coupled between the timing control circuit 220 and the first source driver 140L, and is electrically coupled between the voltage regulator 240 and the first gate driver. 160L, and is electrically coupled between the power supply circuit 260 and the first gate driver 160L. On the other hand, the second control module 280R is electrically coupled between the timing control circuit 220 and the second source driver 140R, and is electrically coupled between the voltage regulator 240 and the second gate driver 160R, and is electrically connected. It is coupled between the power supply circuit 260 and the second gate driver 160R.

In operation, both the first control module 280L and the second control module 280R are used to receive the detection mode control signal CS, and determine whether to output a signal to enable the corresponding portion of the display panel to display the detection screen according to the detection mode control signal CS.

Specifically, the timing control circuit 220 is configured to receive the detection mode control signal CS and output the detection mode control signal CS to the first control module 280L and the second control module 280R. The first control module 280L and the second control module 280R control the signal CS to the first mode, the second mode, or the third mode according to the detection mode to determine whether to output a signal to enable a portion corresponding to the display panel to display the detection screen.

For example, as shown in FIG. 4, in some embodiments, when the detection mode control signal CS is the first mode, the first control module 280L is used to receive the source control signal X- output from the timing control circuit 220. The COF receives a gate control signal G-GOA adjusted to an appropriate voltage level by the voltage regulator 240. Among them, the source control signal X-COF includes a source start signal, a data communication handshake signal, or a supply voltage signal, and the gate control signal G-GOA includes a gate start signal GST, a high-frequency control signal HC, or a pull-down control signal. LC. In this way, the first control module 280L can output the source control signal X-COF to enable the first source driver 140L and the output gate control signal G-GOA to enable the first gate driver 160L.

In addition, in other embodiments, the first control module 280L is used to receive the power supply voltage signal PVS and output the power supply voltage signal PVS to the first source driver 140L and the first gate driver 160L for power supply.

Furthermore, in other embodiments, the second control module 280R is used to output a disable control signal DCS to stop the second source driver 140R and the second gate driver 160R from operating. In addition, the second control module 280R cuts off the supply voltage signal PVS, so that the second gate driver 160R stops operating.

In this way, when the detection mode control signal CS is in the first mode, the first control module 280L enables the first source driver 140L and the first gate driver 160L to drive the first portion 120L of the display panel to display the detection screen. The second portion of the display panel 120R driven by the second control module 280R through the second source driver 140R and the second gate driver 160R does not display a detection screen.

For another example, in some embodiments, when the detection mode control signal CS is in the second mode, the second control module 280R is used to receive the source control signal X-COF output by the timing control circuit 220 and receive the passing voltage The regulator 240 adjusts the gate control signal G-GOA to an appropriate voltage level. In this way, the second control module 280R can output the source control signal X-COF to enable the second source driver 140R and output the gate control signal G-GOA to enable the second gate driver 160R.

In addition, in other embodiments, the second control module 280R is configured to receive the power supply voltage signal PVS and output the power supply voltage signal PVS to the second source driver 140R and the second gate driver 160R for power supply.

Furthermore, in other embodiments, the first control module 280L is used to output a disable control signal DCS to stop the first source driver 140L and the first gate driver 160L from operating. In addition, the first control module 280L cuts off the supply voltage signal PVS, so that the first gate driver 140L stops operating.

In this way, when the detection mode control signal CS is in the second mode, the second control module 280R enables the second source driver 140R and the second gate driver 160R to drive the second portion 120R of the display panel to display the detection screen. The first control module 280L does not display the detection screen on the first portion 120L of the display panel driven by the first source driver 140L and the first gate driver 160L.

Please refer to Figure 5. FIG. 5 is a schematic diagram of the detection circuit 200 and the display panel 100 according to other embodiments of the present disclosure. In the embodiment shown in FIG. 5, components similar to those in the embodiments of FIGS. 1 and 4 are denoted by the same component symbols, and their operations have been described in the previous paragraphs, and will not be repeated here. Compared with the embodiment shown in FIG. 4, in this embodiment, the detection mode control signal CS is directly input from the machine to the first control module 280L and the second control module 280R. In this way, the first control module 280L and the second control module 280R can respectively control the CS according to the detection mode to control the first source driver 140L, the first gate driver 160L, the second source driver 140R, and Two gate drivers 160R to selectively display the detection picture of the first part 120L or the second part 120R. The rest of the operations are similar to those in the previous embodiment, so they are not repeated here.

Please refer to Figure 6. FIG. 6 is a flowchart of a detection method 300 according to some embodiments of the present disclosure. For the sake of convenience and clear explanation, the following detection method 300 is described in conjunction with the embodiments shown in Figs. 1 to 5, but it is not limited thereto. Anyone skilled in this art will not depart from the spirit and scope of this case. Inside, you can make various changes and retouching. As shown in FIG. 6, the detection method 300 includes operations S310 to S340.

First, in operation S310, the detection circuit 200 determines a detection mode according to the detection mode control signal CS.

Furthermore, when the detection mode control signal CS is the first mode, operation S320 is performed, and the timing control circuit 220 outputs the source control signal X-COF and the gate control signal G-GOA to the first source driver 140L and the first The gate driver 160L stops the operation of the second source driver 140R and the second gate driver 160R.

Furthermore, when the detection mode control signal CS is in the second mode, operation S330 is performed, and the timing control circuit 220 outputs the source control signal X-COF and the gate control signal G-GOA to the second source driver 140R and the second The gate driver 160R stops the operation of the first source driver 140L and the first gate driver 160L.

Furthermore, when the detection mode control signal CS is in the third mode, operation S340 is performed, and the timing control circuit 220 outputs the source control signal X-COF to the first source driver 140L and the second source driver 140R, and outputs the gate. The gate control signal G-GOA goes to the first gate driver 160L and the second gate driver 160R.

Those with ordinary knowledge in the technical field can directly understand how the detection method 300 performs the operations and functions based on the detection circuit 200 and the display panel 100 in the various embodiments described above, and therefore will not be described in detail here.

In summary, in the detection circuit of the present disclosure, the first part or the second part of the display panel is driven according to the detection mode control signal. In this way, one-sided driving picture detection of the GOA panel can be realized.

Although the present disclosure has been disclosed as above in the form of implementation, it is not intended to limit the present disclosure. Any person with ordinary knowledge in the field can make various changes and modifications without departing from the spirit and scope of the present disclosure. The scope of protection shall be determined by the scope of the attached patent application.

Claims (12)

    A detection circuit includes: a timing control circuit coupled to a first source driver, a second source driver, a first gate driver, and a second gate driver to control a signal according to a detection mode to Output a gate control signal and a source control signal, the first source driver and the first gate driver are used to control a first part of a display panel, the second source driver and the second gate driver A second part for controlling one of the display panels is different from the first part; wherein, when the detection mode control signal is a first mode, the timing control circuit outputs the source control signal to enable the first source The driver outputs the gate control signal to enable the first gate driver, and outputs an disable control signal to the second source driver and the second gate driver to stop the second source driver and the second The gate driver operates; when the detection mode control signal is a second mode, the timing control circuit outputs the source control signal to enable the second source driver and output the gate control Signal enabling the second gate driver, and outputs the disable control signal to the first source driver and a gate of the first driver to stop the first source driver and a gate driver of the first actuator.         The detection circuit according to claim 1, further comprising: a voltage regulator coupled between the timing control circuit and the first gate driver, and coupled between the timing control circuit and the second gate driver. Between to adjust a voltage level of the gate control signal; and a power supply circuit coupled to the voltage regulator, the first source driver, the second source driver, and the first gate A driver and the second gate driver for outputting a supply voltage signal to the first source driver, the second source driver, the first gate driver or the second gate driver according to the detection mode control signal To supply power to the first source driver, the second source driver, the first gate driver, or the second gate driver.         The detection circuit according to claim 2, wherein the gate control signal includes a gate start signal, a high-frequency control signal or a pull-down control signal, and the power supply voltage signal includes a ground reference voltage signal or a high voltage reference voltage The source control signal includes a source start signal or a data communication handshake signal.         The detection circuit according to claim 1, wherein a voltage level of the gate control signal is periodically switched between a uniform level and a disabled level, and a voltage level of the disabled control signal is at the disabled level. Can level, an adjustable voltage level or a floating voltage level.         According to the detection circuit described in claim 1, when the detection mode control signal is a third mode, the timing control circuit outputs the source control signal to the first source driver and the second source driver, and The gate control signal is output to the first gate driver and the second gate driver.         A detection circuit includes: a timing control circuit for outputting a gate control signal and a source control signal; a first control module coupled to the timing control circuit, a first source driver, and a first A gate driver, the first source driver and the first gate driver for controlling a first part of a display panel, the first control module receives the gate control signal, the source control signal and a detection mode A control signal; and a second control module coupled to the timing control circuit, a second source driver, and a second gate driver, the second source driver and the second gate driver are used to control the display A second part of a panel, the second control module receives the gate control signal, the source control signal, and the detection mode control signal; wherein when the detection mode control signal is a first mode, the first The control module outputs the source control signal to enable the first source driver and outputs the gate control signal to enable the first gate driver. The second control module outputs a disable control. Generate a signal to the second source driver and the second gate driver to stop the second source driver and the second gate driver from operating; when the detection mode control signal is a second mode, the second control The module outputs the source control signal to enable the second source driver and outputs the gate control signal to enable the second gate driver. The first control module outputs the disable control signal to the first source. The driver and the first gate driver stop the first source driver and the first gate driver from operating.         The detection circuit according to claim 6, further comprising: a voltage regulator coupled between the timing control circuit and the first control module, and coupled between the timing control circuit and the second control module. Between to adjust a voltage level of the gate control signal; and a power supply circuit coupled to the voltage regulator, the first control module and the second control module for detecting The mode control signal outputs a power supply voltage signal to the first control module or the second control module.         The detection circuit according to claim 7, wherein the gate control signal includes a gate start signal, a high-frequency control signal or a pull-down control signal, and the power supply voltage signal includes a ground reference voltage or a high voltage reference voltage signal The source control signal includes a source start signal, a data communication handshake signal, or a power supply voltage signal.         The detection circuit according to claim 6, wherein a voltage of the gate control signal is periodically switched between a uniform level and a disabled level, and a voltage level of the disabled control signal is at the disabled level. Can level, an adjustable voltage level or a floating voltage level.         The detection circuit according to claim 6, wherein the timing control circuit outputs the detection mode control signal to the first control module or the second control module.         According to the detection circuit described in claim 6, when the detection mode control signal is a third mode, the first control module outputs the source control signal to the first source driver, and the first control module Output the gate control signal to the first gate driver, the second control module outputs the source control signal to the second source driver, and the second control module outputs the gate control signal to the Second gate driver.         A detection method is applicable to a detection circuit for detecting a display device. The detection circuit includes a timing control circuit. The display device includes a display panel, a first source driver, a first gate driver, and a second source. And a second gate driver, the first source driver and the first gate driver are used to control a first part of the display panel, and the second source driver and the second gate driver are used to control A second part of the display panel, the detection method includes: determining a detection mode according to a detection mode control signal; and when the detection mode is a first mode, the timing control circuit outputs a source control signal and a gate Control signal to the first source driver and the first gate driver to stop the second source driver and the second gate driver; when the detection mode is a second mode, the timing control The circuit outputs the source control signal and the gate control signal to the second source driver and the second gate driver, so that the first source driver and the first source driver The gate driver stops operating; and when the detection mode is a third mode, the timing control circuit outputs the source control signal to the first source driver and the second source driver, and outputs the gate control signal To the first gate driver and the second gate driver.