TW201926869A - Converter having low loss snubber - Google Patents

Abstract

The present application is a converter having a low loss snubber. The low loss snubber of the converter includes a clamping winding, a first capacitor, and a second capacitor. The clamping winding is coupled with a primary winding of a transformer of the converter. The primary winding to a secondary winding of the transformer leakage inductance energy is recovered by storing the energy in the second capacitor. When the second capacitor is discharging, the energy in the second capacitor may be further transferred to the first capacitor. When the first capacitor is discharging, energy in the first capacitor may be further returned to the power source. Therefore, the energy in the first capacitor and the energy in the second capacitor may not be consumed by a resistor, and power consumption of the low loss snubber may be decreased.

Description

Power converter with low loss damper

The present invention is a power converter, and more particularly a power converter having a low loss damper.

Referring to FIG. 13, a conventional power converter, such as a flyback power converter, includes an input terminal I/P, a transformer including a primary side winding Wp and a secondary side winding Ws, and a switch. 21. A damper 22, an output diode Dout, an output capacitor Cout, and a second output terminal O/P. The switch 21 is connected in series with the primary winding Wp and electrically connected between the input terminal I/P and the ground; the damper 22 includes a resistor R, a capacitor C, and a diode D. The resistor R is connected in parallel with the capacitor C and is connected between the cathode of the diode D and the input terminal I/P. The anode of the diode D is electrically connected to a connection point between the primary winding Wp and the switch 21.

The secondary winding Ws is coupled to the primary winding Wp, and the secondary winding Ws is electrically connected between the one of the output terminals O/P and the anode of the output diode Dout; the output diode Dout The cathode is connected to another output terminal O/P; the output capacitor Cout is electrically connected between the two output terminals O/P.

The input terminal I/P is further electrically connected to a power source 23 to receive electrical energy. The two output terminals O/P are further electrically coupled to a load 24 to transfer electrical energy to the load 24.

When the switch 21 is not turned on to form an open circuit, the primary side current Ip passing through the primary side winding Wp and the magnetic flux generated by the primary side winding Wp due to the primary side current Ip may decrease with time. The voltage induced by the secondary winding Ws causes the output diode Dout to be forward biased such that an output current Iout is passed by the secondary winding Ws of the transformer and supplies electrical energy to the load 24 and The output capacitor Cout is charged.

Since the primary side winding Wp may contain an inductive impedance, the current flowing through the primary side winding Wp must be changed progressively, otherwise an abnormal voltage surge may be generated.

Therefore, the primary side winding Wp and the damper 22 provide a current loop to maintain the flow path of the primary side current Ip to avoid abnormal voltage surges. That is, the damper 22 can protect the power converter from being damaged by abnormal voltage surges. At the same time, the primary side current Ip charges the capacitor C.

Referring to FIG. 14, when the switch 21 is turned on to form a closed circuit, the primary side winding Wp is directly connected to the power source 23, and therefore, the primary side current Ip flowing through the primary side winding Wp is increased, and the primary side current is increased. The magnetic flux of the Ip generating magnetic field is increased, so that the energy of the power source 23 is stored in the primary side winding Wp. At this time, the voltage induced in the secondary winding Ws causes the output diode Dout to be reverse biased, and the electric energy required for the load 24 is supplied from the output capacitor Cout.

Further, when the capacitor C is discharged, a discharge current Idis is generated. Since the discharge current Idis flows through the resistor R, the resistor R generates power consumption resulting in waste of electrical energy. Therefore, this prior art power converter is bound to require further improvements.

The present invention provides a power converter having a low loss damper. The power converter with a low loss damper reduces power consumption.

To achieve the above object, the power converter with a low loss damper includes an input terminal, a low loss damper, a transformer, a switch, and two outputs.

The transformer includes a primary side winding and a secondary side winding coupled to the primary side winding, and the secondary side winding is electrically connected between the two output ends.

The switch is connected in series with the primary side winding and electrically connected between the input end and a ground end. The connection point of the switch and the primary side winding is a first node.

The low loss damper includes: a clamp winding, a first inductor, a first capacitor, and a second capacitor; wherein the clamp winding is coupled to the primary winding and respectively connected to the ground and a first One end of the second diode; one end of the first inductor is respectively connected to the other end of the second diode, and one end of the second capacitor, and the other end of the first inductor is connected to one end of a third diode The other end of the third diode is connected to one end of the first diode and one end of the first capacitor; the other end of the first diode is connected to the input end, and the other end of the first capacitor Connected to the first node.

The input is further electrically coupled to a power source to receive electrical energy. The two outputs are further electrically coupled to a load to transfer electrical energy to the load.

When the switch is turned on to form a closed circuit, the power supply provides a primary side current that flows through the primary side winding, the switch, and flows into the ground. The second capacitor further charges the first capacitor via the first inductor and the third diode.

When the switch is not conducting to form an open circuit, the first capacitor is discharged. Further, since the clamp winding is coupled to the secondary winding, the clamp winding generates an offset voltage relative to the ground to charge the second capacitor.

Since the primary side winding has an inductive impedance, the current through the primary side winding must be changed progressively, otherwise an abnormal voltage surge will be generated.

Therefore, when the switch is initially turned off and turned into an open circuit, the first diode is turned on due to the forward bias, and the first capacitor provides a current loop to maintain the current flowing through the primary winding. Circulate to avoid an abnormal voltage surge.

In summary, the leakage inductance energy is recovered by storing the leakage inductance energy of the primary side winding to the secondary side winding to the second capacitance. When the second capacitor is discharged, the electrical energy in the second capacitor is further transferred to the first capacitor, and then when the first capacitor is discharged, it can be transmitted back to the power source. In this way, the electric energy in the first capacitor and the second capacitor is not consumed by a resistor, and the power consumption of the low-loss damper can thus be reduced.

Referring to Figure 1, the present invention is a power converter having a low loss damper. The power converter comprises an input terminal I/P, a low loss damper 11, a switch 12, two output terminals O/P and a transformer, the transformer comprising a primary side winding Wp and a secondary side winding Ws The primary side winding Wp is coupled to the secondary side winding Ws.

The switch 12 is connected in series with the primary side winding Wp and electrically connected between the input terminal I/P and a ground terminal; the connection point of the switch 12 and the primary side winding Wp is a first node n1.

The input terminal I/P is further electrically connected to a power source 13 to receive power from the power source 13. The two output terminals O/P are respectively connected to two ends of the second measuring winding Ws, and the two output terminals O/P are further electrically connected. A load 14 is used to transfer electrical energy to the load 14.

. The low-loss damper 11 includes a clamp winding Wc, a first capacitor C1, a second capacitor C2, and a first inductor L1. The clamp winding Wc is coupled to the primary winding Wc and has two ends. Connecting the grounding end and one end of the second diode D2 respectively; one end of the first inductor L1 is respectively connected to the other end of the second diode D2 and one end of the second capacitor C2, the first inductor L1 The other end is connected to one end of a third diode D3; the other end of the third diode D3 is connected to one end of a first diode D1 and one end of the first capacitor C1; The other end of the pole body D1 is connected to the input end, and the other end of the first capacitor C1 is connected to the first node n1.

When the switch 12 is turned on to form a closed circuit, the power source 13 provides a primary side current flowing through the primary side winding Wp and the switch 12 into the ground terminal, and the second capacitor C2 is discharged to generate a current Ic2. The first inductor L1 and the third diode D3 charge the first capacitor C1.

When the switch 12 is not turned on to form an open circuit, the first capacitor C1 is discharged to generate a current Ic1 to send power back to the power source 13 through the first diode D1. Since the clamp winding Wc is coupled to the primary winding Wp, the clamp winding Wc induces a current Iclamp to charge the second capacitor C2 through the second diode D2.

Since the primary side winding Wp has an inductive impedance, the current flowing through the primary side winding Wp must be changed progressively to avoid generating an abnormal surge voltage. Therefore, when the switch 12 is not turned on to form an open circuit, the first A capacitor C1 provides a current loop to maintain a continuous flow of current through the primary winding Wp to avoid the abnormal voltage surge.

In summary, the leakage inductance energy is recovered by storing the leakage inductance energy of the primary side winding Wp to the secondary side winding Ws to the second capacitance C2. When the second capacitor C2 is discharged, the electric energy in the second capacitor C2 is transferred to the first capacitor C1; when the first capacitor C1 is discharged, the electric energy in the first capacitor C1 is further transmitted back to the power source. 13. As a result, the electric energy in the first capacitor C1 and the second capacitor C2 is not consumed by a resistor, and the power consumption of the low-loss damper can be reduced.

The first capacitor C1 is electrically connected between the anode of the first diode D1 and the first node n1. The cathode of the first diode D1 is electrically connected to the input terminal I/P, the cathode of the third diode D3 is electrically connected to the anode of the first diode D1, and the first inductor L1 is electrically connected to the third Between the anode of the diode D3 and the cathode of the second diode D2. The second capacitor C2 is electrically connected between the cathode of the second diode D2 and the ground. The clamp winding Wc is coupled to the primary side winding Wp, and the clamp winding Wc is electrically connected between the anode of the second diode D2 and the ground.

When the switch 12 is not turned on to form an open circuit, the first diode D1 is turned on by the forward bias, and the first capacitor C1 and the primary winding Wp are provided with a current loop to maintain the flow through the primary winding Wp. The current flows, and the third diode D3 is a reverse bias, and the current of the primary winding Wp is prevented from charging the second capacitor C2 through the first inductor L1; meanwhile, the second diode D2 is a The forward bias voltage is provided to provide the clamp inductor Wc to charge the second capacitor C2. When the switch 12 is turned on to form a closed circuit, the voltage generated by the clamped electric group Wc causes the second diode D2 to be reverse biased and not turned on, and the second capacitor C2 is prevented from being discharged to cause electric energy to pass through the clamp. The group Wc flows into the ground.

The secondary side winding Ws is coupled to the primary side winding Wp and the clamp winding Wc, and the secondary side winding Ws is electrically connected between the two output terminals O/P. In an embodiment of the invention, the polarity of the clamp winding Wc is opposite to the polarity of the primary side winding Wp.

Referring to FIG. 1 and FIG. 2, the number of turns of the clamp winding Wc is the same as the number of turns of the primary winding Wp, and the clamp winding Wc and the primary winding Wp are wound by a double-strand winding. And form a double strand winding. That is, the clamp winding Wc has the same number of turns as the primary side winding Wp, and the clamp winding Wc and the primary side winding Wp form a double-wound winding structure. The double-winding structure of the clamp winding Wc and the primary winding Wp is to minimize leakage inductance to provide a better voltage surge-to-voltage conversion magnetic field coupling environment of the first node n1.

Referring to FIG. 3, in the second embodiment of the present invention, the low-loss damper 11 further includes a third capacitor C3 electrically connected to the anode of the second diode D2 and Between the first nodes n1. Since the primary side winding Wp to the clamp winding Wc is not fully coupled, the leakage inductance is non-zero, and the third capacitance C3 clamps the uncoupled leakage inductance energy.

Referring to FIG. 4, in the third embodiment of the present invention, the low loss damper 11 further includes a first resistor R1, and the first resistor R1 is connected in parallel with the first inductor L1. The parallel first resistor R1 discharges a portion of the charge of the first capacitor C1 during each switching cycle to further reduce the abnormal voltage surge.

Referring to FIG. 5, in the fourth embodiment of the present invention, the switch 12 is a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). One turn of the switch 12 is substantially the first node n1, and a source of the switch 12 is electrically connected to the ground.

The low loss damper 11 further includes an npn-type BJT (npn-type bipolar junction transistor) Q1, a pnp type bipolar junction transistor (pnp-type BJT, pnp- The type bipolar junction transistor Q2, a third resistor R3, and a driving circuit 15. A set of the npn-type BJT Q1 is electrically connected to a collector power supply Vcc. The collector supply Vcc provides a collector voltage to the collector of the npn-type BJT Q1, such as a voltage of 12 volts.

The emitter of the npn-type BJT Q1 is electrically coupled to the emitter of the pnp-type BJT Q2, and the collector of the pnp-type BJT Q2 is electrically coupled to the ground. The base of the npn-type BJT Q1 is electrically coupled to the base of the pnp-type BJT Q2. The second resistor R2 is electrically connected to the emitter of the pnp-type BJT Q2 and the gate of the switch 12.

The driving circuit 15 includes an output terminal that outputs a driving signal. The third resistor R3 is electrically connected between the output terminal of the driving circuit 15 and the base of the pnp-type BJT Q2. The driving signal outputted by the driving circuit 15 is amplified and then output to the gate of the switch 12 to explicitly control the switch 12. In this embodiment, the driving signal is a pulse width modulation (PWM, Pulse Width Modulation). ) Signal.

Referring to FIG. 6, in the fifth embodiment of the present invention, the power converter is a forward converter, and the power converter further includes a first output diode Dout1, a The second output diode Dout2, an output capacitor Cout, and an output inductor Lout. The anode of the first output diode Dout1 is electrically connected to one end of the secondary winding Ws, the anode of the second output diode Dout2 is electrically connected to the other end of the secondary winding Ws, and the second output is The cathode of the pole body Dout2 is electrically connected to the cathode of the first output diode Dout1. The output capacitor Cout is electrically connected between the two output terminals O/P, and the output inductor L1 is electrically connected between the cathode of the first output diode Dout1 and an output terminal O/P thereof. In the present embodiment, the polarity of the secondary winding Ws is the same as the polarity of the primary winding Wp.

Referring to FIG. 7, in a sixth embodiment of the present invention, the power converter is a flyback converter, and the power converter further includes an output diode Dout and an output. Capacitor Cout. The output diode Dout is electrically connected between the secondary winding Ws and the two output terminals O/P; the anode of the output diode Dout is electrically connected to one end of the secondary winding Ws, and the output diode The cathode of the body Dout is electrically connected to one of the output terminals O/P. The output capacitor Cout is electrically connected between the two output terminals O/P. In the embodiment, the polarity of the secondary side winding Ws is opposite to the polarity of the primary side winding Wp.

To explain in detail the power converter of the present invention, a flyback power converter is taken as an example here. Referring to FIG. 8, the connection point of the third diode D3 and the first capacitor C1 is a second node n2, and the connection point between the cathode of the second diode D2 and the second capacitor C2 is one. The third node n3. When the flyback converter is in a steady state, the power source 13 provides a power source, the voltage value of the power source is Vsource, the voltage value of the second node n2 is VLC, and the voltage value of the third node n3 is a Vclamp. And the voltage value of the first node n1 is V1.

When the flyback power converter is in a steady state and the switch 12 is not conducting to form an open circuit, the voltage of the second node n2 is the same as the voltage of the third node n3, or VLC is equal to Vclamp; and the first The voltage at node n1 is the same as the voltage at input I/P, or V1 is equal to Vsource. The voltage across the first capacitor C1 is Vc1, where Vc1 is the difference between Vsource and Vclamp.

Referring to FIG. 9 , when the switch 12 is turned on to form a closed circuit, the first node n1 is equipotential to the ground terminal, for example, 0 volt, and the power source provides a primary side current Ip, and the primary side current Ip It flows through the primary side winding Wp, the switch 12, and flows into the ground. Further, at this time, the voltage value of the second node n2 is -Vc1, but the voltage of the third node n3 does not change. When the anode voltage of the third diode D3 is greater than the cathode voltage, the third diode D3 is turned on by a forward bias. Therefore, the second capacitor C2 is discharged to generate a current Ic2 to charge the first capacitor C1 through the turned-on third diode D3, and the first inductor L1 resonates with the second capacitor C2.

When the anode voltage of the third diode D3 is less than the cathode voltage, the third diode D3 is reverse biased and does not conduct, so the voltage of the second node n2 is not lower than the third node n3. The voltage, that is, when the first capacitor C1 is discharged, the third diode D3 maintains the voltage of the second node n2 at least higher than the voltage of the third node n3.

Further, when the anode voltage of the first diode D1 is greater than the cathode voltage, the first diode D1 is turned on by a forward bias, so that the voltage of the second node n2 is not higher than the The voltage supplied by the power source 13 is that the first diode D1 maintains the voltage of the first node n1 at least no higher than the voltage of the input terminal I/P when the first capacitor C1 is charged.

In other words, the LC resonant tank resonant voltage is not higher than Vsource, the third diode D3 prevents the first capacitor C1 from discharging below Vclamp, and the first diode D1 ensures that the VLC of the second node n2 does not Higher than Vsource.

Referring to FIG. 10, when the switch 12 is closed and the flyback power converter maintains a steady state, the second capacitor C2 completes charging the first capacitor C1 through the third diode D3. And the voltage across the first capacitor C1 is close to Vsource.

Referring to FIG. 11, when the switch 12 is not turned on to form an open circuit, the voltage of the first node n1 starts to rise. When the voltage of the first node n1 rises, the electric energy of the first capacitor C1 returns to the power source 13 via the first diode D1. That is, the first capacitor C1 is discharged to generate a current Ic1 that flows through the first diode D1 and flows into the input terminal I/P to return the power to the power source 13. Further, the primary side current Ip flows through the first capacitor C1 to avoid generating an abnormal voltage surge. That is, when the voltage of the first node n1 rises, the electric energy stored in the first capacitor C1 is sent back to the power source 13 via the first diode D1. Since the voltage rise of the first node n1 is suppressed, and the switch 12 enters the non-conducting open state from the turned-on closed state, the current flowing through the switch 12 is reduced to zero, thereby reducing switching loss and improving efficiency.

When the switch 12 is not turned on to form an open circuit, the primary side current Ip flowing through the primary side winding Wp and the magnetic flux generated by the primary side current Ip start to decrease, and the potential difference generated by the secondary side winding Ws is opposite to the output diode The body Dout is forward biased such that an output current Iout flows through the secondary side winding Ws, and the voltage of the secondary side winding Ws thus recharges the output capacitor Cout and supplies power to the load 14.

Further, since the clamp winding Wc is coupled to the secondary winding Ws, the clamp winding Wc generates an offset voltage with respect to the ground, and outputs a clamp current Iclamp through the second diode D2. The second capacitor C2 is charged.

Referring to FIG. 12, FIG. 12 is a voltage waveform diagram of the first node n1 and the second node n2. When the switch 12 is not turned on to form an open circuit, the first diode D1 is turned on, and the first capacitor C1 thus provides a current loop to maintain the current of the primary winding Wp continuously flowing to avoid an abnormal voltage burst. wave.

In summary, the leakage inductance energy is recovered by storing the leakage inductance energy of the primary side winding Wp to the secondary side winding Ws to the second capacitance C2, similar to an RCD clamp damper. However, the difference is that the clamp winding Wc is a pair of voltage conversions of the primary side winding Wp with respect to the ground terminal. When the switch 12 is turned on to form a closed circuit and energy is resonated by the first inductor L1 to the first capacitor C1, the energy can be recovered from the second capacitor C2. When the switch 12 is not turned on to form an open circuit, the first capacitor C1 slows down the switching transition time of the switch 12 to reduce electromagnetic pulse formation and reduce switching loss, and the leakage current is sent via the first diode D1. Return to the power source 13.

Further, the third capacitor C3 is a coupling capacitor of the primary side winding Wp and the clamp winding Wc, and the purpose is to retrieve the leakage inductance energy of the primary side winding Wp from the primary side winding Wp, and the third capacitor The cross-pressure is generally the same as Vsource.

The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention. A person skilled in the art can make some modifications or modifications to equivalent embodiments by using the above-disclosed technical contents without departing from the technical scope of the present invention, but without departing from the technical solution of the present invention, according to the present invention. Technical Substantials Any simple modifications, equivalent changes and modifications made to the above embodiments are still within the scope of the technical solutions of the present invention.

11‧‧‧Low loss damper

12‧‧‧ switch

13‧‧‧Power supply

14‧‧‧ load

15‧‧‧Drive circuit

Wp‧‧‧ primary winding

Ws‧‧‧ secondary winding

Wc‧‧‧ clamp winding

C1‧‧‧first capacitor

C2‧‧‧second capacitor

C3‧‧‧ third capacitor

Cout‧‧‧ output capacitor

R1‧‧‧first resistance

R2‧‧‧second resistance

R3‧‧‧ third resistor

D1‧‧‧First Diode

D2‧‧‧ second diode

D3‧‧‧ third diode

Dout‧‧‧ output capacitor

Dout1‧‧‧ first output diode

Dout2‧‧‧second output diode

L1‧‧‧first inductance

Lout‧‧‧Output inductor

N1‧‧‧ first node

N2‧‧‧ second node

N3‧‧‧ third node

Q1‧‧‧npn type bipolar junction transistor

Q2‧‧‧pnp type bipolar junction transistor

I/P‧‧‧ input

O/P‧‧‧ output

Ip‧‧‧ primary current

Iclamp‧‧‧Clamp current

Iout‧‧‧Output current

Ic2‧‧‧second capacitor current

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a circuit diagram of a power converter having a low loss damper of the present invention. 2 is a schematic view showing the appearance of a primary winding, a secondary winding, and a clamp winding of a power converter having a low loss damper according to the present invention. 3 is a circuit diagram of a second embodiment of a power converter having a low loss damper of the present invention. Figure 4 is a circuit diagram of a third embodiment of a power converter having a low loss damper of the present invention. Figure 5 is a circuit diagram of a fourth embodiment of a power converter having a low loss damper of the present invention. Figure 6 is a circuit diagram of a fifth embodiment of a power converter having a low loss damper of the present invention. Figure 7 is a circuit diagram of a sixth embodiment of a power converter having a low loss damper of the present invention. 8 to 11 are schematic diagrams showing current directions of a power converter having a low loss damper according to the present invention. 12 is a schematic diagram showing voltage waveforms of a first node and a second node in a power converter having a low loss damper according to the present invention. 13 and FIG. 14 are schematic diagrams showing a circuit of a conventional flyback power converter having a conventional damper and a current direction thereof.

Claims (10)

A power converter having a low loss damper, comprising: an input; a transformer comprising a primary side winding and a secondary side winding, the primary side winding and the secondary side winding being coupled; a switch The switch is connected in series with the primary side winding, and the switch is electrically connected to the primary side winding between the input end and a ground end; wherein, the connection point of the switch and the primary side winding is a first node; And a low-loss damper comprising: a clamp winding, a first inductor, a first capacitor and a second capacitor; wherein the clamp winding and the first The side windings are coupled and respectively connected to the ground end and one end of a second diode; one end of the first inductor is respectively connected to the other end of the second diode and one end of the second capacitor, the first inductor The other end is connected to one end of the third diode; the other end of the third diode is respectively connected to one end of the first diode and one end of the first capacitor; the first diode is connected to the other end The input is connected, the first capacitor is another The terminal is connected to the first node. A power converter having a low loss damper according to claim 1, wherein: a cathode of the first diode is electrically connected to the input terminal; and the first capacitor is electrically connected to an anode of the first diode And between the first node; the cathode of the third diode is electrically connected to the anode of the first diode; the second capacitor is electrically connected between the cathode of the second diode and the ground; The first inductor is electrically connected between the anode of the third diode and the cathode of the second diode; the clamp winding is electrically connected between the ground and the anode of the second diode. A power converter having a low loss damper according to claim 1, wherein the polarity of the clamp winding is opposite to the polarity of the primary side winding. A power converter having a low loss damper according to claim 1, wherein the number of turns of the clamp winding is the same as the number of turns of the primary side winding, and the clamp winding and the primary winding are a pair Strands are wound. The power converter with a low loss damper according to claim 1, wherein the low loss damper further comprises: a third capacitor electrically connected to the anode of the second diode and the first node between. A power converter having a low loss damper according to claim 1, wherein the low loss damper further comprises: a first resistor connected in parallel with the first inductor. The power converter having a low loss damper according to claim 1, wherein the MOSFET is a Metal-Oxide-Semiconductor-Field-Effective Transistor (MOSFET); The drain of the switch is connected to the first node, and the source of the switch is the ground. The power converter with a low loss damper according to claim 1, further comprising: an npn-type Bipolar Junction Transistor (npn-type BJT), wherein the NPN type double The collector of the polarity junction transistor is electrically connected to a collector power supply; a pnp-type bipolar junction transistor (pnp-type BJT, pnp-type Bipolar Junction Transistor); wherein the npn-type bipolar junction transistor The emitter is electrically connected to the emitter of the pnp-type bipolar junction transistor; wherein the collector of the pnp-type bipolar junction transistor is electrically connected to the ground; wherein the base of the npn-type bipolar junction transistor a pole electrically connected to a base of the pnp-type bipolar junction transistor; a second resistor electrically connected to an emitter of the pnp-type bipolar junction transistor and a gate of the metal oxide semiconductor field effect transistor A driving circuit includes an output terminal, the output terminal outputs a driving signal; and a third resistor electrically connected between the output end of the driving circuit and the base of the PNP-type bipolar junction transistor. The power converter with a low loss damper according to claim 1, further comprising: a first output diode, wherein an anode of the first output diode is electrically connected to one end of the secondary winding; a second output diode, wherein an anode of the second output diode is electrically connected to the other end of the secondary winding, and a cathode of the second output diode and a cathode of the first output diode An output capacitor electrically connected between the two output terminals; an output inductor electrically connected between the cathode of the first output diode and an output thereof; wherein the polarity of the secondary winding The polarity is the same as the primary side winding. The power converter with a low loss damper according to claim 1, further comprising: an output diode electrically connected between the secondary winding and the two output terminals; wherein the output diode An anode is electrically connected to one end of the secondary winding, and a cathode of the output diode is electrically connected to one of the output ends of the two output ends; an output capacitor is electrically connected between the two outputs; wherein, the two The polarity of the secondary winding is opposite to the polarity of the primary winding.