TW201917583A - Memory device and data management method thereof - Google Patents

Abstract

A memory device and a data management method thereof are provided. The memory device includes a memory array and a controller. The memory array includes a first storage region and a second storage region. The first storage region includes a plurality of first sub-region clusters being arranged in I1 columns and J1 rows. Each of the first sub-region clusters includes a plurality of sub-regions, which are arranged in O1 columns and P1 rows. The second storage region includes a plurality of second sub-region clusters being arranged in I2 columns and J2 rows. Each of the second sub-region clusters includes a plurality of sub-regions, which are arranged in O2 columns and P2 rows. The controller access a first data through one of a first first sub-region cluster among the plurality of first sub-region clusters and a first second sub-region cluster among the plurality of second sub-region clusters.

Description

Memory device and data management method applied thereto

The present invention relates to a memory device and a data management method applied thereto, and more particularly to a memory device for storing confidential data and a data management method applied thereto.

With the development of audio-visual technology, in order to access a large number of audio and video materials, electronic devices such as tablets, mobile phones, and digital cameras provide memory devices.

Please refer to FIG. 1 , which is a schematic diagram of a memory device. The main control device 10 can be electrically connected to the controller 111 of the memory device 11 via a bus bar or a transmission line or the like. The controller 111 accesses the memory array 115 in response to an instruction issued by the master device 10. The memory array 115 can be different types of storage elements. For example, a flash memory array.

The memory array 115 records the location of the data by means of physical address addressing, but the file system used by the master device 10 accesses the data in a logical address addressing manner. The controller 111 is internally provided with a Flash translation layer (FTL) for providing address mapping function, and converting the logical address transmitted by the main control device 10 into a physical address, and vice versa. Of course. That is, the flash translation layer can assist the host device 10 to access the data of the memory array 115. In addition, based on the limitation of flash memory access, the conventional memory device stores data in an off-site update manner.

Please refer to FIG. 2A~2C, which is a schematic diagram of a memory device of a conventional technology for storing data in an out-of-place update manner. For the sake of explanation, in this paper, a blank square indicates the data paging of the unstored data; a dot-shaped network bottom indicates the data paging of the data that has been written (for example, the data page 115a of Figure 2A).

In FIG. 2A, the controller 111 receives a new write data A from the master device 10. This article uses English letters and numbers to indicate the content of the data and its corresponding version. That is, the same English letters represent the same material (for example, the same file), while the numbers represent the old and new versions. Since the written data A is the first write, it is represented here as the material A1. In FIG. 2A, the flash translation layer 111a writes the material A1 into the material page 115a.

In FIG. 2B, the controller 111 receives an instruction to update the material A from the master device 10. That is, the main control device 10 intends to update the material A1 originally stored in the memory device 11 with the data A2. At this time, the flash translation layer 111a does not update the content stored in the material page 115a with the material A1. In fact, the flash translation layer 111a writes the material A2 into the data page 115b and changes the internal mapping table. In addition, the flash translation layer 111a also marks the data page 115a as invalid. In this context, data pagination is indicated as being invalidated by intersecting nets (eg, sub-page 115a of Figure 2B). Thereafter, if the master device 10 wants to read the material A, the flash translation layer 111a reads the material A2 from the material page 115b.

In FIG. 2C, the controller 111 receives the instruction to update the material A again from the master device 10. That is, the main control device 10 intends to update the data A2 originally stored in the memory device 11 with the data A3. Similarly, the flash translation layer 111a does not update the contents of the material page 115b, but writes the material A3 into the material page 115c and changes the internal address mapping table. In addition, the flash translation layer 111a also marks the data page 115b as invalid.

As can be seen from the description of FIGS. 2A-2C, when the controller 111 receives the update data, the data page (for example, the material pages 115a, 115b) originally used to store the stale data is flashed through the layer 111a. Marked as invalid, but the content of the data stored in the pages of the data actually still exists. This kind of information paging that stores outdated information still has the opportunity to be read out because of being detained. In other words, for documents with high confidentiality (for example, bank data, company internal data, etc.), outdated data still exists in the original data page, which may be read at any time, thereby affecting the security of the data. In other words, the characteristics of flash memory remote update are not suitable for data with high confidentiality.

The present invention relates to a memory device and a data management method applied thereto.

According to a first aspect of the invention, a memory device comprising a memory array and a controller is presented. The memory array includes a first storage area and a second storage area. The first storage area corresponds to the first data level, and the second storage area corresponds to the second data level. The first storage area includes a plurality of first sub-area clusters arranged in the I1 row and the J1 column, and each of the first sub-region clusters includes a plurality of data pages arranged in an O1 row and a P1 column. The second storage area comprises a plurality of second sub-region clusters arranged in I2 rows and J2 columns, and each of the second sub-region clusters comprises a plurality of data pages arranged in an O2 row and a P2 column. Wherein I1, J1, O1 and P1 are related to the first data level, and I2, J2, O2 and P2 are related to the second data level. The controller is electrically connected to the memory array. The controller accesses a first data by using one of the first first sub-region clusters of the first sub-region clusters and one of the first and second sub-region clusters of the second sub-region clusters . In addition, the controller accesses a second data by using one of the second first sub-region clusters of the first sub-region clusters and one of the second and second sub-region clusters of the second sub-region clusters . The controller stores the first data in one of the first first sub-region cluster and the second first sub-region cluster according to the update frequency of the first data. Wherein, the product of I1 and O1 is equal to the product of I2 and O2, and the product of J1 and P1 is equal to the product of J2 and P2.

According to a second aspect of the present invention, a data management method applied to a memory device is proposed. This data management method can be applied to a memory array including a first storage area and a second storage area. The first storage area and the second storage area respectively correspond to the first data level and the second data level. The first storage area includes a plurality of first sub-region clusters arranged in the I1 row and the J1 column, and each of the first sub-region clusters comprises a plurality of data pages arranged in the O1 row and the P1 column. The second storage area includes a plurality of second sub-region clusters arranged in the I2 row and the J2 column, and each of the second sub-region clusters includes a plurality of data pages arranged in the O2 row and the P2 column. The number of clusters of the first sub-regions is greater than the number of clusters of the second sub-regions. The data management method includes the following steps. One of the first first sub-region clusters in the first sub-region clusters and one of the first and second sub-region clusters in the second sub-region clusters access a first data. Using a second first sub-region cluster of the first sub-region clusters and one of the second second sub-region clusters of the second sub-region clusters accesses a second material. The first data is stored in the first first sub-region cluster and the second first sub-region cluster according to the update frequency of the first data. Wherein I1, J1, O1 and P1 are related to the first data level, and I2, J2, O2 and P2 are related to the second data level. Wherein, the product of I1 and O1 is equal to the product of I2 and O2, and the product of J1 and P1 is equal to the product of J2 and P2.

In order to better understand the above and other aspects of the present invention, the following detailed description of the embodiments and the accompanying drawings

Based on the consideration of data confidentiality, the controller of the memory device needs to clear out the obsolete data stored in the memory array (Sanitize). One method of data clearing is to erase the data by an erase operation after the controller performs garbage collection. However, when the memory device performs the erase operation, it is necessary to use a large storage area (for example, a data block) as a basic unit, and the erase operation takes a long time.

In addition, the removal of data in the storage area by the erase operation affects the access speed of the memory device and increases the lifetime. In particular, in the storage area, only a small portion of the outdated data is confidential and needs to be cleared, but the content of the entire storage area must be cleared. Or, the data is often updated, causing the controller to frequently erase outdated data with an erase operation. For this reason, based on the case of avoiding the reduction of the access speed due to the obsolescence of the storage area, the present disclosure proposes to use a smaller sub-area (for example, data paging) as a basic unit for erasing obsolete data, as follows. Said.

For convenience of description, the following examples are exemplified by a single-level cell (SLC), but the present invention can also be applied to a multi-level cell (MLC), third-order memory. Application of Triple-Level Cell (TLC). In addition, similar confidential data management issues may exist as long as the memory device is in an off-site update mode. Therefore, the memory devices can also be used in conjunction with the data management method disclosed herein, and are not limited to flash memory. Furthermore, although the embodiment of the present invention assumes that the storage area is a data block (block) and the sub-area is a data page (page), in practice, the unit and size of the data block and the data page are not limited thereto.

Please refer to Figure 3A, which is a schematic diagram of the data stored in the memory cells of the data page. The data page 215 includes a plurality of memory cells 215a, 215b, wherein some of the memory cells 215a store data bits of "0", and some of the memory cells 215b store data bits of "1". Therefore, in the memory cell distribution diagram below FIG. 3A, the threshold voltage Vth of part of the memory cell 215a is higher than the reference voltage Vref, and the data bit stored in the memory cell 215b is "0"; part of the memory cell 215b The threshold voltage Vth is lower than the reference voltage Vref, and represents that the data bit stored in the memory cell 215b is "1".

According to the concept of the present disclosure, a memory cell having a data bit of "1" in the data page 215 can be specifically re-programmed. When the memory cells 215b originally storing the data bit "1" are reprogrammed, the data bits stored in the memory cells 215b are updated to "0". Accordingly, the memory cell distribution of the entire data page 215 is similar to the distribution before the data is completely written.

Please refer to FIG. 3B, which is a schematic diagram of reprogramming the data cell “0” for the memory cell originally storing the data bit “1”. That is, for the data page 215, all the memory cells 215b storing the data bit "1" are programmed, and the data bit "1" stored in the memory cell 215b is replaced with the data bit "0". Accordingly, the contents of the data page 215 will all be the data bit "0". At this time, the threshold voltage Vth of all the memory cells 215a, 215b is higher than the reference voltage Vref.

In Fig. 3B, even if the material page 215 is read again, the controller can only read all the contents of "0". Therefore, after reprogramming, the controller cannot read any data from the data page 215, indicating that the outdated data has been cleared. Such a content for a specific data page is reprogrammed by the data bit "0", and the way to achieve the clearing effect is called an erase operation.

In the case of erasing obsolete data based on data security considerations, it is optional to perform erasing operations in units of data blocks or, as shown in FIG. 3B, to perform erasing operations in units of data pages. To this end, the memory device of the present disclosure can provide an erase commad and a scrub command for the need to clean outdated data. Wherein, when the controller issues an erase command, it may simultaneously include a process of performing an erase operation on a plurality of data pages.

In short, the controller can evaluate the time required to execute the erase command and the execution of the erase command, and select the one in which the time is shorter. In addition, in order to shorten the execution time of the erase command, the present disclosure proposes a holistic planning management mechanism for the memory device. That is to say, the disclosure can manage the storage location individually according to the characteristics of the data in the data writing phase, the data updating phase, and the garbage collection phase based on the purpose of erasing obsolete data. Incidentally, when the controller executes an erase command, the erase operation can be performed in a more efficient manner.

Please refer to FIG. 4, which is a schematic diagram of setting an operation management program and an erasing function in a controller according to an embodiment of the present disclosure. In this embodiment, the memory device 33 includes a controller 331, a cache memory 335, and a memory array 333. The controller 331 is electrically connected to the cache memory 335 and the memory array 333.

The controller 331 includes a flash translation layer 3311 and a control firmware layer 3313. The flash translation layer 3311 further includes: an address translator 3311a, a data block allocator 3311b, a garbage collector 3311c, a wear leveling unit 3311d, and an erasure management program 3311e. According to the concept of the present disclosure, the erasure management program 3311e can cooperate with each program of the flash translation layer 3311 to perform related operations by controlling various functions of the firmware layer 3313.

For example, when a confidential data needs to be stored in the memory array 333, the erasure management program 3311e needs to be matched with the address translator 3311a and the data block distributor 3311b, and the memory array 333 is found in the memory array 333. The data block to which the data should be written and which data in the data block is paged. In addition, after the memory array 333 has been used for a period of time, the erase management program 3311e can adjust the storage space of the memory array 333 in conjunction with the garbage collector 3311c and the wear leveling device 3311d. In addition, the erasure management program 3311e is used in conjunction with the garbage collector 3311c and the wear leveling unit 3311d to adjust the storage space of the memory array 333, and is also used in conjunction with the address translators 3311a and 3311b.

The control firmware layer 3313 further includes a read function 3313a, a stylization function 3313b, an erase function 3313c, and an erase function 3313d. The read function 3313a can be used to read the content of the data page; the stylization function 3313b can write the data in units of data pages (for example, program the contents of the memory cell to "0" or "1"); erase function 3313c can clear the data in units of data blocks; and the erasing function 3313d can sort the data into single data for clearing data. According to the embodiment of the present disclosure, for the purpose of data clearing, the erasure management program 3311e may select to erase the content of the data block by the erasing function 3313c according to the size of the range to be cleared, or clear the data page by the erasing function 3313d. Content. In practical applications, the functions and programs provided by the controller 331 are not limited to the examples herein.

Then, a data block containing 16 data pages is taken as an example to illustrate the process of erasing data paging. It can be seen that when the controller 331 reprograms a selected data page, the data paging adjacent to the selected data page also affects at the same time. It is assumed here that the data in the data block is arranged in columns of 4 rows and 4 columns.

See Figures 5A-5D, which are diagrams that affect the data pagination adjacent to the selected data pagination when reprogramming a selected material pagination. It is assumed here that the three data pages P1, P2, and P3 in the data block have obsolete data and need to be reprogrammed, and the three data pages are arranged in the data block and arranged in an L shape. For ease of explanation, the following is a re-programming of the contents of a data page by a clear operation.

In Figure 5A, the dot-like mesh representation represents that the data pages in the data block 40 have been written. Here, it is assumed that the data pages P1, P2, and P3 framed by the thick black lines have obsolete data, and thus are regarded as the data page to be erased by the controller 331. As shown in the lower part of FIG. 5A, before the controller 331 has performed the clearing operation on the data pages P1, P2, and P3, the memory cells stored in the data pages P1, P2, and P3 are respectively dispersed in the reference voltage Vth. Both sides of the voltage Vref.

Fig. 5B shows the situation after the controller 331 performs an erase operation on the material page P1. The data indicating that the page P1 is indicated by white in the upper part of Fig. 5B has been erased due to the erasing operation. Further, in the memory cell distribution corresponding to the material page P1 in the lower part of FIG. 5B, the data bits of the memory cell are all converted to "0". That is, by the erasing operation, the threshold voltage Vth of all the memory cells in the data page P1 is higher than the reference voltage Vref.

In Fig. 5B, the data page P2 is not directly adjacent to the material page P1, and the memory cell distribution of the data page P2 in Fig. 5B remains the same as in Fig. 5A. On the other hand, for the material page P3, since the position of the material page P3 is directly below the material page P1. Therefore, while the data page P1 is erased, since the data page P3 is relatively close to its position, the memory cell distribution of the data page P3 will change. As can be seen from Fig. 5B, in the data page P3, the threshold voltage Vth of the memory cell having the data bit of 1 starts to exhibit a tendency to move toward the reference voltage Vref (right side). The phenomenon that the threshold voltage Vth of such a memory cell changes changes, and the content stored in the data sub-P3 is disturbed (Disturb).

In this paper, the bottom of the network in the upper left and lower right directions represents a situation in which the data content of the data page is disturbed after the data page is erased by its adjacent data page. As shown in FIG. 5B, except that the material page P3 has a bottom left and a right bottom, the data page above, the left side, and the right side of the data page P1 is also represented by the bottom of the left upper right direction. This is because the data pages above, on the left side, and on the right side of the data page P1 are also affected by the erase operation of the data page P1. In the case of erasing a data page, the data stored in the other data pages adjacent to the selected data page may be interfered.

After FIG. 5B, the controller 331 also performs an erase operation on the material page P2. As shown at the top of Figure 5C, because the data of the data page P2 is cleared, the data page P2 is indicated by a white square. It can be seen from the memory cell distribution of the data page P2 that the threshold voltage Vth of the memory cells of the data page P2 is all higher than the reference voltage Vref. That is, all the data bits in the data page P2 become "0". Incidentally, since the data page P1 has been previously erased, in the 5C chart, the data distribution of the data page P1 remains the same as in the 5B picture.

In Fig. 5C, since the material page P3 is located on the right side of the material page P2 where the erasing operation is performed. Therefore, the memory cell distribution of the data page P3 will be affected by the erase operation of the data page P2. As can be seen from Fig. 5C, in the data page P3, the memory cell with the data bit of 1 again shows a tendency to move toward the reference voltage direction (right side). Even in the data page P3, the threshold voltage Vth of a part of the memory cells has exceeded the reference voltage Vref. In addition, in the present text, the square-shaped mesh bottom represents the case where the content of the data page is disturbed twice because the adjacent data page is erased. Similarly, except for the data page P3, the data page located on the left side of the data page P1 is also subject to the same interference as the data page P3. Therefore, here, the grid-like grid is located on the left side of the data page P1.

Finally, Fig. 5D shows the result of the erase operation on the material page P3 after the 5C picture. Above the 5D picture, because the data of the data page P3 has been cleared, the data page P3 is also indicated in white. Further, in the memory cell distribution of the data page P3, the data bits of the memory cells all become "0". That is, by the erasing operation, the threshold voltage Vth of all the memory cells in the data page P3 is higher than the reference voltage Vref. Similarly, since the data pages P1 and P2 have all been erased before, in the 5D picture, the data distribution of the data pages P1 and P2 remains the same as the 5C picture.

In Fig. 5C, although the controller 331 has not actually erased the data page P3, in the data page P3 of the 5C chart, the data bits of some of the memory cells have changed from "1" to "0. ". That is, some of the memory cells do not need to be reprogrammed, that is, the effect of being cleared has been presented. Accordingly, when the controller 331 becomes the 5D picture in the erasing operation on the material page P3, the number of memory cells actually needing to be reprogrammed is relatively small. Incidentally, the time required for the controller 331 to perform the erase operation on the data page P3 is less than the time required for the data page P1, P2 to perform the erase operation. In other words, the phenomenon that the data page P3 is disturbed can save the time required for the controller 331 to erase the data page P3.

As previously mentioned, the time required for the controller 331 to erase a data page will vary depending on whether the data page has been interfered with. If the unit erasure time Tsu represents the time required for erasing a data page that has not been disturbed, the erasure time required by the controller 331 is approximately performed when an erase operation is performed on a data page that has been interfered once. It is Tsu*60%; when an erase operation is performed on a data page that has been interfered twice, the controller 331 needs an erase time of about Tsu*40%; performing a wipe on a data page that has been interfered three times. In addition to the operation, the controller 331 requires an erase time of approximately Tsu*35%; and, when an erase operation is performed on a data page that has been interfered four times, the controller 331 requires an erase time of approximately Tsu*. 30%. It can be seen that as the number of times of interference increases, the time required for the controller 331 to erase the data page is gradually reduced, but the magnitude of the decrease is also slowed down as the number of interferences increases.

Further, the embodiment of the present disclosure further plans the order in which data is written to the data page, so that the subsequent data paging (for example, data paging P1, P2) is performed first, and the subsequent operations are required. The data page of the erase operation (for example, data page P3) can reduce the time required for the erase operation because of interference.

Please refer to Figure 6A-6E, which is the number of other data pages affected by the location of the data page to be erased, and the other affected valid pages must be copied to other pages before the erase operation. A schematic of a blank page. For convenience of explanation, it is assumed that the data blocks included in the data block BLK are arranged in M rows and N columns, and it is assumed that the data paging P(m, n) is erased. Where m represents the number of rows of data pages in the data block; n represents the number of columns of data pages in the data block. Where M, N, m, and n are all positive integers.

Figures 6A-6E show a data block 20 containing 16 data pages. In Fig. 6A, it is assumed that all data pages have data stored, and the data pages are marked in the data block 20 by P(m, n), m=1~4, n=1~4.

In Figures 6B to 6E, the data page selected by the thick black solid line represents the data page to be erased. In addition, the data page selected by the bold black dotted line represents the disturbed data page adjacent to the data page to be erased. If the data is actually stored in the interfered data pages, and the stored data content is still valid (ie, non-obsolete data), the controller 331 needs to page the damaged data to store the valid data. Copy to other data blocks. As the position of the data page P(m, n) to be erased is changed within the data block 20, the number of data pages disturbed in the data block 20 is also different.

In Fig. 6B, if the controller 331 performs an erase operation on the material page P(1, 1), the data pages P(2, 1), P(1, 2) are disturbed. Accordingly, if the controller 331 pages the data P(1, 1), P(M, 1), P(1, N), P(M, N) (ie, the data page is located in the data block 20) Corner) When an erase operation is performed, two data pages adjacent to the data page P(m, n) are disturbed.

In Fig. 6C, if the controller 331 performs an erase operation on the data page P(1, 2), the data pages P(1, 1), P(1, 3), P(2, 2) are interfered. . Accordingly, if the controller 331 pages the data P(1, n), P(M, n), where n≠1 and n≠N (ie, the data page is located in the first row or the last row of the data block) When the erase operation is performed, three data pages adjacent to the data page P(m, n) will be interfered.

In Fig. 6D, if the controller 331 performs an erase operation on the data page P(2, 1), the data pages P(1, 1), P(3, 1), P(2, 2) are interfered. . Accordingly, if the controller 331 pages the data P(m, 1), P(m, N), where m ≠ 1 and m ≠ M (ie, the data page is located in the first column or the last column of the data block) When the erase operation is performed, the three data pages adjacent to the data page P(m, n) are disturbed.

In Fig. 6E, if the controller 331 performs an erase operation on the material page P(2, 3), the data page P(1, 3), P(2, 2), P(3, 3), P( 2, 4) will be disturbed. According to this, if the controller 331 performs the erasing operation on the data page P(m, n), where m≠1, m≠M, n≠1, and n≠N (corresponding to the middle of the data block), the data paging P((m-1), n), P((m+1), n), P(m, (n-1)), P (m, (n+1)), will make four data The page pagination adjacent to the page P(m, n) is disturbed.

As can be seen from the 6A to 6E diagrams, as the position of the data page P(m, n) in which the controller 331 performs the erase operation is different, the number of data pages interfered with is different. Therefore, the content of the page data of the data to be backed up by the controller 331 is also different. Further, as the actual data stored in the interfered data pages is different from the valid data or the obsolete data, the number of pages to be backed up by the controller 331 is also different.

Please refer to FIGS. 7A, 7B, and 7C, which illustrate a schematic diagram of the number of interfered data pages as the data page to be erased is different in the location of the data block. In the 7A, 7B, and 7C diagrams, the number represents the number of data pages that are subjected to the erasing operation and adjacent to each other in the data page in which the erasing operation is to be performed.

Figure 7A assumes that within data block 451, the four data pages 451a, 451b, 451c, 451d to be erased are completely non-adjacent. Therefore, the data pages 451a, 451b, 451c, and 451d to be erased are all indicated as 0 (0 indicates the number of adjacent pages to be erased). In this case, when the controller 331 performs an erase operation on each of the material pages 451a, 451b, 451c, and 451d to be erased, a unit erasure time Tsu of 100% is required. In Figure 7A, data pages that do not need to be erased can be further distinguished as: 15 interfered data pages 451e adjacent to data pages 451a, 451b, 451c, 451d, and 13 undisturbed data. Page 451f.

Figure 7B assumes that in the data block 452, the four data pages 452a, 452b, 452c, and 452d to be erased are arranged in a row. Therefore, the data pages 452a and 452d to be erased at both ends of the head and tail are marked as 1; The data pages 452b, 452c to be erased in the middle are all marked as 2 (2 indicates the number of adjacent pages to be erased). In this case, the relationship in which the data to be erased pages are adjacent to each other can be utilized to shorten the time required for the controller 331 to perform the erasing operation. In Figure 7B, there are a total of 10 disturbed data pages 451a adjacent to data pages 452a, 452b, 452c, 452d, and 18 data pages 452f that are not subject to interference.

Figure 7C assumes that in data block 453, the four data pages 453a, 453b, 453c, and 453d to be erased are arranged in a field type. Therefore, the data pages 453a, 453b, 453c, and 453 to be erased are adjacent to each other, so they are all marked as 2 (2 indicates the number of adjacent pages to be erased). In this case, the relationship between the data sheets 453a, 453b, 453c, and 453d to be erased adjacent to each other can be utilized to reduce the time required for the controller 331 to perform the erasing operation. In Figure 7C, there are 8 disturbed data pages 453e adjacent to data pages 453a, 453b, 453c, 453d, and 20 data pages 453f that are not subject to interference.

Comparing the 7A, 7B, and 7C graphs, it can be seen that the arrangement of the data pages to be erased in the data block will affect the number of data pages that are interfered. When the controller 331 performs an erase operation on the data pages in the data blocks 451, 452, and 453, the data stored in the interfered data pages is also required to be backed up. Therefore, when the number of interfered data pages is large, the controller 331 also needs to spend more time to back up the contents of the data pages.

In addition to the difference in arrangement that may affect the time required for the controller 331 to perform an erase operation, the order in which the controller 331 performs the erase operation also affects the time required for the overall execution of the erase command. How the order of the erase operation affects the time required for the controller 331 to execute the erase command will be explained in Figs. 8A and 8B.

8A, 8B continues the example of Figure 7B, taking a data block containing 4*8 data pages as an example to illustrate the execution time of the erase command if different erase sequences are used when executing the erase command. It is also different. It is assumed here that the controller 331 has previously copied the contents of the interfered material page to other pages, and the disturbed data pages have also been marked as invalid. The 8A, 8B maps each contain four data pages to be erased, and the erase command may include four erase stages in an arrow pattern. The controller 331 erases one of the data pages at each stage.

Please refer to FIG. 8A, which is a schematic diagram of erasing data pages according to the order of the pages to be erased. First, the first arrow pattern ST1 represents erasing the data page P(2, 4) storing the stale data A. Since the data page P(2, 4) is the first erased data page, the obsolete data A is not subject to any interference until the data page P(2, 4) is erased. Therefore, when erasing the data page P(2, 4), 100% unit erasure time Tsu is required.

After the erase operation, the obsolete data A contained in the data page P(2, 4) has been cleared. Therefore, the material page P(2, 4) on the right side of the first arrow pattern ST1 is indicated by a blank square. While the controller 331 clears the obsolete data A, the data page P(2, 5) is adjacent to the data page (2, 4), and the obsolete data B stored in the data page P(2, 5) will be received once. interference.

Then, the data page P(2, 5) containing the obsolete material B is erased. Since the data page P(2, 5) has been previously disturbed, the controller 331 erases the data page P(2, 5), and only takes 60% of the unit erasure time Tsu (Tsu*60%). After the erase operation, the obsolete data B contained in the data page P(2, 5) has been cleared. Therefore, the material page P(2, 5) on the right side of the second arrow pattern ST2 is indicated by a blank square. While the controller 331 clears the obsolete data B, the data page P(2, 6) is adjacent to the data page (2, 5), and the obsolete data C stored in the data page P(2, 6) will be subjected to once. interference.

The data page P (2, 6) containing the obsolete data C is then erased. Since the data page P(2, 6) has been previously disturbed, the controller 331 only needs to spend 60% of the unit erase time Tsu (Tsu*60%) when erasing the material page P(2, 6). After the erase operation, the obsolete data C contained in the data page P(2, 6) has been cleared. Therefore, the material page P(2, 6) on the right side of the third arrow pattern ST3 is indicated by a blank square. While the controller 331 clears the obsolete data C, the data page P(2, 7) is adjacent to the data page (2, 6), and the obsolete data D stored in the data page P(2, 7) will be subjected to once. interference.

Finally, the data page P(2, 7) containing the obsolete material D is erased. Since the data page P(2, 7) has been previously disturbed, the controller 331 erases the data page P(2, 7), and only takes 60% of the unit erasure time Tsu (Tsu*60%). After the erase operation, the obsolete data D contained in the data page P(2, 7) has been cleared. Therefore, the material page P(2, 7) on the right side of the fourth arrow pattern ST4 is indicated by a blank square.

According to the above, according to the order of the data pages, the data pages P(2, 4), P(2, 5), P(2, 6), P(2) for the obsolete data A, B, C, and D are included. 7) The erase operation is performed in sequence, and the required erasure times are: Tsu*100%, Tsu*60%, Tsu*60%, and Tsu*60%. Therefore, in Fig. 8A, the total of these four erasing operations requires a total of Tsu*280% of the time.

Please refer to FIG. 8B, which is a schematic diagram of the erasing operation of the data paging according to the order of the pages to be erased. First, the first arrow pattern ST1 represents erasing the data page P(2, 4) storing the stale data A. Since the data page P(2, 4) is the first erased data page, the obsolete data A is not subject to any interference until the data page P(2, 4) is erased. Therefore, when erasing the data page P(2, 4), 100% unit erasure time Tsu*100% is required.

After the erase operation, the obsolete data A contained in the data page P(2, 4) has been cleared. Therefore, the material page P(2, 4) on the right side of the first arrow pattern ST1 is indicated by a blank square. While the controller 331 clears the obsolete data A, the data page P(2, 5) is adjacent to the data page (2, 4), and the obsolete data B stored in the data page P(2, 5) will be received once. interference.

The data page P (2, 6) containing the obsolete data C is then erased. Since the data page P(2, 6) has not been previously disturbed, the controller 331 needs to spend 100% of the unit erase time Tsu (Tsu*100%) when erasing the material page P(2, 6). After the erase operation, the obsolete data C contained in the data page P(2, 6) has been cleared. Therefore, the material page P(2, 6) on the right side of the second arrow pattern ST2 is indicated by a blank square. While the controller 331 clears the obsolete data C, the data page P(2, 7) is adjacent to the data page (2, 6), and the obsolete data D stored in the data page P(2, 7) will be subjected to once. interference. In addition, while the controller 331 clears the obsolete data C, the data page P(2, 5) is adjacent to the data page (2, 6), and the obsolete data B stored in the data page P(2, 5) will be The second time was disturbed.

Then, the data page P(2, 5) containing the obsolete material B is erased. Since the data page P(2, 5) has been previously disturbed twice, the controller 331 erases the data page P(2, 5), and only takes 40% of the unit erasure time Tsu (Tsu*40%). After the erase operation, the obsolete data B contained in the data page P(2, 5) has been cleared. Therefore, the material page P(2, 5) on the right side of the third arrow pattern ST3 is indicated by a blank square. When the controller 331 clears the obsolete data B, the data pages P(2, 4), P(2, 6) do not have data, so they are not affected.

Finally, the data page P(2, 7) containing the obsolete material D is erased. Since the data page P(2, 7) has been previously disturbed, the controller 331 erases the data page P(2, 7), and only takes 60% of the unit erasure time Tsu (Tsu*60%). After the erase operation, the obsolete data D contained in the data page P(2, 7) has been cleared. Therefore, the material page P(2, 7) on the right side of the fourth arrow pattern ST4 is indicated by a blank square.

As described above, in FIG. 8B, when the erasing operation is performed for the obsolete data A, B, C, and D according to the order of the data paging, the controller 331 erases the data paging P(2, 4), P. The time required for (2, 6), P(2, 5), and P(2, 7) are: Tsu*100%, Tsu*100%, Tsu*40%, and Tsu*60%. Therefore, in Fig. 8B, the total of these four erasing operations requires a total of Tsu*300% of the time.

Comparing pictures 8A and 8B, it can be seen that the data pages P(2, 4), P(2, 5), P(2, 6), P(2, 7) according to the order of the data pages themselves. When an erase operation is performed, the time required to perform the erase operation is short. Therefore, in the case that the data pages to be erased are adjacent to each other, the embodiment of the present disclosure follows the arrangement position of the data pages to be erased, following the left-to-right, top-down order. The page is erased.

Please refer to Fig. 9, which is a schematic diagram of the erasing operation of the data pages arranged in a nine-square grid in the data block. It is assumed here that the data block 23 contains data pages arranged in 4 rows and 8 columns.

As shown in the upper left of Figure 9, it is assumed that in the data block 23, the data pages P(1, 4), P(2, 4), P(3, 4), P(1, 5), P(2) , 5), P(3, 5), P(1, 6), P(2, 6), P(3, 6) contain obsolete data that needs to be cleared. Here, select the data pages that need to be erased with a thick black line.

In addition, as shown in the upper right of Figure 9, there are 9 disturbed data pages P(1, 3), P(2, 3), P(3, 3), P(4, 4), P(4). , 5), P(4, 6), P(1, 7), P(2, 7), P(3, 7) contents need to be backed up to other blank pages, and then the interfered data P1, 3, 3, 3, 3, 3, P, 4, 5, P, 4, 5, P, 1, (7) P(2, 7), P(3, 7) are marked as invalid.

Then, in order to make good use of the foregoing information about paging adjacent, the interference phenomenon caused by the data paging is cleared to accelerate the erasing speed, and the controller 331 can use the top-down from left to right for the data paging to be cleared. Erase in sequence.

The lower left side of Fig. 9 represents the order in which the controller 331 performs the erasing operation in the direction of the arrow. Wherein, and the different network bottoms represent the state in which the data is paged before the actual data is erased. These states also correspond to the erase time required to erase the data page. The bottom right of Figure 9 shows the data pages P(1, 4), P(2, 4), P(3, 4), P(1, 5), P(2, 5), P(3). , 5), P (1, 6), P (2, 6), P (3, 6) obsolete data are cleared. The following describes the order in which the erase operations are performed from left to right in the order in which the data is paged in the columns.

First, when the controller 331 erases the material page P(1, 4), it must spend 100% of the unit erasure time Tsu. When the erase operation is performed on the material page P(2, 4), since the stale data in the data page P(2, 4) has been interfered by the controller 331 previously performing the erase operation on the material page (1, 4). Therefore, the controller 331 can erase the data page P (2, 4) by only spending 60% of the unit erase time Tsu. Similarly, when the controller 331 erases the data page P(3, 4), since the stale data in the data page P(3, 4) has been subjected to the erase operation by the controller 331 previously for the data page (2, 4). Interference, therefore, the controller 331 can erase the data page (3, 4) by only spending 60% of the unit erase time Tsu.

Secondly, when the controller 331 erases the data page P(1, 5), since the outdated data in the data page P(1, 5) has been affected by the previous erasing operation on the data page (1, 4), only It takes 60% of the unit to erase the time Tsu. On the other hand, when the controller 331 erases the data page P(2, 5), it is stored in the data page P because it is previously affected by the controller 331 to erase the data page P(2, 4), P(1, 5). The obsolete data of (2, 5) has been disturbed twice. Therefore, when the controller 331 erases the material page P(2, 5), it only takes 40% of the unit erasure time Tsu. Similarly, when the controller 331 erases the data page P(3, 5), it is stored in the data page P because it is interfered by the controller 331 to erase the data page P(3, 4), P(2, 5). 3, 5) obsolete data has been disturbed twice. Therefore, when the controller 331 erases the material page P(3, 5), it only takes 40% of the unit erasure time Tsu.

When the controller 331 erases the material page P(1, 6), it only takes 60% of the unit erase time Tsu because it is interfered by the controller 331 to erase the data page (1, 5). On the other hand, when the controller 331 erases the data page P(2, 6), because the controller 331 previously erases the data page P(2, 5), P(1, 6) interference, the data page P(2) The obsolete data in 6) has been disturbed twice. Therefore, when the controller 331 erases the material page P(2, 6), it only takes 40% of the unit erasure time Tsu. Similarly, when the controller 331 erases the data page P(3, 6), because the controller 331 previously erases the data page P(3, 5), P(2, 6) interference, the data page P(3, The outdated data within 6) has been disturbed twice. Therefore, when the controller 331 erases the material page P (3, 6), it only takes 40% of the unit erasure time Tsu.

It can also be seen from the lower left corner of Fig. 9 that in the left-to-right order and the top-down order, the obsolete data can be erased, so that four data pages adjacent to each other and arranged in a field type can be arranged. The data page in the upper right corner is subject to interference caused by at least one page erase operation, and the data page at the lower left corner is interfered at least once because other data pages are erased, and the data page is located in the lower right corner. Two times the interference caused by the erase operation of other data pages.

As described above, in addition to the time required to reduce the erasing operation by the interference phenomenon when erasing the data page P(1, 4), the controller 331 does not need to erase each of the remaining data pages. Use 100% unit erase time Tsu. Therefore, the erase sequence shown in Fig. 9 can really reduce the effect of the time required to erase the command.

Further analyzing the time required for the erase operation in accordance with this order, it can be seen that the time required for the controller 331 to erase the data page P(1, 4) is Tsu*100%; the controller 331 erases the data page P. The time required for (2, 4), P(3, 4), P(1, 5), P(1, 6) is Tsu*60%; controller 331 erases data page P(2, 5), P The time required for (3, 5), P(2, 6), P(3, 6) is Tsu*40%. Therefore, if it is required that the data pages erased by the controller 331 are arranged in a nine-square grid, and the controller 331 erases the data pages in a left-to-right, top-down order, the controller 331 requires a total erasure time. It is Tsu*100%+4*Tsu*60%+4*Tsu*40%=Tsu*500%. Accordingly, the controller 331 erases the nine data paging processes, requiring only five unit erase times Tsu*500%.

As described above, when the data pages to be erased are adjacent to each other, the data that needs to be copied to other data blocks can be reduced as compared with the case where the individual data is erased by nine non-adjacent data pages. The number of pages. Further, if the controller 331 designs the order of erasing data pages, and performs the erasing operation in the order from left to right and from top to bottom, the interference characteristics between adjacent data pages can also be utilized to greatly shorten the erasing. In addition to the time required for the operation. Therefore, the mode of erasing data paging in a sequential manner can significantly shorten the time required to execute an erase command on a data block.

Next, the description of the controller 331 to perform the erase operation and the clear operation will be described with reference to FIGS. 10A and 10B, and the difference between the two methods will be described. In the diagrams 10A and 10B, it is assumed that the controller 331 needs to clear the obsolete data A stored in the data section P1, the obsolete data A stored in the data page P(2, 4), the obsolete data B stored in the data page P(2, 5), and the storage. Obsolete data C in data page P(2, 6) and outdated data D stored in data page P(2, 7). 10A is a diagram of the controller 331 executing an erase command for the data block 41; and FIG. 10B is a diagram of the controller 331 executing an erase command for the data block.

As shown in FIG. 10A, when the controller 331 executes the erase command for the data block 41, it must first include the data in the data block 41 except for the location of the obsolete data A, B, C, and D. The data is copied to another data block 42. Since the data block 41 contains 32 data pages, it is necessary to copy the contents stored in the data block 41 from the data block 41 to the data block 42 by copying 32-4=28 data pages. When the controller 331 copies the material to be reserved to the data block 42, the controller 331 can perform an erase operation on the data block 41. Accordingly, the controller 331 can calculate the time required to execute the erase command according to the number of data pages to be backed up and the time required to perform the erase operation before executing the erase command.

As shown in FIG. 10B, when the controller 331 executes an erase command for the data block 41, the data included in the data block 41 adjacent to the obsolete data A, B, C, and D must be paged first. Copy to another data block 43. As can be seen from Figure 10B, there are a total of 10 data pages adjacent to the page where the obsolete data A, B, C, and D are located. Therefore, the controller 331 needs to copy the contents of the 10 material pages to the data block 42 from the data block 41. After copying the data to be reserved to the data block 43, the controller 331 can erase the data pages P(2, 4), P(2, 5), P(2, 6), P(2, 7). . Accordingly, the controller 331 can prioritize the execution of the erase command, according to the number of data pages to be backed up, and the data pages P(2, 4), P(2, 5), P(2, 6), P ( 2, 7) The time required for the erase operation to calculate the time required to execute the erase command.

For the sake of explanation, it is assumed here that in the data block 41, the data pages that are not to be cleared contain valid data. However, in practical applications, not all of the data pages that are not to be cleared contain valid data. That is, the data pages that are not to be cleared may contain outdated data or have not yet been written. Therefore, whether it is an erase operation or an erase operation, the actual page content to be copied may be less than the example of FIG. 10A.

Please refer to Fig. 11, which is a flow chart for selecting the operation category after the controller evaluates the time required for the erase operation and the erase operation.

First, the controller 331 estimates the time required to execute the erase command, respectively (step S501), and the time required to execute the erase command (S503). These two steps can be performed simultaneously or sequentially, and the order of them is not limited.

In step S501, when the controller 331 executes the time required for the erase command, it is necessary to first calculate the number of affected data pages (S501a). Next, calculate the time required to copy the valid data from the affected data pages to other data blocks. And, the time at which the valid material is copied and the time at which one of the data blocks are erased are added, and the total result represents the time required for the controller 331 to execute the erase command (step S501b).

In step S503, when the time required to execute the erase command is estimated, the number of affected data pages needs to be calculated first (S503a). Next, calculate the time required to copy the valid data from the affected data pages to other data blocks. And, according to the number of pages to be erased, the position and the order in which the data is to be erased, the time required to perform the erasing operation on the selected data page is calculated. And, the time at which the valid material is copied, and the time required to perform the erasing operation on the selected data page are summed, and the total result represents the time required for the controller 331 to execute the erase command (step S503b).

Thereafter, the controller 331 determines whether the time required to execute the erase command is greater than the time required to execute the erase command (step S505). If the result of the determination in step S505 is affirmative, the controller 331 executes an erase command (step S507, Fig. 10A). On the other hand, if the decision result in the step S505 is negative, the controller 331 executes the erase command (step S509, Fig. 10B).

In step S507, the controller 331 first copies the valid data in the other material pages in the data block to the other data blocks (step S507b). Next, the controller 331 erases the entire data block (step S507b).

In step S509, the controller 331 first copies the valid data in the interfered data page to other data blocks (step S507b). Thereafter, the controller 331 performs an erase operation on the selected data pages (step S507b).

It should also be noted that, as the memory system is different, the time difference required for the controller 331 to perform the erase operation and the erase operation for different types of flash memory is also different. In addition, the judgment result of judging whether to execute an erase command or an erase command will vary depending on the memory technology. For example, suppose that for the first type of memory, the time required to erase a data page is about 1/2 of the time required to erase a data block; In essence, the time required to erase a data page is about 1/10 of the time required to erase a data block. Then, for these two different types of memory, the judgment result that the controller 331 selects to perform an erase operation or perform an erase operation may also be different.

As previously mentioned, the controller 331 will evaluate the time it takes to execute the erase command and execute the erase command and select the type of operation in which a shorter time is required. Therefore, if the controller 331 can shorten the time required for the erase operation as much as possible and the execution time of the erase command is shorter than the execution time of the erase command, the representative controller 331 can clear the obsolete in a more efficient manner. Information to improve the efficiency of protecting confidential information. In the following description, the focus is on how to shorten the time required for the erase operation, including how to determine the storage location and write order of the data from the write phase; and, when performing the garbage collection operation, the data The management of the block is oriented.

Please refer to FIG. 12, which is a block diagram of a memory device in accordance with the present disclosure. The memory device 30 can be connected to the main control device 31 through the bus bar. The memory device 30 includes a cache memory 335, a controller 331 and a memory array 333. The controller 331 is electrically connected to the main control device 31, the cache memory 335, and the memory array 333. According to the concept of the present disclosure, the memory array can be further divided into two parts, one for storing confidential data and the other for storing general data.

As shown in Fig. 12, the inside of the memory array can be divided into two data storage areas. One is a non-sensitive data storage area 333b, and the other is a sensitive data storage area 333a. If the controller 331 receives the data to be written or updated from the master device 31 that is not confidential, the controller 331 can use the general data management mode and write it to the non-sensitive data storage area 333b. On the other hand, if the data to be written or updated belongs to the confidential data and needs to be stored in the sensitive data storage area 333a, the controller 331 will cooperate with the erasure management program 3311e.

Through the erasure management program 3311e, the controller 331 stores the different versions of the data in a centralized manner as much as possible in the process of writing and updating the data to the sensitive data storage area 333a. Furthermore, if the data stored in the sensitive data storage area 333a becomes obsolete due to subsequent updates, the controller 331 clears the data paging for storing the stale data. The controller 331 can clear the obsolete data by performing an erase command for the data block or performing an erase operation for the data page.

According to the embodiment of the present disclosure, the controller 331 plans the data block to be a different data level DG when planning the data block of the sensitive data storage area 333a. For example, Figure 12 assumes that the data block is divided into three data level DGs. The data block corresponding to the first data level DG1 is assumed to be the data block BLKa, BLKb, BLKc, BLKd; the data block corresponding to the second data level DG2 is assumed to be the data block BLKe, BLKf, BLKg, BLKh; the data block corresponding to the third data level DG3 is assumed to be the data blocks BLKi, BLKj, BLKk, BLKl.

As the data level DG corresponding to the data block BLK is different, the present disclosure uses a different number of data pages as the paging cluster CL (ie, sub-region cluster). As the data level DG corresponding to the data block BLK is different, the number of data pages included in the paging cluster CL in the data block BLK is also different.

The following takes the data level DG corresponding to the three data blocks as an example to illustrate the relationship between the data block BLK, the paging cluster CL and the data paging. Incidentally, the number of data level DGs, the number of paging clusters corresponding to each data level DG, and the number of data pages corresponding to each paging cluster CL are examples, and are not limited to the disclosure. application.

Please refer to the figures 13A, 13B, and 13C, which correspond to the data blocks BLK corresponding to the three data level levels DG, respectively, and the schematic diagrams of the paging clusters CL in the data blocks. Wherein, the 13A picture represents the data block 651 corresponding to the first data level (G=1) (for example, the data blocks BLKa, BLKb, BLKc, BLKd); the 13B picture represents the data area corresponding to the data level DG2 Block 652 (eg, data blocks BLKe, BLKf, BLKg, BLKh); Figure 13C represents a data block 653 (eg, data blocks BLKi, BLKj, BLKk, BLK1) corresponding to data level DG3. In these figures, the data blocks each contain a plurality of data pages arranged in M rows (eg, M=8) and N columns (eg, N=8). The number of paging clusters CL divided in the data block BLK is also different as the corresponding data level DG is different.

In Figure 13A, data block 651 contains 64 paged clusters CL, and each paged cluster contains 1 data page. For example, the paging cluster CL1 contains the material page P (1, 1), the paged cluster CL2 contains the data page P (2, 1), and the like. Therefore, in Fig. 13A, the data block use table corresponding to the data block 651 lists a total of 64 cluster numbers (1 to 64). When no data is written to the paging clusters CL1 to CL64 in the data block 651, the data storage locations (P#) corresponding to the cluster numbers (1 to 64) are all "0". If any of the paging clusters is written in the data block 651, the controller 331 updates the material storage location (P#) corresponding to the cluster number (CL#) corresponding to the paging cluster CL to "1".

In Figure 13B, data block 652 contains 16 paged clusters CL, and each paged cluster CL contains 4 data pages. Therefore, the data block usage table corresponding to the data block 652 lists a total of 16 cluster numbers (1 to 16) corresponding to the paging clusters CL1 to CL16, respectively. In addition, the data storage location (P#) corresponding to each cluster number (1~16) can be 0~4.

When no data is written in the paging clusters C1 to CL16 in the data block 652, the data storage locations (P#) corresponding to the cluster numbers (1 to 16) are all "0". If the paging cluster CL in the data block 652 starts to be written, the controller 331 records the latest data storage location (P#) at the cluster number (CL#) corresponding to the paging cluster CL.

In Figure 13C, data block 652 contains 4 paged clusters, and each paged cluster CL contains 16 data pages. Therefore, the data block usage table corresponding to the data block 653 lists a total of four cluster numbers 1 to 4, which correspond to the paging clusters CL1 to CL4, respectively. In addition, the data storage location (P#) corresponding to each cluster number (1~4) can be 0~16.

When no data is written to the paging clusters CL1 to CL4 of the data block 653, the data storage locations (P#) corresponding to the cluster numbers (1 to 4) are all "0". When the paging clusters CL1 to CL4 in the data block 653 start writing data, the controller 331 records the latest data storage location (P#) at the cluster number (CL#) corresponding to the paging cluster CL.

In response, the controller 331 stores the data block usage table in the cache memory 335. When the controller 331 writes data to the memory array 33 or changes the contents of the data block BLK, the paging cluster CL, and the data page, it is also updated synchronously. According to this, the controller 331 can grasp the situation of each data block BLK through the data block use table. In addition to the data block usage table, the controller 331 can maintain a data block grading table and an address mapping table in the cache memory 335, and manage the allocation of the data block BLK through the use of the three. And how to store the data in the appropriate data block and data tab.

Please refer to Figure 14, which is a schematic diagram of the internal memory of the cache. The cache memory 335 is used to store a data block ranking table 335a, a data block usage table 335b, and an address mapping table 335c. Basically, the data block rating table 335a and the data block usage table 335b can be regarded as relevant information required by the controller 331 for management and use of the data block BLK. On the other hand, the address mapping table 335c is equivalent to the information provided by the controller 331 for data management purposes.

During the activation of the memory device 30, the flash translation layer 3311 updates the contents of the cache memory 335 for the controller 331 to access the memory array 333 for use. When the memory device 30 is deactivated, the controller 331 stores the contents of the cache memory 335 in the memory array 333 or other non-volatile memory until the controller 331 is loaded at the next power-on.

The data block classification table 335a is used to store the number of pages of data included in the data block BLK and its corresponding data level DG and the paging clusters in each data level DG. For example, in FIG. 12, the data blocks BLKa, BLKb, BLKc, and BLKd all belong to the data block BLK corresponding to the data level DG1; the data blocks BLKe, BLKf, BLKg, and BLKh belong to the data corresponding to the data level DG2. The block; and the data blocks BLKi, BLKj, BLKk, BLKl all belong to the data block corresponding to the data level DG3.

In addition, the material block rating table 335a also records the number Npg_cl of data pages included in each page cluster CL corresponding to each data level. Where Npg_cl=Og*Pg. Continuing the example of Figures 13A-13C, it is assumed here that in the data block corresponding to the data level G=1, each paged cluster CL contains the number of data pages (when G=1, Npg_cl=1); In the data block corresponding to the data level G=2, each paged cluster CL contains the number of four data pages (Npg_cl=4 when G=2); and, assuming the data block corresponding to the data level G=3 In each page, the paging cluster contains the number of sixteen data pages (when G=3, Npg_cl=16).

In addition, the cache memory 335 further provides a plurality of data block use tables 335b, and each of the data block use tables 335b corresponds to one data block BLK. Therefore, for the example of FIG. 12, if the sensitive data area 333a of the memory array 333 includes the data blocks BLKa~BLK1, each of the data blocks BLKa~BLK1 uses the table 335b for one data block. In addition, as the data level DG corresponding to the data block BLKa~BLK1 is different, the number of the cluster number CL# and the data storage location P# in the table 335b is different for each data block.

For example, when the data block BLK corresponds to the data level DG1, the data block uses the table 335b to record the cluster number 1 to 64, and the data storage position is 0 or 1; when the data block BLK corresponds to the data level DG2, the data The block usage table 335b records the cluster number as 1~16, and the data storage location can be 0~4; when the data block BLK corresponds to the data level DG3, the data block uses the table 335b to record the cluster number 1~4, and the data The storage location can be 0~16 (0 means that there is no data to be written in this cluster).

Furthermore, the address mapping table 335c is used to store the data corresponding to each logical address and the physical address of the data in the memory array. According to the embodiment of the present disclosure, the controller 331 can distinguish the storage location of the data in the memory array 333 by using the data block BLKid and the paging cluster CLId. After using Table 335b in the matching data block, you can know the storage location of the latest version of the data.

For details on how the controller 331 updates the data, which data block should be written to which data block and which data is to be paged, please refer to the descriptions of Figures 15, 16, 17A-17B, and 18. These schemas assume that the pen data A will be updated repeatedly, and that with the update of the data A, the controller 331 determines how the different versions of the data A should be stored. For the sake of explanation, the English letters and numbers are used here to represent the data and its version. For example, A1 represents the first version of Data A; A2 represents the second version of Data A, and the rest is analogous.

Please refer to Fig. 15, which is a schematic diagram of the data A1 written to the data block corresponding to the data level DG1 when the data A1 is stored. When any data is written for the first time, the controller 331 uses the data block 651 corresponding to the data level DG1. Figure 15 assumes that the material A1 is stored in the paging cluster CL1. At this time, it can be seen from the data block use table 335b that the cluster storage number P1 corresponding to the paging cluster CL1 is updated to "1". At the same time, because the other paging clusters CL2~CL64 do not store any data. Therefore, the data storage locations corresponding to the cluster numbers 2 to 64 are all "0".

In the address mapping table 335c, the storage location (P#) of each piece of data is recorded. It is assumed here that the material A is the first data in the memory array and thus corresponds to the logical address 1. In the address mapping table 335c, the data block 651 storing the material A1 and the paging cluster CL1 are recorded. As shown in Fig. 12, the data block BLKa is the data block BLK corresponding to the data level DG1. Therefore, it is assumed here that the data block 651 is the data block BLKa of FIG. 12, and the data A1 is located in the paging cluster CL1. Therefore, here (BLKa, 1) corresponds to the data A.

Referring to FIG. 16, when the data A2 is stored, the data block corresponding to the data level DG1 is no longer stored, but the data A2 is written to the data block corresponding to the data level DG2. When the controller 331 stores the data A2 in the memory array 333, since the paging cluster CL1 assigned to the material A by the data block 651 corresponding to the data level DG1 has all been used, the data layer DG2 corresponding to the data level is used instead. The data block stores the data A2.

As shown in FIG. 16, when the controller 331 writes the material A2 into the memory array 333, the data A2 is not stored in the data block 651, but the data A2 is stored in the paging cluster CL1 in the data block 652. The data is tabbed P (1, 1). At this time, since the material A has been updated from A1 to A2, the data A1 originally stored in the data block 651 has become obsolete. Therefore, in the material block use table 335b corresponding to the data block 651, the material storage position P# corresponding to the cluster number 1 is annotated as an invalid material page. Here, the cross-referenced data tab is marked as invalid. On the other hand, since the material A2 is stored in the data page P(1, 1) in the page cluster CL1 of the data block 652. Therefore, the data block corresponding to the data block 652 is updated to "1" by the data storage location P# corresponding to the cluster number 1 recorded in the table 335b.

As the data is updated, the controller 331 records the history of the storage location of the data A. Therefore, in the address mapping table 335c, the position of the data block BLK and the paging cluster CL storing the material A can be recorded by means of a linking list. As shown in Fig. 12, the data blocks BLKe, BLKf, BLKg, and BLKh belong to the data level DG2. Therefore, it can be assumed here that the data block 652 is the data block BLKe of FIG. 12, and the data A2 is located in the data page P(1, 1) of the paged cluster CL1. Therefore, here (BLKe, 1) can be updated to the chain string corresponding to the data A.

As mentioned earlier, the data page P contained in the same paged cluster CL is used to store different versions of the same data. Since the embodiment of the present disclosure assumes that in the data block BLK corresponding to the data level DG2, each paged cluster CL contains four data pages P. Therefore, after the data A2 is written into the data page P(1, 1) of the paging cluster CL1 of the data block 652, the paging cluster CL1 still has three other data pages P(2, 1), P(1, 2), P(2, 2) can be used to write other updated versions of material A.

Please refer to the figure 17A~17C, which is a schematic diagram of the data block corresponding to the data level DG2 when the data A3, A4, and A5 are stored. As previously mentioned, in the paging cluster CL1 of the data block 652, there are still three data pages available for writing to other updated versions of the material A. Therefore, the three data pages P can be used to write data A3, A4, A5, respectively. When the controller 331 stores the data A3, A4, and A5 in the memory array 333, the data block and the paging cluster corresponding to the material A are not changed. At the same time, the chain string recorded by the address mapping table 335c can remain unchanged. ,

In Fig. 17A, the controller 331 writes the material A3 to the data page P(2, 1) of the paging cluster CL1 of the data block 652 (located in the upper right corner of the paging cluster CL1). After the data A3 is written, the data A2 becomes obsolete. Therefore, the controller 331 will mark the data page P(1, 1) of the page cluster CL1 of the data block 652 originally used for storing the material A2 as an invalid material page. At this time, since the valid data A3 is stored in the data page P(2, 1), the controller 331 updates the data storage location corresponding to the cluster number 1 in the data block record table corresponding to the data block 652. It is "2".

In Fig. 17B, the controller 331 writes the material A4 to the data page P(1, 2) of the page cluster CL1 of the data block 652 (located in the lower left corner of the page cluster CL1). After the data A4 is written, the data A3 becomes obsolete. Therefore, the controller 331 will mark the data page P(2, 1) of the page cluster CL1 of the data block 652 originally used for storing the material A3 as an invalid material page. At this time, since the storage location of the valid data A4 is in the data page P(1, 2), the controller 331 sets the data storage location corresponding to the cluster number 1 in the data block record table corresponding to the data block 652. Updated to "3".

In Fig. 17C, the controller 331 writes the material A5 to the data page P(2, 2) of the paging cluster CL1 of the data block 652 (located in the lower right corner of the paging cluster CL1). After the data A5 is written, the data A4 becomes obsolete. Therefore, the controller 331 will mark the data page P(1, 1) of the page cluster CL1 of the data block 652 originally used for storing the material A4 as an invalid material page. At this time, since the storage location of the valid data A5 is in the data page P(2, 2), the controller 331 sets the data storage location corresponding to the cluster number 1 in the data block record table corresponding to the data block 652. Updated to "4".

Referring to Figure 18, when storing the sixth version of the data A, the data block corresponding to the data level DG2 is no longer stored, but the sixth version of the data A is written to the corresponding data level. Schematic diagram of the data block of DG3.

When the controller 331 writes the material A6, the paging cluster CL1 corresponding to the material A allocated by the data block 652 has all been used. According to this, the controller 331 judges that it is necessary to use the larger-page paging cluster CL to store the updated version of the material A. Therefore, the controller 331 will instead store the material A6 using the paging cluster CL of the data block 653 corresponding to the material level DG3.

As shown in FIG. 18, when the controller 331 stores the data A6 in the memory array 333, the data A6 is not stored in the data block 652, but the data A6 is stored in the data block 653. At this time, since the data A has been updated from A5 to A6, the originally stored data A5 becomes obsolete. Therefore, the data page P(2, 2) of the paged cluster CL2 of the data block 652 for storing the material A5 is marked as invalid by the controller 331.

As a result, when the controller 331 stores the data A6, all the data pages in the paging cluster CL1 of the data block 652 have all been marked as invalid. Therefore, in the data block use table 335b corresponding to the data block 652, the data storage location corresponding to the cluster number 1 will be marked as null. The data page cannot be used here with a cross. On the other hand, since the material A6 is stored in the data page P(1, 1) in the paging cluster CL1 of the data block 653. Therefore, in the data block use table 335b corresponding to the data block 653, the data storage location corresponding to the cluster number 1 is updated to "1".

As can be seen from the foregoing description, in FIG. 16, the controller 331 no longer stores the data A2 in the data block 651, but stores the data A2 in the data block 652; and, in FIG. 18, the control The device 331 no longer stores the data A6 in the data block 652, but stores the data A2 in the data block 653. The data level G2 corresponding to the data block 652 is higher than the data level G1 corresponding to the data block, and the data level G3 corresponding to the data block 653 is higher than the data level G2 corresponding to the data block. As the data block changes, the number of data pages included in the data paging cluster for storing data also increases. Therefore, the present disclosure defines such a process of replacing a stored data block as a data upgrade process. The occurrence of such an upgrade process is based on the continuous updating of information.

Incidentally, as the data is upgraded, the data level DG corresponding to the data block of the stored data is continuously improved. At the same time as converting the data block of the stored data, all the data pages in the paging cluster corresponding to the data are also marked as invalid in the data block in which the stale data is originally stored. For the data paging in the paging cluster generated by the data upgrade, the controller 331 can clear the data and provide it to other materials for use.

To this end, the controller 331 of the present disclosure can also provide a delete function to the control firmware layer 3313. This delete feature can be used to clean up obsolete data for a specific paging cluster. When a piece of material is upgraded, the controller 331 can perform a delete operation at the same time, thereby emptying the paged clusters in the lower layer of the data block for subsequent use. Alternatively, the controller 331 may first record the paging clusters that can be deleted because of the data upgrade, and perform the deletion operation when the memory device 30 is relatively idle. It can be seen that when the controller 331 provides the erasing function, the management of various data paging can be more flexible.

As described above, the embodiment of the present disclosure changes the data level DG corresponding to the data block corresponding to the written data as the version of the data changes. Next, the examples of Figs. 15, 16, 17A-17B, and 18 are summarized in the form of a flowchart.

Please refer to FIG. 19, which is a flow chart of changing the data level DG corresponding to the data block corresponding to the written data as the version of the data changes. After the controller 331 receives a piece of data from the main control unit 31, the controller 331 first determines whether the pen data is the first write (step S601). If so, the controller 331 executes the first write process S603). The step S603 further includes the steps of: storing the data to the unused paging cluster CL in the data block BLK corresponding to the data level DG1 (step S603a); and storing the data storage location in the address translation table (step S603b) ). Thereafter, the controller 331 must synchronously update the data block use table corresponding to the data block to be written (step S607).

On the other hand, if the controller 331 determines that the pen data is not written for the first time, the data update program is executed (step S605). Next, the controller 331 obtains the location of the obsolete data previously stored for the pen data from the cache memory 335, and includes the data block BLK, the cluster CL#, and the data storage location P# (S605a). Thereafter, the controller 331 can determine, according to the data block usage table provided by the cache memory 335, whether there is still available data paging in the paging cluster for storing the stale data (step S605b).

If the result of the determination in the step S605b is affirmative, the controller 331 writes the update data to another material page in the same paging cluster in the same data block as the obsolete material (step S605c). On the other hand, if there is no empty data page in the previously allocated paging cluster to store the updated data, the controller 331 writes the updated data to the first in the paging cluster in the data block corresponding to the higher data level DG. The data is paged (step S605d). Next, the controller 331 updates the address mapping table (step S605e) and marks the data page originally used for storing the stale data as an invalid material page (step S605f). Further, the controller 331 must also update the contents of the material block use table 335b (step S607).

In conclusion, the embodiments of the present disclosure can upgrade the data level of the data as the data is updated. That is, the data block corresponding to the higher data level is dynamically used. In addition to the foregoing data upgrade, the embodiment of the present disclosure may also downgrade the data level corresponding to the data. That is to say, the data and its corresponding level can be dynamically adjusted according to the attributes of the data or actual needs. Next, the concept of dynamically adjusting the data level corresponding to the data block used when storing the data will be described in FIG.

Please refer to FIG. 20, which is a schematic diagram of the data level DG of the paging cluster corresponding to the data dynamically adjusted according to the state of the data when the data is stored. In the embodiment of the disclosure, the data level of the data block may be the data level DG1, the data level DG2, or the data level DG3. As the data is written, the heat of the representative data gradually increases. If the heat of the data is higher than the originally classified data level DG, the controller 331 divides the data block corresponding to the higher data level DG into the data.

On the other hand, after a period of time, the controller 331 will judge whether the heat of the data is still maintained. That is, it is judged whether or not the data level DG previously provided for the data heat is suitable for the use of the data. If the heat of the data has been reduced, it means that the data no longer needs such a large storage space. Therefore, if the heat of the data is reduced, the controller 331 can store the updated data by using a paged cluster containing a smaller number of data pages. That is, the controller 331 can provide a downgrade practice. For example, the data originally divided into data blocks using the data level DG3 is changed to the data block corresponding to the data level DG2. Alternatively, the data block originally planned to use the data level DG2 is changed to the data block corresponding to the data level DG1.

The method of adjusting the data level DG corresponding to the data in response to the change in the heat of the data can be implemented when the controller 331 performs garbage collection. The controller 331 can perform upgrade adjustment, degradation adjustment, or parallel adjustment between the same level for the data level DG corresponding to the data. Hereinafter, the method of adjusting the data level DG corresponding to the data by the controller 331 will be described with reference to Figs. 21 to 31C.

Please refer to Fig. 21, which is a flow chart of adjusting the data level DG corresponding to the data in response to the heat of the data when performing garbage collection. First, the controller 331 selects, from the memory array 333, a data block (a data block BLKgc to be garbage collected) to be used for garbage collection (step S71). Then, the data stored in the data block BLKgc to be garbage collected is judged, and the data level corresponding to the data is adjusted according to the judgment result of the data heat (step S73); and the garbage disposal is performed. The data block BLKgc performs an erase operation (step S75). The adjustment of the data level described in step S73 can be implemented through different definition methods and determination processes.

In the following, the 22A and 22B are diagrams, the controller 331 can select one or more data blocks BLKgc to be garbage collected, and the 23th to 31C diagrams further mention two types of adjustment methods that can be used to adjust the data level, but In actual application, it is not limited to this.

As shown in Fig. 22A, only one data block is selected as the data block BLKgc to be garbage collected. First, the data block having the most information page that is marked as invalid is found (step S711a). Next, the controller 331 determines whether only one of the data blocks has the data block of the data page which is marked as invalid at most (step S711b). If only one data block has the data page marked as invalid at most, the data block satisfying the condition is regarded as the data block BLKgc to be garbage collected (step S711d).

On the other hand, if the result of the determination in step S711b is that a plurality of data blocks also have the most invalid data page, the controller 331 selects the data block with the corresponding data level DG higher among the data blocks. As the selected data block (step S711c).

In step S711c, the controller 331 selects the data block having a higher data level DG as the garbage collection data block, because each paged cluster contains data pages that are different versions of the same data. The data block with a higher data level DG contains fewer paging clusters. Since each paged cluster corresponds to a piece of data, and the number of paged clusters is small, the amount of valid data stored is relatively small. Therefore, if the data block with a higher data level DG is erased, the amount of data to be backed up to other data blocks is relatively small.

Figure 22B shows that multiple data blocks are selected as the data blocks to be garbage collected. In Fig. 22B, the threshold Npgth_blk is used directly to determine whether the number of invalid data pages in the data block has exceeded the threshold Npgth_blk by the data index in a data block (step S715a). If so, the controller 331 treats all the data blocks that meet the judgment condition as the data block BLKgc to be garbage collected. If the result of the determination in step S715a is negative, it means that the adjustment of the data level is not required, and the flow ends.

In actual application, the controller 331 can also dynamically select the data block BLKgc to be garbage collected by using the 22A map or the 22B map depending on the use state of the memory array. For example, although the controller 331 presets to select the data block BLKgc to be garbage collected using FIG. 22A, when the memory device 30 is relatively idle, the controller 331 changes the data to be garbage collected in the 22B chart. Block BLKgc. In addition, the manner in which the controller 331 selects the data block BLKgc to be garbage collected is not limited to the 22A and 22B drawings.

Regardless of whether it is the 22A map or the 22B graph, when the controller 331 selects the data block BLKgc to be garbage collected, it is necessary to further determine how the data stored in the data block BLKgc to be garbage collected should be adjusted in the data level DG. . Then, taking a data block containing four data and corresponding to the data level DG3 as an example, how to adjust the data level DG corresponding to the internal data when the garbage recovery data block BLKgc is garbage collected.

Please refer to Fig. 23, which is a schematic diagram of a data block containing four pieces of data and corresponding to the data level DG3. This figure takes a data block corresponding to the third data level as an example to illustrate the distribution of four data in four paging clusters CL1~CL4.

In the pagination cluster CL1, the obsolete data X6~X13 of the material X and the update data X14 are stored. In the pagination cluster CL2, the obsolete data X6~Y7 of the material X and the update data Y8 are stored. In the paging cluster CL3, the obsolete data A6~A16 of the data A and the updated data A17 are stored. In the paging cluster CL4, the obsolete data D6~D8 of the data D and the updated data D9 are stored. Hereinafter, using the 24th, 25th, 25th, and 26th drawings, a method of determining how to adjust the data level G1 to which the data belongs by using a threshold value, and using the 29th, 30A, 30B, 30C, 31A, 31B, Figure 31C illustrates another approach that uses two thresholds to determine how the data level G1 to which the data belongs should be adjusted.

Please refer to Fig. 24, which is a flow chart for determining how to adjust the data level DG corresponding to the data when the data block is garbage collected with a preset threshold. This flow chart illustrates how the controller 331 uses only one threshold comparison and decides whether to downgrade the data.

First, in the data block BLKgc to be garbage collected, one paging cluster CL is selected for inspection (step S731a). The controller 331 will judge whether or not the number of data pages that have been used in the paged cluster CL is smaller than the threshold value defined for the material level DG corresponding to the paged cluster (step S731b).

If in the paging cluster CL, the number of data pages that have been used is indeed less than the threshold defined for the data level DG corresponding to the cluster, the controller 331 will regard the data stored in the paging cluster to be relatively low. . Accordingly, the controller 331 determines that the data level DG currently used is no longer needed. In addition, the controller 331 copies the latest version of the data to the paging cluster in the data block corresponding to the lower one data level DG (step S731c). That is, the data is downgraded.

On the other hand, if in the paging cluster CL, the number of data pages that have been used is greater than or equal to the threshold defined for the data level DG corresponding to the cluster, the controller 331 will regard the data of the paging cluster CL as being present. The heat is in line with expectations. That is, the controller 331 judges that the data of the pen does need to use the data level DG currently used for the plan. In addition, the controller 331 copies the latest version of the data to other data blocks corresponding to the same data level DG (step S731d). That is, the data is adjusted for translation.

Next, the controller 331 determines whether each of the paging clusters in the data block BLKgc to be garbage collected has been subjected to the foregoing flow of comparison with the threshold value and copying to other material blocks (step S731e). If not, the controller 331 will select another paged cluster CL and repeat execution from step S731a.

If each of the paging clusters in the data block BLKgc to be garbage collected is subjected to the determination process in steps S731a to 731e, the garbage collection processing of the data block is ended. Next, it is judged whether or not there is another garbage collection data block BLKgc (step S731f). If no, the process ends. If so, another data block BLKgc to be garbage collected is selected (step S731g), and the foregoing flow is repeated.

Please refer to Figure 25A, which is a schematic diagram of a preset threshold for the data level corresponding to the garbage collection data block BLKgc. This schema defines a threshold percentage (eg, 50%) for the paged cluster 744 of the data level DG2. Therefore, the controller 331 can calculate the threshold value Th according to Npg_cl*50%, and compare the threshold value Th with the number of data page usages in the paged cluster in the data block BLKgc to be garbage collected. As mentioned before, this paper assumes that the paging cluster corresponding to the data level DG2 contains 16 data pages (Npg_cl=16). Therefore, if the data block corresponding to the data level DG2 is selected as the garbage collection data block BLKgc, the controller 331 respectively maps the four paged clusters included in the garbage collection data block BLKgc to the 25A map. The defined thresholds (for example: 8 data pages) are compared.

In practical applications, the selection of the threshold is not limited to Npg_cl *50%. In addition, for other data level DGs, the corresponding threshold can also be set. Furthermore, the thresholds defined for each data level DG may also be different.

Please refer to Figure 25B, which is a schematic diagram comparing the heat of data in the data block to be garbage collected with a preset threshold. This pattern is a threshold defined in Figure 25A and compared to each paged cluster in Figure 23.

In Fig. 25B, the controller 331 compares with the paging clusters CL1, CL2, CL3, CL4 using the threshold value Th, respectively. Here, when compared with the paging cluster CL1, the controller 331 confirms that the storage location of the material X14 has exceeded the threshold value Th. Therefore, the controller 331 judges that the data X belongs to the data with higher heat, and it is necessary to use the data block corresponding to the data level DG to store the data X14 and the subsequent updated version of the data X.

For paged cluster CL2, the storage location of data Y8 is below the threshold. Therefore, the controller 331 determines that the heat of the material Y is relatively low. Accordingly, the controller 331 determines that the paged cluster of the lower data level DG should be used to store the data Y8 and subsequent updated versions of the material Y.

For the paging cluster CL3, the storage location of the data A17 is higher than the threshold. Therefore, the heat of the data A is relatively high. Accordingly, the controller 331 determines that the paged cluster storage material A17 of the data layer level DG3 and the subsequent update version of the material A should be maintained.

For paged cluster CL4, the storage location of data D9 is below the threshold. Therefore, the heat of the data D is relatively low. Accordingly, the controller 331 determines that the paged cluster of the lower data level DG should be used to store the material D9 and subsequent updated versions of the material D. Next, the description will be given of the practice in which the controller 331 writes data to other paging clusters in accordance with the foregoing judgment result.

Please refer to Figure 26, which is a schematic diagram of copying the data in the data block for garbage collection to the data block of the same data level DG. As described above, after the comparison of FIG. 25B, the controller 331 judges that the update frequency of the material X and the data A is high. Therefore, the controller 331 will maintain the paging cluster of the usage data level DG3 to store the data X and the data A. Therefore, the controller 331 copies the material X14 and the data A17 into the data block 713 which is also the data level DG. It is assumed here that the material X14 is stored in the paging cluster CL1 of the data block 713; and the material A17 is stored in the paging cluster CL2 of the data block 713.

Please refer to Figure 27, which is a schematic diagram of copying the data in the data block for garbage collection to the data block of the lower data level DG. As described above, after the comparison of FIG. 25B, the controller 331 judges that the update frequency of the material Y and the data D is low. Therefore, the controller 331 stores the material Y and the data D using the paging cluster of the lower data level DG. Therefore, the controller 331 copies the material Y8 and the material D9 into the data block 712 of the lower data level DG. It is assumed here that the material Y8 is stored in the paging cluster CL1 of the data block 712; and the data D9 is stored in the paging cluster CL2 of the data block 712.

Please refer to Figures 28A and 28B, which are schematic diagrams of erasing data blocks for garbage collection. After the data of the data block 703 is copied to the data blocks 713, 712, the data pages of the data block 703 are all marked as invalid data pages (as shown in FIG. 28A). In addition, the controller 331 can erase the data block 703 (as shown in FIG. 28B).

Please refer to Fig. 29, which is a flow chart for determining how to adjust the data level DG corresponding to the data when the data block is garbage collected with two preset thresholds. This flow chart shows how to use only two threshold comparisons and decides that the data should be downgraded, upgraded, or maintained at the same data level DG.

In the data block BLKgc to be garbage collected, the controller 331 selects a paged cluster for inspection (step S735a). The controller 331 determines whether the number of data pages that have been used in the paged cluster is smaller than the lower threshold Th_L defined for the data level DG corresponding to the paged cluster (step S735b).

If, in the paged cluster, the number of data pages that have been used is indeed less than the lower threshold Th_L defined for the data level DG corresponding to the cluster, the controller 331 will consider the presence of the paged cluster to be relatively low. . Accordingly, the controller 331 determines that the data level DG currently used is no longer needed. In addition, the controller 331 copies the latest version of the data to the paging cluster in the data block corresponding to the lower one data level DG (step S735c).

On the other hand, if in the paging cluster, the number of data pages that have been used is greater than or equal to the lower threshold Th_L defined for the data level DG corresponding to the cluster, the controller 331 will further increase the threshold. Th_H is compared to the paging cluster (step S735d). If the data stored in the paging cluster is lower than the higher threshold Th_H, it means that the data stored in the paging cluster is in line with expectations. That is, the controller 331 judges that the data of the pen does need to use the data level DG currently used for the plan. In addition, the controller 331 copies the latest version of the data to other data blocks corresponding to the same data level DG (step S735e).

Furthermore, if the number of data pages that have been used in the paging cluster is greater than or equal to the higher threshold Th_H defined for the data level DG corresponding to the cluster, the data stored in the paging cluster is higher than expected. . That is, the controller 331 determines that the pen data requires a higher data level DG. In addition, the controller 331 copies the latest version of the data to another data block corresponding to the higher one of the data levels DG (step S735f).

Next, it is judged whether or not each of the paging clusters in the data block BLKgc to be garbage collected has performed the above-described flow of comparison with the threshold value and copying to other data blocks (step S735g). If not, another paging cluster is selected and the foregoing steps are repeated from step S735a.

If each of the paging clusters in the garbage collection data block BLKgc passes through the judgment flow, the controller 331 ends the garbage collection judgment of the data block. Next, the controller 331 will judge whether there are other pieces of garbage collection data to be garbageed (step S735h). If no, the process ends. If so, the controller 331 will select another data block BLKgc to be garbage collected (step S735i), and repeat the foregoing flow.

Please refer to Figures 30A and 30B for a schematic diagram of two preset thresholds for the data block for garbage collection. Figures 30A and 30B define a lower threshold Th_L (for example: Npg_cl *25%) and a higher threshold Th_H (for example, Npg_cl *75%) for the paging clusters 751a, 751b of the data level DG2, respectively. ). As mentioned earlier, this paper assumes that the paging cluster of data level DG2 contains 16 data pages (Npg_cl=16). Therefore, if the data block corresponding to the data level DG2 is selected as the garbage collection data block, the controller 331 determines the lower threshold defined by the 30A picture for the four paging clusters included in the data block respectively. Values (for example: 4 data pages) are compared and higher thresholds defined in Figure 30B (for example: 12 data pages).

According to this, in another data block BLKgc to be garbage collected, when the data storage location in a paging cluster is lower than the lower threshold Th_L, the controller 331 changes the paging cluster for storing the data. Corresponding to the paging cluster of the lower data level DG; when the data storage location in a paging cluster is higher than or equal to the lower threshold Th_L and simultaneously lower than the higher threshold Th_H, the controller 331 will page the paging The data stored in the cluster for maintaining the paging hierarchy corresponding to the same data level DG; or, when the data storage location in a paging cluster is higher than or equal to the higher threshold Th_H, the controller 331 uses the paging cluster The stored data is changed to a paged cluster corresponding to a higher data level DG.

In practical applications, the selection of the lower threshold is not limited to Npg_cl *25%, and the selection of the higher threshold is not limited to Npg_cl*75%. In addition, for other data level DGs, the corresponding threshold can also be set. Furthermore, the thresholds defined for each data level DG may also be different.

Please refer to Figure 30C, which is a schematic diagram comparing the heat of data in the data block to be garbage collected with two preset thresholds. This graph is compared with the lower threshold Th_L defined by the 30A, 30B map and the higher threshold Th_H, with each paged cluster of FIG.

In Fig. 30C, the controller 331 compares with the higher threshold Th_H and the paged clusters CL1, CL2, CL3, CL4 using the lower threshold Th_L. Among them, for the paging cluster CL1, the storage location of the data X14 has passed the lower threshold Th_H and is lower than the higher threshold Th_H. Therefore, the heat of the data X roughly conforms to the data level DG of the current paged cluster, and the controller 331 maintains the data block X14 of the data level DG3 and the subsequent updated version of the data X.

For the paging cluster CL2, the storage location of the material Y8 is lower than the lower threshold Th_L. Therefore, the heat of the data Y is relatively low. Accordingly, the controller 331 can use the paged cluster of the lower data level DG to store the material Y8 and subsequent updated versions of the material Y.

For the paging cluster CL3, the storage location of the data A17 is equal to the higher threshold Th_H. Therefore, the heat of the data A is higher. Accordingly, the controller 331 instead uses the paged cluster of the fourth data level DG to store the data A17 and subsequent updated versions of the material A.

For paged cluster CL4, the storage location of data D9 is equal to the lower threshold. Therefore, the heat of the data D is roughly in line with the current data level DG. Accordingly, the controller 331 maintains a paged cluster using the same data level DG, storing the data D9 and subsequent updated versions of the material D.

Please refer to Figure 31A, which is a schematic diagram of copying the data in the data block for garbage collection to the data block of the lower data level DG. As described above, after the comparison of the 30Cth chart, the controller 331 judges that the update frequency of the material Y is low. Therefore, the data level DG of the paged cluster stored with the material X and the data Y can be reduced. Therefore, the material Y8 is copied to the data block 752 of the data level DG2. It is assumed here that the material Y8 is stored in the paging cluster CL1 of the data block 752.

Please refer to Fig. 31B, which is a schematic diagram of copying the data in the data block for garbage collection to the data block of the higher data level DG. As described above, after the comparison of the 30Cth chart, the controller 331 judges that the update frequency of the material A is high. Therefore, a paged cluster using a higher data level DG must be used to store data A. Therefore, the controller 331 copies the material A17 into the data block 754 corresponding to the fourth data level DG. It is assumed here that the material X14 is stored in the paging cluster CL1 of the data block 753.

Please refer to Figure 31C, which is a schematic diagram of copying the data in the data block for garbage collection to the data block of the same data level DG. As described above, after the comparison of the 30C chart, it is judged that the update frequency of the data X and the data D substantially conforms to the data level DG of the currently planned paging cluster. Therefore, the controller 331 maintains the paging cluster of the data hierarchy DG3 to store the data X and the data D. Therefore, the controller 331 copies the material X14 and the data D9 into the data block 753 which is also the data level DG3. It is assumed here that the material X14 is stored in the paging cluster CL1 of the data block 713; and the data D9 is stored in the paging cluster CL2 of the data block 753.

In the foregoing examples, the use cases of paging clusters with one threshold and two thresholds are respectively described. It should also be noted that, in actual application, the selection of the threshold value, the number of threshold values, and how to adjust the data level corresponding to the data for the comparison of the threshold values are not limited to the examples here. .

In addition to the level adjustment for the data storage location, in order to reduce the interference phenomenon that may occur on the adjacent data paging when re-programming the adjacent data pages, the disclosure further proposes a checkerboard management method for the memory block. The practice of writing state of paged clusters.

The embodiment of the present disclosure sets a plurality of paging clusters included in the data block, one part is preset to the on state CLon, and the other part is preset to the off state CLoff. The paged clusters preset to the on state CLon and the off state CLoff are interleaved in the data block. When the controller 331 writes data, only the data is written for the paged cluster of the ON state CLon. Because the paging clusters preset to the on state CLon and the off state CLoff are interleaved in the data block, when the data is written to the respective paging clusters of the preset ON state CLon, the data is not generated. Paging is reprogrammed, which in turn causes the data of other data to be interfered.

Thereafter, after the paging clusters to be preset to the ON state CLon have been used for writing data, the controller 331 dynamically selects whether the data paging is used according to the paging clusters in which the presets are the ON state CLon. It is possible to change the usage status of the paging cluster that was originally set to the off state CLoff.

Please refer to the figure 32A, 32B, which is a schematic diagram of the use state of the paging cluster for the data block of the data level DG3 in a checkerboard configuration manner. As previously mentioned, the data block 80 corresponding to the data level DG3 contains four paged clusters CL1, CL2, CL3, CL4.

The 32A diagram assumes that the paging clusters CL1, CL4 are preset to the off state CLoff; and, the paging clusters CL2, CL3 are preset to the on state CLon. Since the paging clusters CL1 and CL4 are preset to the OFF state CLoff, in the data block correspondence table, the data storage locations corresponding to the paging clusters CL1 and CL4 are indicated by crosses. On the other hand, for the paging clusters CL2 and CL3 which are preset to the ON state CLon, the data storage locations corresponding to the cluster numbers 2 and 3 are indicated as "0". Therefore, the memory controller will preferentially use the data of the paging clusters CL2 and CL3 to page the data, and it is necessary to determine whether the paging clusters CL1 and CL4 can be preset after the paging clusters CL2 and CL3 have been used for storing data. The state CLoff is turned off and turned to the on state CLon.

Fig. 32B assumes that the paging clusters CL1, CL4 are preset to the on state CLon; and, the paging clusters CL2, CL3 are preset to the off state CLoff. Since the paging clusters CL2 and CL3 are preset to the OFF state CLoff, in the data block correspondence table, the data storage locations corresponding to the paging clusters CL2 and CL3 are indicated by crosses. On the other hand, for the paging clusters CL1 and CL4 which are preset to the ON state CLon, the data storage locations corresponding to the cluster numbers 1 and 4 are indicated as "0". Therefore, the memory controller will preferentially use the data of the paging clusters CL1 and CL4 to page the data, and it is necessary to determine whether the paging clusters CL2 and CL3 can be preset after the paging clusters CL1 and CL4 have been used for storing data. The state CLoff is turned off and turned to the on state CLon.

See Figure 33, which is a flow chart for how the paging cluster of the checkerboard configuration decides to write the data page.

First, the controller 331 presets a part of the paging cluster as the paging cluster CLon of the ON state CLon according to the position of the paging cluster CL in the data block BLK, and presets the pagination cluster of the other section to the pagination cluster CLoff of the OFF state CLoff. (Step S81). Next, as the data is written, the controller 331 dynamically adjusts the state of the paged cluster (step S83). Among them, step S83 will be repeated.

Step S83 further includes the following steps. First, the controller 331 automatically controls the device 31 to receive a piece of data (step S831), and judges whether or not the pen data is new data (step S832). If the result of the determination in step S832 is negative, it means that the paged cluster corresponding to the pen data has been previously allocated. Therefore, the data is written into the paging cluster corresponding to which it was previously allocated (step S838), and the controller 331 determines whether there is any paging cluster preset to the closed state CLoff according to the writing position of the material because the writing of the data is written. Into the open state CLon. In other words, the controller 331 dynamically determines whether the state of the paged cluster should be adjusted as the data is written (step S839). Figure 37 will further illustrate the relevant details of step S839.

If the result of the determination in step S832 is affirmative, it means that a paged cluster needs to be allocated for storing each version of the piece of data. At this time, the controller 331 judges whether or not there is a paging cluster set to the ON state CLon for writing data (step S833). If so, the pen data is written using the paged cluster set to the ON state CLon (step S834). On the other hand, it is necessary to confirm whether or not there is a paging cluster originally scheduled to be in the OFF state CLoff, whether or not the paging condition converted to the ON state CLon is met (step S835).

If the result of the determination in step S835 is that no paging cluster can be switched from the off state CLoff to the on state CLon. Then, the controller 331 will determine that the data block currently has no suitable paging cluster for storing the data. Therefore, the controller 331 stores the pen data in other data blocks (step S837).

On the other hand, if the result of the determination in step S835 is that there is indeed a paging cluster that has met the ON condition, and can be switched from the OFF state CLoff to the ON state CLon. Then, the controller 331 stores the page bundle in the page transition converted to the on state CLon into the pen data (step S836).

In the above disclosure, the paging cluster in the data block can be divided into two parts, wherein a part of the paging cluster is preset to the on state CLon, and the other part of the paging cluster is preset to the off state CLoff. When storing the data, the controller 331 preferentially uses the paging cluster preset to the ON state CLon to store the data, and after the paging clusters that are preset to the ON state CLon are used, gradually determine that the original is turned off according to the ON condition. Whether CLoff's paging cluster can be used to store data. Regarding the determination as to which opening condition the paging cluster originally set to the OFF state CLoff is based on, and under what circumstances, the details of the opening condition are determined, as will be further explained below.

See Figure 34, which is a flow diagram of the paged cluster of the checkerboard configuration as shown in Figure 34 for the memory control plan. This figure is an example of the step S81 of Fig. 33. First, i = 1, j = 1 is set (step S901). Next, i%2 and j%2 are calculated (step S903). Then, based on the different results of i%2 and j%2, it is determined that the paging cluster CL should be preset to the on state CLon or the off state CLoff.

If i%2=1 and j%2=1, the paged cluster CL(i, j) is set to the on state (step S905a). If i%2=0 and j%2=1, the paged cluster CL(i, j) is set to the off state CLoff step S905b). If i%2=1 and j%2=0, the paged cluster CL(i, j) is set to the off state CLoff (step S905c). If i%2 = 0 and j%2 = 0, the paged cluster CL(i, j) is set to the on state CLon (step S905d).

Next, it is judged whether or not i is equal to Ig (step S907). If not, i is accumulated (step S909), and the execution from step S903 is repeated. If i is equal to Ig, it is judged whether or not j is equal to Jg (step S911). If not, i=1 is set and j is accumulated (step S913). If j = Jg, the flow of determining the preset state of the paging cluster CL ends.

For the data block corresponding to the data level DG2, if the resource status of the paging cluster is determined according to this flowchart, the generated checkerboard configuration is as shown in FIG. For the data block of the data level DG2, Ig=I2=4, Jg=J2=4, Og=O2=2, Pg=P2=2.

Referring to FIG. 35, a schematic diagram of a paging cluster of a checkerboard configuration is illustrated by taking a data block corresponding to the data level DG2 as an example. Figure 35 shows the position of the paging cluster CL in the data block BLK with CL(i, j). Among them, each paged cluster CL contains data pages arranged in Og rows and Pg columns. Here, the fine-grained net bottom also represents the paging cluster CL which is set to the OFF state CLoff; and the blank square represents the paging cluster CL which is preset to the ON state CLon.

Step S905a of Fig. 34 corresponds to a paged cluster of odd rows located in the first column or the third column in this figure, for example, paged clusters CL(1, 1), CL(3, 1), CL(1) , 3), CL (3, 3). Therefore, the page clusters CL(1, 1), CL(3, 1), CL(1, 3), CL(3, 3) of Fig. 35 are preset to the on state CLon.

Step S905b of Fig. 34 corresponds to a paged cluster of even-numbered rows in the first column or the third column in this figure, for example, paging clusters CL(2, 1), CL(4, 1), CL(2) , 3), CL (4, 3). Therefore, the page clusters CL(2, 1), CL(4, 1), CL(2, 3), CL(4, 3) of Fig. 35 are preset to the off state CLoff.

Step S905 of Fig. 34 corresponds to a paged cluster of odd rows located in the second column or the fourth column in this figure, for example, paged clusters CL(1, 2), CL(3, 2), CL(1) , 4), CL (3, 4). Therefore, the page clusters CL(1, 2), CL(3, 2), CL(1, 4), CL(3, 4) of Fig. 35 are preset to the off state CLoff.

Step S905b of Fig. 34 corresponds to a paged cluster of even rows located in the second column or the fourth column in this figure, for example, paged clusters CL(2, 2), CL(4, 2), CL(2) , 4), CL (4, 4). Therefore, the page clusters CL(2, 2), CL(4, 2), CL(2, 4), CL(4, 4) of Fig. 35 are preset to the on state CLon.

Please refer to Fig. 36, which is a schematic diagram of how the paging cluster originally set to the closed state CLoff should judge the use state of the adjacent paging clusters and then change from the closed state CLoff to the open state CLon when the checkerboard configuration is adopted. The center of this graph is the paging cluster CL(i, j) of the state to be judged, where i and j respectively represent the position of the paging cluster to be judged in the row direction of the data block and the position of the column direction. As mentioned above, when judging whether a paging cluster can be turned on, it is necessary to regard whether the adjacent data paging has been written. With the difference in the top, bottom, left, and right sides of the paging cluster, and the adjacent paging clusters, the positions of the data pages to be used for judgment are not completely the same.

When judging whether the paging cluster CL(i, j) can be turned on, it must be judged in the data pagination of the pagination cluster above, below, to the left, and right of the pagination cluster CL(i, j), and the pagination cluster CL(i, j) Whether the adjacent data page has been marked as invalid. Wherein, the paging cluster CL(i, j) is above the paging cluster CL(i, j-1); the paging cluster CL(i, j) is the paging cluster CL(i, j+1); the paging cluster CL ( The left side of i, j) is the paging cluster CL(i-1, j); and the right side of the paging cluster CL(i, j) is the paging cluster CL(i+1, j).

In judging the paging cluster CL(i, j-1), whether the data page adjacent to the paging cluster CL(i, j) has been stored in the data is equivalent to judging in the paging cluster CL(i, j-1), Whether the data pages in the last column have been written. In addition, because the disclosure uses the left-to-right, top-down order to write data into the data page, only the data page P(Og, Pg) of the paged cluster CL(i, j-1) has been marked. If it is invalid, it means that the data page adjacent to the top of the paging cluster CL(i, j) has been marked as invalid.

In judging whether the paged cluster CL(i, j+1), the data page adjacent to the paged cluster CL(i, j) has been marked as invalid, is equivalent to being judged in the paged cluster CL(i, j-1) Whether the data page in the first column is marked as invalid. In addition, because the disclosure uses the left-to-right, top-down order to write data into the data page, only the data page P(Og, 1) of the paged cluster CL(i, j+1) has been marked. When invalid, the data pages that are adjacent to the lower side of the paging cluster CL(i, j) have been marked as invalid.

In judging whether the paged cluster CL(i-1, j), the data page adjacent to the paged cluster CL(i, j) has been marked as invalid, is equivalent to being judged in the paged cluster CL(i, j-1) Whether the data pages located in the Pg line have been marked as invalid. In addition, because the disclosure uses the left-to-right, top-down order to write data into the data page, only the data page P(Og, Pg) of the paged cluster CL(i, j-1) has been marked. When invalid, the controller 331 can collectively confirm that the data pages adjacent to the left side of the paged cluster CL(i, j) are used.

In judging whether the paged cluster CL(i+1, j), the data page adjacent to the paged cluster CL(i, j) has been marked as invalid, is equivalent to being judged in the paged cluster CL(i+1, j) Whether the data pages in the first line have been marked as invalid. In addition, because the disclosure uses the left-to-right, top-down order to write data into the data page, only the data page P(1, Pg) of the paged cluster CL(i, j+1) has been marked. When invalid, the data pages that are adjacent to the right side of the paging cluster CL(i, j) have been marked as invalid.

In the above, the opening condition of the paging cluster CL(i, j) includes the following four judgment conditions: one is to determine whether the data page P(Og, Pg) of the paged cluster CL(i, j-1) has been marked as Invalid; the second is to determine whether the data page P(Og, 1) of the paged cluster CL(i, j+1) has been marked as invalid; the third is to judge the page split cluster CL(i-1, j) Whether the data page P(Og, Pg) has been marked as invalid; the fourth is to determine whether the data page P(1, Pg) of the paged cluster CL(i+1, j) has been marked as invalid. When the controller 331 judges that the four determination conditions are all affirmative, it is confirmed that the open condition has been established. According to this, the controller 331 can convert the paging cluster CL(i, j) that conforms to the ON condition from the OFF state CLoff to the ON state CLon.

For the paging cluster CL which is originally the off state CLoff, depending on the location of the data block, the position of the adjacent paging cluster CL to be determined is also different. It is further summarized below how to determine whether the paging cluster CL set to the off state CLoff can be turned into the on state CLon according to the position of the paging cluster in the data block. Where Ig and Jg respectively represent the number of paging clusters wrapped in the row direction and the column direction of the data block. Therefore, the values of Ig and Jg are different depending on the level of the data. Where g is the data level DG.

First, if the paging cluster CL(i, j) is located in the first row and the first column (upper left corner) of the data block, i=1, j=1 (ie, the paging cluster CL(1, 1)). At this time, the controller 331 needs to judge the paging cluster CL(2, 1) located on the right side of the paging cluster CL(i, j), and the paging cluster CL(1, 2) located below the paging cluster CL(i, j). The use of data pagination.

If the paging cluster CL(i, j) is located in the first column of the data block, and the non-first row is not the location of the Ig row, j=1 (ie, the paging cluster CL(1, Jg)). At this time, the controller 331 needs to judge the paging cluster CL(i-1, 1) located on the left side of the paging cluster CL(i, j) and the paging cluster CL (i+1, 1 located on the right side of the paging cluster CL(i, j). The data paging use case contained in the paging cluster CL(i, 2) located below the paging cluster CL(i, j).

If the paging cluster CL(i, j) is located in the Ig row and the first column (upper right corner) of the data block, i=Ig, j=1 (ie, paging cluster CL(Ig, 1)). At this time, the controller 331 needs to judge the paging cluster CL (Ig-1, 1) located on the left side of the paging cluster CL(i, j) and the paging cluster CL (Ig, 2) located below the paging cluster CL(i, j). The use of the included data pagination.

If the paging cluster CL(i, j) is located in the first row of the data block, and the non-first column is not the position of the Jg column, i=1, j≠1, j≠Ig (ie, paging cluster CL ( 1, j)). At this time, the controller 331 needs to judge the paging cluster CL(1, j-1) located above the paging cluster CL(i, j), and the paging cluster CL(2, j) located to the right of the paging cluster CL(i, j), And the data paging use case of the paging cluster CL(1, j+1) located under the paging cluster CL(i, j).

If the paging cluster CL(i, j) is located at a position other than the first row, the non-Ig row, the non-first column, or the Jg column in the data block, the controller 331 needs to judge that the paging cluster CL(i, j) is located. The pagination cluster CL(i, j-1) above, the pagination cluster CL(i, j+1) located below the pagination cluster CL(i, j), and the pagination cluster CL located to the left of the pagination cluster CL(i, j) (i-1, j), the use of data pagination contained in the pagination cluster CL(i+1, j) to the right of the pagination cluster CL(i, j).

If the paging cluster CL(i, j) is located in the Ig row of the data block, and the non-first column is not the position of the Jg column, i=Ig, j≠1, j≠Jg (ie, paging cluster CL ( Ig, j)). At this time, the controller 331 needs to judge the paging cluster CL (Ig, j-1) above the paging cluster CL(i, j) and the paging cluster CL (Ig-1, j located to the left of the paging cluster CL(i, j). ), and the data paging use case of the paging cluster CL(Ig, j+1) located under the paging cluster CL(i, j).

If the paging cluster CL(i, j) is located in the first row and the Jg column (lower left corner) of the data block, i=1, j=Jg (ie, the paging cluster CL(1, Jg)). At this time, the controller 331 needs to judge the paging cluster CL(1, Jg-1) above the paging cluster CL(i, j) and the paging cluster CL(2, Jg) located to the right of the paging cluster CL(i, j). The use of the included data pagination.

If the paging cluster CL(i, j) is located in the Jg column of the data block, and the non-first row is not the position of the Ig row, i≠1, i≠Ig, j=Jg (ie, paging cluster CL ( i, Jg)). At this time, the controller 331 needs to judge the paging cluster CL(i-1, Jg) located on the left side of the paging cluster CL(i, j) and the paging cluster CL (i+1, Jg located on the right side of the paging cluster CL(i, j). The use of data pagination contained in the pagination cluster CL(i, Jg-1) located above the pagination cluster CL(i, j).

If the paging cluster CL(i, j) is located in the Ig row and the Jg column (lower right corner) of the data block, i=Ig, j=Jg (ie, paging cluster CL(Ig, Jg)). At this time, the controller 331 needs to judge the paging cluster CL (Ig, Jg-1) located above the paging cluster CL(i, j) and the paging cluster CL (Ig- located to the left of the paging cluster CL(i, j). 1, Jg) The use of data pages included in the page.

Please refer to Fig. 37, which is a flow chart for confirming whether the state of the paging cluster changes with the position written by the data in the checkerboard configuration. First, it is judged whether or not the pen data is stored in the paging cluster which is preset to the ON state CLon (step S839a). If the result of the determination in step S839a is negative, the paged cluster representing the data to be written is converted from the preset off state CLoff to the on state CLon. Therefore, the adjacent paging cluster at which the data is written must be originally set to the ON state CLon, so the flow ends.

If the result of the determination in step S839a is affirmative, the controller 331 further determines whether there is still a paging cluster preset to the ON state CLon for new data writing (step S839b). If the result of the determination in step S839b is affirmative, the representative controller 331 does not need to determine whether the paged cluster originally set to the off state CLoff meets the open condition, and the flow ends.

If the result of the determination in step S839b is negative, the controller 331 needs whether or not the paging cluster adjacent to the storage location of the pen data is the on state CLon (step S839c). If the result of the determination in step S839c is affirmative, the writing of the data does not affect the state of the paging clusters around it, the flow ends.

If the result of the determination in step S839c is negative, the writing representing the data may affect the state of the paging clusters around it. At this time, the controller 331 needs to judge whether or not the writing position of the pen data affects the state of the paging cluster around it (step S839d). If the result of the determination in step S839d is negative, the controller 331 does not need to change the state of the paged cluster, and the flow ends. If the result of the determination in step S839d is affirmative, the flow waits after the controller 331 converts the paged cluster meeting the open condition into the closed state CLoff (step S839e).

Of course, in practical applications, the controller 331 also needs to consider other relevant factors. For example, the process by which the controller 331 actually stores data into the material paging does not necessarily require judging the state of the surrounding paging cluster. For example, if the paging cluster includes multiple columns or multiple rows of data paging, the controller 331 does not need to determine whether to store data in non-first column, non-last column, non-first row, and non-last row data paging. The state of the paging clusters around the paging cluster in which the data is stored. For example, for the data page located at the upper right corner, the lower left corner, and the lower right corner of the paged cluster, there are two adjacent page clusters, and the two adjacent page clusters are judged independently of whether the open condition is satisfied. . Therefore, the data may be written for the same write, and the controller 331 converts an adjacent paged cluster into the on state CLon (ie, after performing step S839d, the determination is affirmative and step S839e is performed); The adjacent paging cluster is the off state CLoff (that is, after the execution of step S839d, the judgment result is negative).

Please refer to pictures 38A~38H, which are written in multiple data, showing how to store data in the data block using the checkerboard layout in response to the state of the paging cluster. It is assumed here that the controller 331 presets the paging clusters CL2, CL4, CL5, CL7, CL10, CL12, CL13, and CL15 to the off state CLoff, and will page the clusters CL1, CL3, CL4, CL6, CL9, CL11, CL14, and CL16. The preset is the on state CLon.

In Fig. 38A, the controller 331 has written data to the paged cluster originally set to the ON state CLon. Among them, the paging cluster CL1 has been used to store multiple versions of the material A (A2, A3, A4, A5); the paging cluster CL3 has been used to store multiple versions of the material B (B2, B3, B4, B5). In addition, the paging clusters CL6, CL8, CL9, CL11, CL14 and CL16 are also used to store multiple versions of data C, data D, data E, data F, data G, and data H, respectively. Incidentally, when the data A2, B2, C2, D2, E2, F2, G2, and H2 are written, the step executed by the controller 331 corresponds to steps S831, S832, S833, and S834 of Fig. 33. When the data A3~A5, B3~B5, C3~C4, D3~D5, E3~E4, F3~F5, G3~G5, H3~H5 are written, the steps performed by the controller 331 are equivalent to the step S831 of the 33rd figure. Steps S839a and S839b of S832, S838 and Fig. 37.

In the data block usage table 335b of Fig. 38A, the paging clusters (CL2, CL4, CL5, CL7, CL10, CL12, CL13, CL15) set to the off state CLoff are marked with the crosses to the data belonging to the paging cluster. Pagination cannot be used to store data. On the other hand, for the paging cluster of the open state CLon, the usage status of the material paging in each paging cluster will be updated synchronously. Taking the paging cluster CL1 as an example, since the fourth material paging has been used and the fourth material paging stores the valid data, in the data block usage table 335, the number of the paging cluster CL1 corresponds to 4. Taking the paging cluster CL3 as an example, the number corresponding to the paging cluster 3 is 4, which represents that the data paging in the paging cluster has been used to store different versions of the data B (B2~B5). The remaining paged clusters and their corresponding numbers and numbers can be analogized and not detailed.

In the data block 852, after the paging clusters CL1, CL4, CL5, CL7, CL10, CL12, CL13, CL15 which are originally set to the ON state CLon have been used for storing data, the controller 331 will not be written yet. When the data of the data block 852 has passed, steps S831, S832, S833, and S835 of step 33 are executed. When the controller 331 executes step S835, it determines whether the paged clusters (CL2, CL4, CL6, CL8, CL9, CL11, CL14, CL16) originally set to the off state CLoff are determined according to the determination mode as illustrated in FIG. Meet the opening condition.

The controller 331 determines that the material page on the left side of the paged cluster CL2 has the valid data A5, so the paged cluster CL2 still does not meet the open condition and cannot be set to the on state CLon. The controller 331 judges that the material page on the left side of the page cluster CL4 has the valid material B5, so the page cluster CL4 cannot be set to the on state CLon. The controller 331 determines that the data page above the paged cluster CL5 has the valid data A5, and the data page on the right has the valid data C4, so the paged cluster CL5 cannot be set to the on state CLon. The controller 331 determines that the data page above the paged cluster CL7 has the valid data B5, and the data page on the left side has not been used, so the paged cluster CL7 cannot be set to the on state CLon. The controller 331 determines that there is a data page above the paged cluster CL10 that has a valid data C4, a data page has not been used, and a data page on the left side thereof has not been used, so the paged cluster CL10 cannot be set to the on state CLon. . The controller 331 judges that the material page on the left side of the page cluster CL12 still has the valid data F5, so the page cluster CL12 cannot be set to be on. The controller 331 judges that there is a data page above the paged cluster CL13 and still has the valid data E4, and one data page has not been used yet, so the paged cluster CL13 cannot be set to the on state CLon. The controller 331 determines that the data page above the paged cluster CL15 has the valid data F5, and the data page on the left side stores the valid data G5, so the paged cluster CL15 cannot be set to the on state CLon. As can be seen from the foregoing description, in Fig. 38A, the controller 331 is still unable to store data using the paging clusters CL2, CL4, CL5, CL7, CL10, CL12, CL13, and CL15.

In Fig. 38B, it is assumed that the materials A, C are updated again. In addition, in the paging cluster CL1, the data page originally used to store the data A5 has been marked as invalid; in the paging cluster CL6, the data page originally used to store the data C4 has been marked as invalid. At this time, the controller 331 has to perform steps S831, S832, and S839 of FIG. 33 and steps S839a, S839b, S839c, and S839d of FIG. 37 in response to the update of the materials A and C. At the same time, in the data block usage table, the paging cluster CL1 is represented by a cross, and corresponds to 4 with the paging cluster CL6.

In the paging cluster CL1, the data page originally used to store the material A5 is adjacent to the paging clusters CL2 and CL5. Therefore, when the data page storing the material A5 is marked as invalid, the controller 331 needs to judge whether the state of the page clusters CL2, CL5 needs to be changed. In the paging cluster CL6, the data page originally used to store the data C4 is adjacent to the paging clusters CL5 and CL10. Therefore, when the data page storing the material C4 is marked as invalid, the controller 331 needs to judge whether the state of the page clusters CL5, CL10 needs to be changed.

Accordingly, in Fig. 38B, as the data A, C are updated, the controller 331 must determine whether the paging clusters CL2, CL5, CL10 can be enabled. As shown in Fig. 38B, the paging clusters CL2, CL4, CL5, CL7, CL10, CL12, CL13, CL15 are originally in the off state CLoff. However, as the data A, C are updated, the controller 331 confirms that in these paging clusters set to the off state CLoff, the paging clusters CL2, CL5 can be converted to the on state CLon, and the paging cluster CL10 is not yet convertible to Turn on the state CLon. That is, as the data A, C are updated, the result of the determination by the controller S839d executing step S839d may be divided into two categories, one is the paging clusters CL2 and CL5 performing step S839e, and the other is the paging cluster CL10 which does not change state. On the other hand, for the paging clusters CL4, CL7, CL12, CL13, and CL15, the paging clusters CL4, CL7, CL12, CL13, and CL15 remain in the off state because the state of the adjacent material paging is not updated. .

As can be seen by comparing the 38A, 38B, the controller 331 determines whether the state of the paging cluster can be converted, not based on the position of the paging cluster in the data block 852, but more data paging at those locations. Judging as the data is updated and marked as invalid. In other words, the controller 331 determines, based on the update of the data, which paging clusters have to re-determine the open state CLon of the related paging clusters in response to the update of the data.

Please also refer to Figures 38B and 38C. Because in FIG. 38B, the controller 331 determines that the paging clusters CL2, CL5 can be enabled, therefore, in the 38Cth, the paging clusters CL2, CL5 are all turned on (changed from the grid floor to the bottomless grid), and In the data block usage table, the paging clusters CL2, CL5 correspond to 0.

In Figure 38C, it is assumed that the data C, F, G are updated again. In addition, in the paging cluster CL6, the data page originally used to store the data C5 has been marked as invalid; in the paging cluster CL11, the data page originally used to store the data F5 has been marked as invalid; In the paging cluster CL14, the data page originally used to store the data G5 has been marked as invalid. At the same time, in the data block usage table, the paging clusters CL6, CL11, and CL14 are all represented by crosses.

In the paging cluster CL1, the data page originally used to store the material C5 is adjacent to the paging clusters CL7, CL10 which are preset to the closed state CLoff. Therefore, when the data page storing the material C5 is marked as invalid, the controller 331 needs to judge whether the state of the page clusters CL7, CL10 needs to be changed. In the paging cluster CL11, the data page originally used to store the data F5 is adjacent to the paging clusters CL12 and CL15. Therefore, when the data page storing the material F5 is marked as invalid, the controller 331 needs to judge whether the state of the page clusters CL12, CL15 needs to be changed. In the paging cluster CL14, the data page originally used to store the data G5 is also adjacent to the paging cluster CL15. Therefore, when the data page storing the material G5 is marked as invalid, the controller 331 needs to judge whether the state of the paged cluster CL15 needs to be changed. Accordingly, in Fig. 38C, as the data C, F, G are updated, the controller 331 has to determine whether the paging clusters CL7, CL10, CL12, CL15 can be enabled. Details regarding whether the controller 331 determines whether the paging clusters CL7, CL10, CL12, CL15 meet the ON condition and can be converted to the ON state CLon will not be described in detail herein.

As shown in Fig. 38C, the paging clusters CL4, CL7, CL10, CL12, CL13, CL15 are originally in the off state CLoff. However, as the data C, F, G are updated, the controller 331 confirms that in these paging clusters set to the off state CLoff, the paging cluster CL15 can be converted to the on state CLon, and the paging clusters CL7, CL10, CL12 CL15 is not yet convertible to the on state CLon. On the other hand, for the paging cluster CL4, since the state of the material paging adjacent thereto is not updated, the paging cluster CL4 remains in the OFF state CLoff.

Please also refer to Figures 38C and 38D. Since in the Fig. 38C, the controller 331 judges that the paged cluster CL15 can be enabled, the paged cluster CL15 is changed from the latticed bottom of Fig. 38C to the bottomless of the 38D. Further, in the data block use table of Fig. 38D, the paging cluster CL15 corresponds to 0.

In Fig. 38D, it is assumed that the data D, E, I, J are updated again. The controller 331 executes steps S831, S832, S833, S835, and S836 of FIG. 33 to write the data I2 and J2. Therefore, the data I2, J2 are stored by the controller 331 in the data page of the opened page clusters CL2, CL5. Incidentally, in the data block usage table of Fig. 38D, the paging cluster CL2 corresponds to 1, and the paging cluster CL5 corresponds to 1. Since the data I2, J2 are stored in the paging cluster originally scheduled to be the off state CLoff and converted to the on state CLon, the representative data I2, J2 does not involve the judgment of the transition state of the paging cluster. Therefore, the controller 331 does not need to determine which paged clusters are adjacent to the data pages storing the data I2, J2.

In addition, in the paging cluster CL8, the data page originally used to store the data D5 has been marked as invalid; in the paging cluster CL9, the data page originally used to store the data E4 is marked as invalid, and the data E5 is stored in Another data pagination of the pagination cluster Cl9. Next, the controller 331 needs to determine whether the update of the data D, E affects the open state CLon of the associated paged cluster.

In the paging cluster CL8, the data page originally used to store the material D5 is adjacent to the page cluster CL12 which is preset to the closed state CLoff. Therefore, the controller 331 needs to judge whether or not the state of the paging cluster CL12 needs to be changed. In the paging cluster CL9, the data page originally used to store the material E4 is adjacent to the paging cluster CL13. Therefore, the controller 331 needs to judge whether or not the state of the paging cluster CL13 needs to be changed. Accordingly, in Fig. 38D, as the data D, E are updated, the controller 331 determines that the paged cluster CL12 can be enabled, but the paged cluster CL13 is not yet enabled.

In the figure 38D, the controller 331 has confirmed that the paged cluster CL12 can be converted into the on state CLon. Therefore, in the 38E picture, the paged cluster CL12 is not marked with the bottom of the network, and in the data block use table, The paged cluster CL12 corresponds to zero. It should also be noted that whether it is because of updating the data or judging the paging cluster can be converted into the judgment result of the open state CLon. The controller 331 needs to synchronously change the relevant records in the data block usage table.

The details of the figures 38E~38H can be derived from the foregoing description and will not be described in detail herein. In short, in the 38E picture, as the data E is updated, the data page of the stored material E5 is set to be invalid, and the paging clusters CL10 and CL13 are associated with the opening condition. Therefore, in the FIG. 37F, the paging clusters CL10 and CL13 are set to the on state CLon. In Fig. 37F, as the data B is updated, the data page of the stored data B5 is set to be invalid, and the paging clusters CL4 and CL7 can be converted into the on state CLon. Therefore, in the 38Gth diagram, the paging clusters CL4 and CL7 are set to the on state CLon. In Fig. 38G, all the paging clusters that were originally scheduled to be in the off state CLoff have all been converted to the on state CLon, and are successively used to store new data. In Figure 38H, the paging clusters CL4, CL7 are also used to store updated versions of the data O, P.

As can be seen from the figures 38A-38H, when the controller 331 stores the data using the paging clusters CL1, CL3, CL4, CL6, CL9, CL11, CL14 and CL16 which are originally set to the ON state CLon, the controller will follow the paging clusters. The order of the data blocks is used to store data from left to right and top to bottom.

On the other hand, for the cluster paging clusters CL2, CL4, CL5, CL7, CL10, CL12, CL13 and CL15 which are originally set to the off state CLoff, the order in which they are converted to the on state CLon is affected by those data being updated. The location of the updated information is affected by factors such as the location. That is to say, the order in which the cluster paging clusters CL2, CL4, CL5, CL7, CL10, CL12, CL13, and CL15 which are originally set to the off state CLoff are actually converted to the on state CLon is not in accordance with the paging clusters in the data block. It is decided by arranging the positions.

In view of the above, the embodiment of the present disclosure manages the memory device in the writing phase, the garbage collection phase, the reading phase, and the like based on the overall consideration. Considering these post-oriented data management methods, it can ensure that the memory device can achieve data clearing in a more efficient manner.

First, in accordance with an embodiment of the presently disclosed concept, the function of an erase operation is provided within the memory device based on the practice of data paging as the basic unit of data clearing. Accordingly, the controller 331 can evaluate the data clearing in a more efficient manner after the time required to use the erase operation and the erase operation is shorter.

Moreover, in order to improve the execution efficiency of the erasing operation, the embodiment of the present disclosure further proposes a method of managing data storage by paging clustering. With the setting of paging clusters, different versions of the same data are stored in the same paging cluster within the data block. Thereafter, if an outdated version of the data is needed, the time required to perform the erase operation can be greatly shortened based on the characteristics of the data pages adjacent to each other in the paging cluster.

In addition, the disclosure also dynamically adjusts the paging cluster used to store the data for the heat corresponding to the data update frequency. Accordingly, the memory block can provide a suitable paging cluster to store data. When the data is hot, the data is stored in a paged cluster containing a large number of pages; when the data is low, the data is stored in a page containing a small number of pages. Within the cluster.

Further, the embodiment of the present disclosure also proposes a checkerboard planning manner to prevent the content stored in the data paging from being interfered by accessing adjacent data pages. Therefore, the present disclosure can maintain the correctness of the data while efficiently clearing the data and achieving the purpose of data security.

In conclusion, the present invention has been disclosed in the above embodiments, but it is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

10‧‧‧Master control unit

11‧‧‧ memory device

111, 311‧‧‧ controller

115‧‧‧ memory array

111a, 3311‧‧‧ flash translation layer

115a, 215, P(1,1), P(1,2), P(1,3), P(1,4), P(2,1), P(2,2), P(2, 3), P(2,4), P(3,1), P(3,2), P(3,3), P(3,4), P(4,1), P(4,2 ), P(4,3), P(4,4), 451a, 451b, 451c, 451d, 451e, 451f, 452a, 452b, 452c, 452d, 452e, 452f, 453a, 453b, 453c, 453d, 453e, 453f, P(1,3), P(2,3), P(3,3), P(4,4), P(4,5), P(4,6), P(1,7) , P(2,7), P(3,7)‧‧‧ data paging

215a‧‧‧ memory cells

335‧‧‧ Cache memory

333‧‧‧ memory array

3313‧‧‧Control firmware layer

333a‧‧ Sensitive data storage area

333b‧‧‧ non-sensitive data storage area

3311a‧‧‧ Address Translator

3311b‧‧‧Data Block Distributor

3311c‧‧‧Garbage Collector

3311d‧‧‧Abrasive averager

3311e‧‧‧Erasing Manager

3313a‧‧‧Read function

3313b‧‧‧ Stylized function

3313c‧‧‧Erase function

3313d‧‧‧Erase function

40, 20, 41, 42, 23, BLKa, BLKb, BLKc, BLKd, BLKe, BLKf, BLKg, BLKh, BLKi, BLKj, BLKl, 651, 652, 653, 703, 713, 712, 80, 802, 852, 853‧‧‧data block

S501, S501a, S501b, S503, S503a, S503b, S505, S507, S507a, S507b, S509, S509a, S509b, S601, S603, S603a, S603b, S605, S607, S609, S611, S613, S615, S71, S73, S75, S711a, S711b, S711c, S711d, S715a, S715b, S731a, S731b, S731c, S731d, S731e, S731f, S731g, S735a, S735b, S735c, S735d, S735e, S735f, S735g, S735h, S735i, S81, S83, S831, S832, S833, S834, S835, S836, S837, S838, S839, S901, S903, S905a, S905b, S905c, S905d, S907, S909, S911, S913‧‧

A, B, C, D, A1, A2, A3, A4, A5, A6, X7, X8, X9, X10, X11, X12, X13, X14, Y6, Y7, Y8, A7, A8, A9, A10, A11, A12, A13, A14, A15, A16, A17, D6, D7, D8, D9, I2, I3, B2, B3, B4, B5, M2, M3, M4, J2, J3, J4, J5, C2 C3, C4, C5, N2, N3, D2, D3, D4, D5, E2, E3, E4, E5, F1, F2, F3, F4, F5, K2, K3, Q1, Q2, G2, G3, G4, G5, L2, L3, L4, H2, H3, H4, H5, H6‧‧‧ Information

333a‧‧ Sensitive data storage area

333b‧‧‧ non-sensitive data storage area

CL1, CL2, CL3, CL4, CL5, CL6, CL7, CL8, CL9, CL10, CL11, CL12, CL13, CL14, CL15, CL16, CL(1,1), CL(1,2), CL(1, 3), CL (1, 4), CL (2, 1), CL (2, 2), CL (2, 3), CL (2, 4), CL (3, 1), CL (3, 2 ), CL(3,3), CL(3,4), CL(4,1), CL(4,2), CL(4,3), CL(4,4)‧‧ ‧pound cluster

335a‧‧‧Information Block Rating Table

335b‧‧‧Data Block Usage Table

335c‧‧‧ Address Mapping Table

744, 751a, 751b‧‧‧ paged clusters of data level DG2

Th‧‧‧ threshold

Th_L‧‧‧low threshold

Th_H‧‧‧high threshold

Figure 1, which is a schematic diagram of a memory device. 2A~2C, which is a schematic diagram of a memory device of a conventional technology for storing data in an off-site update manner. Figure 3A is a schematic diagram of the data stored in the memory cells of the data page. Figure 3B is a schematic diagram of the reprogramming of the memory cell originally storing the data bit "1" by the data bit "0". FIG. 4 is a schematic diagram of setting an operation management program and an erasing function in a controller according to an embodiment of the present disclosure. 5A-5D, which is a schematic diagram of the impact on the page of data adjacent to the selected data page when reprogramming a selected data page. Figure 6A-6E, which is a schematic diagram of the number of other data pages affected by the location of the data page to be erased. 7A, 7B, and 7C are diagrams illustrating the number of pages of the interfered data as the position of the data to be erased is different. FIG. 8A is a schematic diagram of performing an erase operation on a data page according to an arrangement order of pages to be erased. FIG. 8B is a schematic diagram of the erasing operation of the data page according to the arrangement order of the pages to be erased. Figure 9 is a schematic diagram showing the erasing operation of data pages arranged in 3*3 in the data block. Figure 10A is a schematic diagram of performing an erase operation by taking a data block containing 4 rows and 8 columns of data pages as an example. FIG. 10B is a schematic diagram of executing an erase command by taking a data block including 4 rows and 8 columns of data pages as an example. Figure 11 is a flow chart for selecting an operation category after the controller has evaluated the time required for the erase operation and the erase operation. Figure 12 is a block diagram of a memory device in accordance with the present disclosure. Figures 13A, 13B, and 13C are diagrams corresponding to the data blocks BLK of the three data level levels DG and the paged clusters CL within the data blocks, respectively. Figure 14, which is a schematic diagram of the internal memory of the cache. Figure 15 is a schematic diagram of the data A1 written to the data block corresponding to the data level DG1 when the data A1 is stored. In Fig. 16, when the data A2 is stored, the data block corresponding to the data level DG1 is no longer stored, but the data A2 is written to the data block corresponding to the data level DG2. Figures 17A-17C are diagrams showing the data A3, A4, and A5 being written to the data block corresponding to the data level DG2. In Fig. 18, when the data A6 is stored, the data block corresponding to the data level DG2 is no longer stored, but the data A6 is stored in the data block corresponding to the data level DG3. Figure 19 is a flow chart of changing the data level DG corresponding to the data block corresponding to the written data as the version of the data changes. Figure 20 is a schematic diagram showing the data level DG of the paging cluster corresponding to the data dynamically adjusted according to the state of the data when the data is stored. Figure 21 is a flow chart of adjusting the data level DG corresponding to the data in response to the heat of the data when performing garbage collection. 22A, 22B, which is a flow chart for selecting a data block to be garbage collected. Figure 23 is a schematic diagram of a data block containing four pieces of data and corresponding to the third data level DG. Figure 24 is a flow chart for determining how to adjust the data level DG corresponding to the data stored in a data block by a predetermined threshold when performing garbage collection. Figure 25A, which is a schematic diagram of a preset threshold for a data block for garbage collection. Figure 25B is a schematic diagram comparing the heat of data in a data block to be garbage collected with a preset threshold. Figure 26 is a schematic diagram of copying data in a data block for garbage collection to a data block of the same data level DG. Figure 27 is a schematic diagram of copying data in a data block for garbage collection to a data block of a lower data level DG. Figures 28A and 28B are schematic diagrams showing the erasure of the data block for garbage collection. Figure 29 is a flow chart for determining how to adjust the data level DG corresponding to the data when the data block is garbage collected with two preset thresholds. Figures 30A and 30B are schematic diagrams for defining two preset thresholds for the data block of garbage collection. Figure 30C is a schematic diagram comparing the heat of data in a data block to be garbage collected with two preset thresholds. Figure 31A is a schematic diagram of copying data in a data block for garbage collection to a data block of a lower data level DG. Figure 31B is a schematic diagram of copying data in a data block for garbage collection to a data block of a higher data level DG. Figure 31C is a schematic diagram of copying data in a data block for garbage collection to a data block of the same data level DG. 32A, 32B, which is a schematic diagram of the use state of the paging cluster in a checkerboard configuration. Figure 33 is a flow chart for how the paging cluster of the checkerboard configuration decides to write the data page. Figure 34 is a flow diagram of a paged cluster that produces a checkerboard configuration. Fig. 35 is a schematic diagram showing the paging cluster of the checkerboard configuration defined by the flow of the data layer level DG2, taking the data block corresponding to the data level DG2 as an example. In Fig. 36, when a checkerboard configuration is used, the paging cluster that was originally set to the off state should determine how the adjacent paging clusters are used, and thus change from the off state to the on state. In Fig. 37, when the checkerboard configuration is adopted, the controller confirms whether the state of the paging cluster changes according to the position written by the data. Figure 38A~38H, which is a process of writing and updating data in multiple data sheets, showing how to store data in response to the state of paged clusters in a data block using a checkerboard plan.

Claims (10)

A memory device, comprising: a memory array, comprising: a first storage area corresponding to a first data level, wherein the first storage area comprises a plurality of first ones arranged in an I1 row and a J1 column a sub-region cluster, and each of the first sub-region clusters includes a plurality of sub-regions arranged in an O1 row and a P1 column, wherein I1, J1, O1, and P1 are associated with the first data level; and a second storage a region corresponding to a second data hierarchy, wherein the second storage region comprises a plurality of second sub-region clusters arranged in an I2 row and a J2 column, and each of the second sub-region clusters comprises an O2 array a plurality of sub-regions of a row and a P2 column, wherein the I2, J2, O2, and P2 systems are associated with the second data hierarchy, and the number of clusters of the first sub-regions is greater than the number of clusters of the second sub-regions; a controller electrically coupled to the memory array, wherein the controller utilizes a first first sub-region cluster of the first sub-region clusters and a first and second of the second sub-region clusters One of the sub-region clusters Accessing a first data, and the controller utilizes a second first sub-region cluster of the first sub-region clusters and a second second sub-region cluster of the second sub-region clusters One of the two accesses a second data, wherein the controller stores the first data in the first first sub-region cluster and the second first sub-region cluster along with the update frequency of the first data In one case, I1, I2, J1, J2, O1, O2, P1 and P2 are all positive integers, the product of I1 and O1 is equal to the product of I2 and O2, and the product of J1 and P1 is equal to the product of J2 and P2. The memory device of claim 1, wherein, when the update frequency of the first data is low, the controller stores the first data in the first first sub-region cluster One of the sub-regions; and when the update frequency of the first material is high, the controller stores the first data in the sub-regions included in the first second sub-region cluster One. The memory device of claim 2, wherein, with the updating of the first data, the controller stores the first data in the first and second sub-region clusters, and the first The sub-regions contained in a sub-region cluster indicate invalid sub-regions. The memory device of claim 3, wherein the controller clears the sub-area marked as invalid in the first first sub-region cluster by one of the following two instructions: The first storage area executes an erase command; and an erase command is executed on the sub-areas included in the first first sub-region cluster. The memory device of claim 4, wherein the controller erases the inclusion of the first first sub-region cluster by increasing the order of increasing the row direction according to the column direction by the erasing command The content of the sub-region. The memory device of claim 1, wherein the controller stores the first data in the sub-areas of the O1 row and the P1 column included in the first first sub-region cluster In one case, the controller stores the first data in an order of increasing in a row direction and increasing in a row direction as the first data is updated. The memory device of claim 1, wherein the first first sub-region is clustered in the first storage region, and the second first sub-region is clustered in the first storage region. The location is not adjacent. A data management method for a memory device is applied to a memory array including a first storage area and a second storage area, wherein the first storage area and the second storage area respectively correspond to a first a data hierarchy and a second data hierarchy, wherein the first storage region comprises a plurality of first sub-region clusters arranged in an I1 row and a J1 column, and each of the first sub-region clusters comprises an O1 row And a plurality of sub-regions of a P1 column, wherein the second storage region comprises a plurality of second sub-region clusters arranged in an I2 row and a J2 column, and each of the second sub-region clusters comprises an O2 row And a plurality of sub-regions of a P2 column, wherein the number of clusters of the first sub-regions is greater than the number of clusters of the second sub-regions, and the data management method comprises the steps of: utilizing the clusters of the first sub-regions One of the first first sub-region clusters and one of the first and second sub-region clusters of the second sub-region clusters accesses a first data; utilizing one of the first sub-region clusters One of the first sub-region clusters and one of the second and second sub-region clusters of the second sub-region clusters accesses a second data; and, the first data is updated with the frequency of the first data The data is stored in one of the first first sub-region cluster and the second first sub-region cluster, wherein I1, J1, O1 and P1 are related to the first data level, and I2, J2, O2 and P2 are Corresponding to the second data level, wherein I1, I2, J1, J2, O1, O2, P1 and P2 are positive integers, the product of I1 and O1 is equal to the product of I2 and O2, and the product of J1 and P1 is equal to J2. The product of P2. The method for managing data according to claim 8 , further comprising the steps of: storing the first data in the first first sub-region cluster when the update frequency of the first data is low; One of the sub-regions; and when the update frequency of the first material is high, storing the first data in one of the sub-regions included in the first second sub-region cluster. The method for managing data according to claim 9 , further comprising the steps of: storing the first data system in the first and second sub-region clusters as the first data is updated; and The sub-regions included in the first first sub-region cluster are marked as invalid sub-regions.