TW201349414A - Package structure having MEMS component and fabrication method thereof - Google Patents

Package structure having MEMS component and fabrication method thereof Download PDF

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Publication number
TW201349414A
TW201349414A TW101119074A TW101119074A TW201349414A TW 201349414 A TW201349414 A TW 201349414A TW 101119074 A TW101119074 A TW 101119074A TW 101119074 A TW101119074 A TW 101119074A TW 201349414 A TW201349414 A TW 201349414A
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TW
Taiwan
Prior art keywords
microelectromechanical component
package structure
microelectromechanical
substrate
encapsulation layer
Prior art date
Application number
TW101119074A
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Chinese (zh)
Inventor
張宏達
劉正祥
黃光偉
林俊宏
廖信一
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矽品精密工業股份有限公司
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Application filed by 矽品精密工業股份有限公司 filed Critical 矽品精密工業股份有限公司
Priority to TW101119074A priority Critical patent/TW201349414A/en
Priority to US13/588,113 priority patent/US20130320463A1/en
Publication of TW201349414A publication Critical patent/TW201349414A/en

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    • H—ELECTRICITY
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    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/007—Interconnections between the MEMS and external electrical signals
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    • B81B2207/09—Packages
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Abstract

Disclosed is a package structure having a MEMS component and a manufacturing method thereof, the package structure comprising a substrate, a MEMS component, a lid body, a first section and a package layer, wherein the substrate has electrical connecting pads formed thereon, the MEMS component is disposed on top of the substrate, the lid body is disposed on the MEMS component and a metallic layer is formed on the lid body, one end of the first section is electrically connected to electrical connecting pads, the package layer is disposed on the substrate and encapsulates the MEMS component, the lid body and the first section therein, and the other end of the first section is exposed from the top of the package layer, thereby increasing the overall good yield and structural functionality.

Description

具微機電元件之封裝結構及其製法 Package structure with MEMS components and its manufacturing method

本發明係有關於一種封裝結構及其製法，尤指一種具微機電元件之封裝結構及其製法。 The invention relates to a package structure and a preparation method thereof, in particular to a package structure with a microelectromechanical element and a preparation method thereof.

微機電系統(Micro Electro Mechanical System,MEMS)是一種兼具電子與機械功能的微小裝置，在製造上則藉由各種微細加工技術來達成。 Micro Electro Mechanical System (MEMS) is a tiny device that combines both electronic and mechanical functions. It is manufactured by various micromachining techniques.

請參閱第1A至1C圖，係習知具微機電元件之封裝結構及其製法之剖視圖。 Please refer to FIGS. 1A to 1C for a cross-sectional view showing a package structure of a microelectromechanical device and a method for manufacturing the same.

如第1A圖所示，提供一具有陣列排列之複數微機電元件101的微機電元件基板10，於各該微機電元件101上設置蓋體11，並於該蓋體11上接置特定應用積體電路(application specific integrated circuit，ASIC)晶片12，且藉由銲線將該特定應用積體電路晶片12電性連接至該微機電元件101與蓋體11。 As shown in FIG. 1A, a microelectromechanical device substrate 10 having an array of a plurality of microelectromechanical components 101 is provided, and a cover 11 is disposed on each of the microelectromechanical components 101, and a specific application product is placed on the cover 11. An application specific integrated circuit (ASIC) chip 12 is electrically connected to the microelectromechanical element 101 and the cover 11 by a bonding wire.

如第1B圖所示，於該微機電元件基板10上形成包覆該蓋體11與特定應用積體電路晶片12的封裝層13。 As shown in FIG. 1B, an encapsulation layer 13 covering the lid body 11 and the specific application integrated circuit wafer 12 is formed on the microelectromechanical element substrate 10.

如第1C圖所示，進行切單步驟。 As shown in Fig. 1C, a singulation step is performed.

惟，上述習知之封裝結構及其製法係於微機電元件基板10的所有微機電元件101上電性連接特定應用積體電路晶片12並進行封裝，而無法事先剔除不良的微機電元件101，所以會降低最終封裝結構的良率。再者，習知之封裝結構及其製法也僅適用於特定應用積體電路晶片12尺寸 小於微機電元件101的情況中，而無法處理特定應用積體電路晶片12尺寸大於微機電元件101的情況。 However, the above-mentioned conventional package structure and its manufacturing method are electrically connected to the specific application integrated circuit wafer 12 of all the microelectromechanical elements 101 of the microelectromechanical element substrate 10 and packaged, and the defective microelectromechanical element 101 cannot be removed in advance, so Will reduce the yield of the final package structure. Moreover, the conventional package structure and its manufacturing method are also only applicable to the specific application integrated circuit chip 12 size. In the case where it is smaller than the microelectromechanical element 101, the case where the specific application integrated circuit wafer 12 is larger than the microelectromechanical element 101 cannot be handled.

因此，如何避免上述習知技術中之種種問題，實已成目前亟欲解決的課題。 Therefore, how to avoid various problems in the above-mentioned prior art has become a problem that is currently being solved.

有鑒於上述習知技術之缺失，本發明提供一種具微機電元件之封裝結構，係包括：基板，係具有相對之第一表面與第二表面，該第一表面側係具有複數第一電性連接墊與複數第二電性連接墊；第一微機電元件，係設於該基板之第一表面上；第一蓋體，係設於該第一微機電元件上，且該第一蓋體之頂面上形成有金屬層；複數銲線，係電性連接該第二電性連接墊與第一微機電元件；複數第一線段，其一端電性連接該第一電性連接墊；以及封裝層，係形成於該基板上以包覆該第一微機電元件、第一蓋體、第一線段及銲線，且該第一線段之另一端係外露於該封裝層之頂面。 In view of the above-mentioned prior art, the present invention provides a package structure having a microelectromechanical device, comprising: a substrate having opposite first and second surfaces, the first surface side having a plurality of first electrical properties a first MEMS device, the first MEMS device is disposed on the first surface of the substrate; the first cover is disposed on the first MEMS device, and the first cover a metal layer is formed on the top surface; the plurality of bonding wires are electrically connected to the second electrical connection pad and the first microelectromechanical component; and the plurality of first wire segments are electrically connected to the first electrical connection pad at one end thereof; And an encapsulation layer formed on the substrate to cover the first microelectromechanical component, the first cover, the first line segment and the bonding wire, and the other end of the first segment is exposed at the top of the encapsulation layer surface.

本發明復提供一種具微機電元件之封裝結構之製法，係包括：於一基板之第一表面側設置第一微機電元件，其中，該第一表面上係具有複數第一電性連接墊與複數第二電性連接墊，該第一微機電元件上設有第一蓋體，且該第一蓋體之頂面上形成有金屬層；藉由第一銲線電性連接該金屬層與第一電性連接墊，並藉由第二銲線電性連接該第一微機電元件與第二電性連接墊；於該基板上形成封裝層以包覆該第一微機電元件、第一蓋體、第一銲線與第二 銲線；以及從該封裝層頂面移除部分該封裝層，俾使該第一銲線分成互不連接的第一線段，該第一線段之頂端外露於該封裝層頂面，且該第一線段係電性連接該第一電性連接墊。 The present invention provides a method for fabricating a package structure having a microelectromechanical device, comprising: disposing a first microelectromechanical component on a first surface side of a substrate, wherein the first surface has a plurality of first electrical connection pads and a plurality of second electrical connection pads, a first cover body is disposed on the first microelectromechanical component, and a metal layer is formed on a top surface of the first cover body; the metal layer is electrically connected to the first bonding wire a first electrical connection pad, and electrically connecting the first microelectromechanical component and the second electrical connection pad by a second bonding wire; forming an encapsulation layer on the substrate to encapsulate the first microelectromechanical component, first Cover body, first bonding wire and second And a portion of the encapsulation layer is removed from the top surface of the encapsulation layer, and the first bonding wire is divided into first line segments that are not connected to each other, and a top end of the first line segment is exposed on a top surface of the encapsulation layer, and The first line segment is electrically connected to the first electrical connection pad.

由上可知，由於本發明之具微機電元件之封裝結構及其製法係使用已切割完成之微機電元件，因此可先篩選出已知良好晶粒(KGD)，進而能提升最終封裝結構的良率；此外，本發明復可在基板的底面形成對位鍵，以利在製程中用雙面對準器進行對位；再者，本發明可有效處理微機電元件小於基板的情況，且能同時將多個微機電元件整合在同一個封裝結構中，進而增進整體功能性。 It can be seen from the above that since the package structure of the microelectromechanical device of the present invention and the manufacturing method thereof use the cut microelectromechanical component, the known good crystal grain (KGD) can be screened first, thereby improving the final package structure. In addition, the present invention can form a registration bond on the bottom surface of the substrate to facilitate alignment with a double-sided aligner in the process; further, the present invention can effectively handle the case where the micro-electromechanical component is smaller than the substrate, and can At the same time, multiple MEMS components are integrated into the same package structure to enhance overall functionality.

以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如「頂」、「底」、「上」及「一」等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對 關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。 It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "top", "bottom", "upper" and "one" are used in this specification for the purpose of description and are not intended to limit the scope of the invention. Changes or adjustments to a relationship are considered to be within the scope of the invention, without departing from the scope of the invention.

第一實施例 First embodiment

請參閱第2A至2G圖，係本發明之具微機電元件之封裝結構及其製法之第一實施例之剖視圖。 2A to 2G are cross-sectional views showing a first embodiment of a package structure of a microelectromechanical device and a method of manufacturing the same according to the present invention.

首先，如第2A圖所示，提供一第一微機電(MEMS)元件21a，其上係設有第一蓋體22a，且該第一微機電元件21a之底面係形成有黏著層23，該第一蓋體22a之頂面上係形成有金屬層24；其中，該第一微機電元件21a可為陀螺儀(gyroscope)、加速度計(accelerometer)、角速度計、磁力計、壓力計或射頻微機電(RF MEMS)元件，該第一蓋體22a之材質可為玻璃或矽。 First, as shown in FIG. 2A, a first microelectromechanical (MEMS) device 21a is provided, and a first cover 22a is disposed thereon, and an adhesive layer 23 is formed on a bottom surface of the first microelectromechanical component 21a. The top surface of the first cover 22a is formed with a metal layer 24; wherein the first microelectromechanical element 21a can be a gyroscope, an accelerometer, an angular velocity meter, a magnetometer, a pressure gauge or a radio frequency micro For the electromechanical (RF MEMS) component, the material of the first cover 22a may be glass or germanium.

如第2B圖所示，提供具有複數基板20之承載板20’，該承載板20’可為晶圓，使該第一微機電元件21a藉其黏著層23以設置於一基板20之第一表面20a上，該第一表面20a上係具有複數第一電性連接墊201與複數第二電性連接墊202，其中，該基板20係具有相對該第一表面20a之第二表面20b，該第二表面20b係具有對位鍵200，該對位鍵200可為凹穴，且係於後續製程時供雙面對準器(double side aligner)對位之用，該基板20可為具有特定應用積體電路(application specific integrated circuit，ASIC)的半導體晶片。 As shown in FIG. 2B, a carrier board 20' having a plurality of substrates 20 is provided. The carrier board 20' can be a wafer, so that the first microelectromechanical component 21a is disposed on the first substrate 20 by the adhesive layer 23. On the surface 20a, the first surface 20a has a plurality of first electrical connection pads 201 and a plurality of second electrical connection pads 202, wherein the substrate 20 has a second surface 20b opposite to the first surface 20a. The second surface 20b has a registration key 200, which may be a recess and is used for aligning a double side aligner in a subsequent process, and the substrate 20 may be specific A semiconductor wafer to which an application specific integrated circuit (ASIC) is applied.

如第2C圖所示，藉由複數第二銲線252電性連接該第一微機電元件21a與第二電性連接墊202。 As shown in FIG. 2C, the first microelectromechanical element 21a and the second electrical connection pad 202 are electrically connected by a plurality of second bonding wires 252.

如第2D圖所示，藉由複數第一銲線251電性連接該金屬層24與第一電性連接墊201。 As shown in FIG. 2D, the metal layer 24 and the first electrical connection pad 201 are electrically connected by a plurality of first bonding wires 251.

如第2E圖所示，於該基板20上形成封裝層26以包覆該第一微機電元件21a、第一蓋體22a、第一銲線251與第二銲線252；其中，該封裝層26之材料可為環氧樹脂(epoxy)、環氧樹脂成形塑料(Epoxy Molding Compound，簡稱EMC)或聚醯亞胺等之熱固性樹脂或矽膠(silicone)。 As shown in FIG. 2E, an encapsulation layer 26 is formed on the substrate 20 to cover the first microelectromechanical element 21a, the first cover 22a, the first bonding wire 251 and the second bonding wire 252; wherein the encapsulation layer The material of 26 may be a thermosetting resin such as epoxy, Epoxy Molding Compound (EMC) or polyimine or silicone.

如第2F圖所示，從該封裝層26頂面移除部分該封裝層26，亦即移除該封裝層26之上層部分與其內部的第一銲線251之弧頂部分，俾使該第一銲線251分成互不連接的複數第一線段251a與複數第二線段251b，該第一線段251a與第二線段251b之頂端均外露於該封裝層26頂面，且該第一線段251a與第二線段251b分別係電性連接該第一電性連接墊201與金屬層24；其中，移除部分該封裝層26之方式係為研磨(grinding)、雷射、電漿或化學蝕刻。 As shown in FIG. 2F, a portion of the encapsulation layer 26 is removed from the top surface of the encapsulation layer 26, that is, the upper portion of the encapsulation layer 26 and the arc top portion of the first bonding wire 251 therein are removed. A bonding wire 251 is divided into a plurality of first line segments 251a and a plurality of second line segments 251b that are not connected to each other. The top ends of the first line segment 251a and the second line segment 251b are exposed on the top surface of the encapsulation layer 26, and the first line is The segment 251a and the second segment 251b are electrically connected to the first electrical connection pad 201 and the metal layer 24 respectively; wherein the portion of the encapsulation layer 26 is removed by grinding, laser, plasma or chemical Etching.

如第2G圖所示，於該封裝層26上形成複數線路重佈層27，俾使各該線路重佈層27電性連接該第一線段251a，該線路重佈層27可為介電層與線路之層疊組合，且其佈設方式可依電性需求而彈性調整，並於該線路重佈層27上形成絕緣保護層28，且該絕緣保護層28具有至少一外露部分該線路重佈層27之絕緣保護層開孔280，再於該絕緣保護層開孔280中形成銲球29，以電性連接該線路重佈層27；其中，該銲球29之材質為金屬或合金，且具有銲接或熔接特性，其材質以錫/鉛、錫/銀/銅或金為佳。最後，進 行切單(singulation)製程。 As shown in FIG. 2G, a plurality of circuit redistribution layers 27 are formed on the encapsulation layer 26, such that each of the circuit redistribution layers 27 is electrically connected to the first line segment 251a, and the circuit redistribution layer 27 can be dielectric. The layer is laminated with the line, and the layout manner thereof can be elastically adjusted according to electrical requirements, and an insulating protection layer 28 is formed on the circuit redistribution layer 27, and the insulating protection layer 28 has at least one exposed portion. An insulating protective layer opening 280 of the layer 27, and a solder ball 29 is formed in the insulating protective layer opening 280 to electrically connect the circuit redistribution layer 27; wherein the solder ball 29 is made of metal or alloy, and It has soldering or welding properties and is made of tin/lead, tin/silver/copper or gold. Finally, enter Line singulation process.

第二實施例 Second embodiment

請參閱第3A與3B圖，係本發明之具微機電元件之封裝結構之第二實施例之剖視圖。 Referring to Figures 3A and 3B, there are shown cross-sectional views of a second embodiment of a package structure for a microelectromechanical device of the present invention.

本實施例大致上與前一實施例相同，其主要不同之處係為在一個封裝結構中設置複數微機電元件，以達到整合電性的目的，該等微機電元件可彼此相鄰地設置，即於該基板20之第一表面20a上另設置第二微機電元件21b，如第3A圖所示；或者，該等微機電元件可相互堆疊地設置，也就是，於設置該第一微機電元件21a之前，復包括於該基板20上設置第二微機電元件21b，該第二微機電元件21b上設有第二蓋體22b，且該第一微機電元件21a藉其底面連接該第二微機電元件21b的第二蓋體22b，如第3B圖所示，但該等微機電元件於封裝結構中之配置方式並不以此為限。 This embodiment is substantially the same as the previous embodiment, and the main difference is that a plurality of micro electromechanical components are disposed in one package structure for the purpose of integrating electrical properties, and the microelectromechanical components can be disposed adjacent to each other. That is, a second microelectromechanical element 21b is further disposed on the first surface 20a of the substrate 20, as shown in FIG. 3A; or, the microelectromechanical elements may be disposed on top of each other, that is, the first microelectromechanical device is disposed. Before the component 21a, the second micro-electromechanical component 21b is disposed on the substrate 20, the second micro-electromechanical component 21b is provided with a second cover 22b, and the first microelectromechanical component 21a is connected to the second by the bottom surface thereof. The second cover 22b of the MEMS element 21b is as shown in FIG. 3B, but the arrangement of the MEMS elements in the package structure is not limited thereto.

本發明復揭露一種具微機電元件之封裝結構，係包括：基板20，係具有相對之第一表面20a與第二表面20b，該第一表面20a上係具有複數第一電性連接墊201與複數第二電性連接墊202；至少一第一微機電元件21a，係設於該基板20之第一表面20a上；第一蓋體22a，係設於該第一微機電元件21a上，且該第一蓋體22a之頂面上形成有金屬層24；複數第二銲線252，係電性連接該第二電性連接墊202與第一微機電元件21a；複數第一線段251a，其一端電性連接該第一電性連接墊201；複數第二線段 251b，其一端電性連接該金屬層24；以及封裝層26，係形成於該基板20上以包覆該第一微機電元件21a、第一蓋體22a、第一線段251a、第二線段251b及第二銲線252，且該第一線段251a之另一端與第二線段251b之另一端係外露於該封裝層26之頂面。 The present invention discloses a package structure having a microelectromechanical component, comprising: a substrate 20 having a first surface 20a and a second surface 20b opposite thereto, the first surface 20a having a plurality of first electrical connection pads 201 and a plurality of second electrical connection pads 202; at least one first microelectromechanical component 21a is disposed on the first surface 20a of the substrate 20; the first cover 22a is disposed on the first microelectromechanical component 21a, and A metal layer 24 is formed on a top surface of the first cover 22a; a plurality of second bonding wires 252 are electrically connected to the second electrical connection pad 202 and the first microelectromechanical component 21a; and a plurality of first line segments 251a, One end is electrically connected to the first electrical connection pad 201; the plurality of second line segments 251b, one end of which is electrically connected to the metal layer 24; and an encapsulation layer 26 formed on the substrate 20 to cover the first microelectromechanical element 21a, the first cover 22a, the first line segment 251a, and the second line segment 251b and the second bonding wire 252, and the other end of the first line segment 251a and the other end of the second line segment 251b are exposed on the top surface of the encapsulation layer 26.

所述之具微機電元件之封裝結構復包括線路重佈層27，係形成於該封裝層26上並電性連接該第一線段251a，並復包括絕緣保護層28，係形成於該線路重佈層27上，且具有至少一外露部分該線路重佈層27之絕緣保護層開孔280，又復包括銲球29，係形成於該絕緣保護層開孔280中。 The package structure of the MEMS device includes a circuit redistribution layer 27 formed on the package layer 26 and electrically connected to the first line segment 251a, and further comprising an insulation protection layer 28 formed on the line The insulating layer opening 280 of the redistribution layer 27 and having at least one exposed portion of the circuit redistribution layer 27 further includes a solder ball 29 formed in the insulating protective layer opening 280.

於本實施例之具微機電元件之封裝結構中，該第二表面20b係具有對位鍵200，該對位鍵200係為凹穴。 In the package structure with microelectromechanical components of this embodiment, the second surface 20b has a registration key 200, which is a recess.

於本發明之封裝結構中，復包括第二微機電元件21b，係設於該第一微機電元件21a與基板20之間，該第二微機電元件21b藉其上的第二蓋體22b連接該第一微機電元件21a之底面。 In the package structure of the present invention, the second microelectromechanical component 21b is disposed between the first microelectromechanical component 21a and the substrate 20, and the second microelectromechanical component 21b is connected by the second cover 22b thereon. The bottom surface of the first microelectromechanical element 21a.

於上述之具微機電元件之封裝結構中，該第一微機電元件21a之底面係形成有黏著層23，以藉該黏著層23設於該基板20之第一表面20a上，該第一微機電元件21a為陀螺儀、加速度計、角速度計、磁力計、壓力計或射頻微機電元件。 In the package structure of the MEMS device, the bottom surface of the first MEMS element 21a is formed with an adhesive layer 23, and the adhesive layer 23 is disposed on the first surface 20a of the substrate 20, the first micro The electromechanical component 21a is a gyroscope, an accelerometer, an angular velocity meter, a magnetometer, a pressure gauge, or an RF microelectromechanical component.

綜上所述，相較於習知技術，由於本發明之具微機電元件之封裝結構及其製法係使用已切割完成之微機電元 件，因此可先篩選出已知良好晶粒(known good die，KGD)，進而能提升最終封裝結構的良率；此外，本發明復可在基板的底面形成對位鍵，以利在製程中用雙面對準器進行對位；再者，本發明可有效處理微機電元件小於基板的情況，且能同時將多個微機電元件整合在同一個封裝結構中，進而增進整體功能性。 In summary, compared with the prior art, the package structure of the microelectromechanical component of the present invention and the manufacturing method thereof use the microelectromechanical element that has been cut. Therefore, the known good die (KGD) can be screened first, thereby improving the yield of the final package structure; in addition, the present invention can form a registration bond on the bottom surface of the substrate to facilitate the process. The alignment is performed by the double-sided aligner; further, the invention can effectively handle the case where the micro-electromechanical component is smaller than the substrate, and can simultaneously integrate the plurality of micro-electromechanical components in the same package structure, thereby improving the overall functionality.

上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下，對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。 The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

10‧‧‧微機電元件基板 10‧‧‧Microelectromechanical device substrate

101‧‧‧微機電元件 101‧‧‧Microelectromechanical components

11‧‧‧蓋體 11‧‧‧ Cover

12‧‧‧特定應用積體電路晶片 12‧‧‧Special application integrated circuit chip

13,26‧‧‧封裝層 13,26‧‧‧Encapsulation layer

20’‧‧‧承載板 20’‧‧‧Bearing board

20‧‧‧基板 20‧‧‧Substrate

20a‧‧‧第一表面 20a‧‧‧ first surface

20b‧‧‧第二表面 20b‧‧‧second surface

201‧‧‧第一電性連接墊 201‧‧‧First electrical connection pad

202‧‧‧第二電性連接墊 202‧‧‧Second electrical connection pad

200‧‧‧對位鍵 200‧‧‧ alignment key

21a‧‧‧第一微機電元件 21a‧‧‧First microelectromechanical components

21b‧‧‧第二微機電元件 21b‧‧‧Second microelectromechanical components

22a‧‧‧第一蓋體 22a‧‧‧first cover

22b‧‧‧第二蓋體 22b‧‧‧Second cover

23‧‧‧黏著層 23‧‧‧Adhesive layer

24‧‧‧金屬層 24‧‧‧metal layer

251‧‧‧第一銲線 251‧‧‧First wire bond

251a‧‧‧第一線段 251a‧‧‧First line

251b‧‧‧第二線段 251b‧‧‧second line

252‧‧‧第二銲線 252‧‧‧second bonding wire

27‧‧‧線路重佈層 27‧‧‧Line redistribution

28‧‧‧絕緣保護層 28‧‧‧Insulation protection layer

280‧‧‧絕緣保護層開孔 280‧‧‧Insulating protective layer opening

29‧‧‧銲球 29‧‧‧ solder balls

第1A至IC圖係習知具微機電元件之封裝結構及其製法之剖視圖；第2A至2G圖係本發明之具微機電元件之封裝結構及其製法之第一實施例之剖視圖；以及第3A與3B圖係本發明之具微機電元件之封裝結構之第二實施例之剖視圖。 1A to 1C are cross-sectional views showing a package structure of a microelectromechanical device and a method of manufacturing the same; and FIGS. 2A to 2G are cross-sectional views showing a package structure of the microelectromechanical device of the present invention and a first embodiment thereof; 3A and 3B are cross-sectional views showing a second embodiment of the package structure of the microelectromechanical device of the present invention.

20‧‧‧基板 20‧‧‧Substrate

20a‧‧‧第一表面 20a‧‧‧ first surface

20b‧‧‧第二表面 20b‧‧‧second surface

201‧‧‧第一電性連接墊 201‧‧‧First electrical connection pad

202‧‧‧第二電性連接墊 202‧‧‧Second electrical connection pad

200‧‧‧對位鍵 200‧‧‧ alignment key

21a‧‧‧第一微機電元件 21a‧‧‧First microelectromechanical components

22a‧‧‧第一蓋體 22a‧‧‧first cover

23‧‧‧黏著層 23‧‧‧Adhesive layer

24‧‧‧金屬層 24‧‧‧metal layer

251a‧‧‧第一線段 251a‧‧‧First line

251b‧‧‧第二線段 251b‧‧‧second line

252‧‧‧第二銲線 252‧‧‧second bonding wire

26‧‧‧封裝層 26‧‧‧Encapsulation layer

27‧‧‧線路重佈層 27‧‧‧Line redistribution

28‧‧‧絕緣保護層 28‧‧‧Insulation protection layer

280‧‧‧絕緣保護層開孔 280‧‧‧Insulating protective layer opening

29‧‧‧銲球 29‧‧‧ solder balls

Claims (24)

一種具微機電元件之封裝結構，係包括：基板，係具有相對之第一表面與第二表面，該第一表面上係具有複數第一電性連接墊與複數第二電性連接墊；第一微機電元件，係設於該基板之第一表面側；第一蓋體，係設於該第一微機電元件上，且該第一蓋體之頂面上形成有金屬層；複數銲線，係電性連接該第二電性連接墊與第一微機電元件；複數第一線段，其一端電性連接該第一電性連接墊；以及封裝層，係形成於該基板上以包覆該第一微機電元件、第一蓋體、第一線段及銲線，且該第一線段之另一端係外露於該封裝層之頂面。 A package structure having a microelectromechanical component, comprising: a substrate having opposite first and second surfaces, the first surface having a plurality of first electrical connection pads and a plurality of second electrical connection pads; a microelectromechanical component is disposed on a first surface side of the substrate; a first cover is disposed on the first microelectromechanical component, and a metal layer is formed on a top surface of the first cover; a plurality of bonding wires Electrically connecting the second electrical connection pad and the first microelectromechanical component; a plurality of first line segments, one end of which is electrically connected to the first electrical connection pad; and an encapsulation layer formed on the substrate to package The first MEMS element, the first cover, the first line segment and the bonding wire are covered, and the other end of the first line segment is exposed on the top surface of the encapsulation layer. 如申請專利範圍第1項所述之具微機電元件之封裝結構，復包括複數第二線段，其一端電性連接該金屬層。 The package structure with a microelectromechanical component as described in claim 1, further comprising a plurality of second line segments, one end of which is electrically connected to the metal layer. 如申請專利範圍第2項所述之具微機電元件之封裝結構，其中，該第二線段之另一端係外露於該封裝層之頂面。 The package structure of the microelectromechanical component according to claim 2, wherein the other end of the second line segment is exposed on a top surface of the encapsulation layer. 如申請專利範圍第1項所述之具微機電元件之封裝結構，其中，該基板係為半導體晶片。 A package structure having a microelectromechanical component as described in claim 1, wherein the substrate is a semiconductor wafer. 如申請專利範圍第4項所述之具微機電元件之封裝結構，其中，該半導體晶片係具有特定應用積體電路。 A package structure having a microelectromechanical component as described in claim 4, wherein the semiconductor wafer has a specific application integrated circuit. 如申請專利範圍第1項所述之具微機電元件之封裝結構，復包括線路重佈層，係形成於該封裝層上並電性連接該第一線段。 The package structure with a microelectromechanical component as described in claim 1, further comprising a circuit redistribution layer formed on the encapsulation layer and electrically connected to the first line segment. 如申請專利範圍第3項所述之具微機電元件之封裝結構，復包括線路重佈層，係形成於該封裝層上並電性連接該第二線段。 The package structure with a microelectromechanical component as described in claim 3, further comprising a circuit redistribution layer formed on the encapsulation layer and electrically connected to the second line segment. 如申請專利範圍第1項所述之具微機電元件之封裝結構，其中，該第二表面係具有對位鍵。 The package structure of the microelectromechanical component according to claim 1, wherein the second surface has a registration bond. 如申請專利範圍第8項所述之具微機電元件之封裝結構，其中，該對位鍵係為凹穴。 The package structure of the microelectromechanical component according to claim 8, wherein the alignment bond is a recess. 如申請專利範圍第1項所述之具微機電元件之封裝結構，復包括第二微機電元件，係設於該第一微機電元件與基板之間，該第二微機電元件上設有第二蓋體，以藉之連接該第一微機電元件之底面。 The package structure of the microelectromechanical component according to claim 1, wherein the second microelectromechanical component is disposed between the first microelectromechanical component and the substrate, and the second microelectromechanical component is provided with a cover body for connecting the bottom surface of the first MEMS element. 如申請專利範圍第1項所述之具微機電元件之封裝結構，其中，該第一微機電元件為陀螺儀、加速度計、角速度計、磁力計、壓力計或射頻微機電元件。 The package structure of the microelectromechanical component according to claim 1, wherein the first microelectromechanical component is a gyroscope, an accelerometer, an angular velocity meter, a magnetometer, a pressure gauge or an RF microelectromechanical component. 一種具微機電元件之封裝結構之製法，係包括：於一基板之第一表面側設置第一微機電元件，其中，該第一表面上係具有複數第一電性連接墊與複數第二電性連接墊，該第一微機電元件上設有第一蓋體，且該第一蓋體之頂面上形成有金屬層；藉由複數第一銲線電性連接該金屬層與第一電性連接墊，並藉由複數第二銲線電性連接該第一微機電 元件與第二電性連接墊；於該基板上形成封裝層以包覆該第一微機電元件、第一蓋體、第一銲線與第二銲線；以及從該封裝層頂面移除部分該封裝層，俾使該第一銲線分成互不連接的複數第一線段，該第一線段之頂端外露於該封裝層頂面，且該第一線段係電性連接該第一電性連接墊。 A method for fabricating a package structure of a microelectromechanical component, comprising: disposing a first microelectromechanical component on a first surface side of a substrate, wherein the first surface has a plurality of first electrical connection pads and a plurality of second electrodes The first MEMS device is provided with a first cover body, and a metal layer is formed on the top surface of the first cover body; the metal layer is electrically connected to the first electrode by a plurality of first bonding wires a connection pad and electrically connecting the first MEMS by a plurality of second bonding wires And a second electrical connection pad; forming an encapsulation layer on the substrate to cover the first micro electromechanical component, the first cover, the first bonding wire and the second bonding wire; and removing from the top surface of the encapsulation layer Part of the encapsulation layer, the first bonding wire is divided into a plurality of first line segments that are not connected to each other, the top end of the first line segment is exposed on a top surface of the encapsulation layer, and the first line segment is electrically connected to the first line segment An electrical connection pad. 如申請專利範圍第12項所述之具微機電元件之封裝結構之製法，其中，該第一銲線復分成互不連接的複數第二線段，其一端電性連接該金屬層。 The method for manufacturing a package structure with a microelectromechanical component according to claim 12, wherein the first bonding wire is divided into a plurality of second wire segments that are not connected to each other, and one end of which is electrically connected to the metal layer. 如申請專利範圍第13項所述之具微機電元件之封裝結構之製法，其中，該第二線段之另一端係外露於該封裝層之頂面。 The method of fabricating a package structure for a microelectromechanical device according to claim 13 , wherein the other end of the second line segment is exposed on a top surface of the encapsulation layer. 如申請專利範圍第12項所述之具微機電元件之封裝結構之製法，其中，該基板係為半導體晶片。 The method of fabricating a package structure for a microelectromechanical device according to claim 12, wherein the substrate is a semiconductor wafer. 如申請專利範圍第15項所述之具微機電元件之封裝結構之製法，其中，該半導體晶片係具有特定應用積體電路。 The method of fabricating a package structure for a microelectromechanical device according to claim 15, wherein the semiconductor wafer has a specific application integrated circuit. 如申請專利範圍第12項所述之具微機電元件之封裝結構之製法，復包括進行切單製程。 The method for manufacturing a package structure with a microelectromechanical component as described in claim 12 of the patent application, including the singulation process. 如申請專利範圍第12項所述之具微機電元件之封裝結構之製法，復包括於該封裝層上形成電性連接該第一線段的線路重佈層。 The method for manufacturing a package structure with a microelectromechanical device according to claim 12, further comprising forming a circuit redistribution layer electrically connected to the first line segment on the encapsulation layer. 如申請專利範圍第14項所述之具微機電元件之封裝結 構之製法，復包括於該封裝層上形成電性連接該第二線段的線路重佈層。 Encapsulation of a microelectromechanical component as described in claim 14 The method comprises the steps of: forming a circuit redistribution layer electrically connected to the second line segment on the encapsulation layer. 如申請專利範圍第12項所述之具微機電元件之封裝結構之製法，其中，該基板係具有相對該第一表面之第二表面，且該第二表面係具有對位鍵。 The method of fabricating a package structure for a microelectromechanical component according to claim 12, wherein the substrate has a second surface opposite to the first surface, and the second surface has an alignment bond. 如申請專利範圍第20項所述之具微機電元件之封裝結構之製法，其中，該對位鍵係為凹穴。 The method of fabricating a package structure for a microelectromechanical component according to claim 20, wherein the alignment bond is a recess. 如申請專利範圍第12項所述之具微機電元件之封裝結構之製法，於設置該第一微機電元件之前，復包括於該基板上設置第二微機電元件，該第二微機電元件上設有第二蓋體，且該第一微機電元件藉其底面連接該第二微機電元件的第二蓋體。 The method for manufacturing a package structure with a microelectromechanical component according to claim 12, before the first microelectromechanical component is disposed, the second microelectromechanical component is disposed on the substrate, and the second microelectromechanical component is disposed on the substrate A second cover is disposed, and the first microelectromechanical component is connected to the second cover of the second microelectromechanical component by a bottom surface thereof. 如申請專利範圍第12項所述之具微機電元件之封裝結構之製法，移除部分該封裝層之方式係為研磨、雷射、電漿或化學蝕刻。 For example, in the method of manufacturing a package structure with a microelectromechanical component according to claim 12, part of the encapsulation layer is removed by grinding, laser, plasma or chemical etching. 如申請專利範圍第12項所述之具微機電元件之封裝結構之製法，其中，該第一微機電元件為陀螺儀、加速度計、角速度計、磁力計、壓力計或射頻微機電元件。 The method of fabricating a package structure for a microelectromechanical component according to claim 12, wherein the first microelectromechanical component is a gyroscope, an accelerometer, an angular velocity meter, a magnetometer, a pressure gauge or an RF microelectromechanical component.
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