TW201336260A - System and method of analyzing stability of data processing devices - Google Patents

System and method of analyzing stability of data processing devices Download PDF

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Publication number
TW201336260A
TW201336260A TW101105233A TW101105233A TW201336260A TW 201336260 A TW201336260 A TW 201336260A TW 101105233 A TW101105233 A TW 101105233A TW 101105233 A TW101105233 A TW 101105233A TW 201336260 A TW201336260 A TW 201336260A
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TW
Taiwan
Prior art keywords
according
system
data processing
disturbed
group
Prior art date
Application number
TW101105233A
Inventor
Cheng-Shien Li
Shou-Kuo Hsu
Original Assignee
Hon Hai Prec Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hon Hai Prec Ind Co Ltd filed Critical Hon Hai Prec Ind Co Ltd
Priority to TW101105233A priority Critical patent/TW201336260A/en
Publication of TW201336260A publication Critical patent/TW201336260A/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/20Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/203Details of error rate determination, e.g. BER, FER or WER

Abstract

The present invention provides a system of analyzing stability of data processing device. The system computes a group of optimal Equalizer parameters from more than one group of Equalizer parameters according to data of time and voltage that represent a signal which is generated by a data processing device, and further according to an interval of transmitting the signal. The system computes a sample duration according to a predetermined bit error ratio (BER) and the interval. The system further computes disturbed voltages of the signal according to the group of optimal Equalizer parameters and the sample duration, analyzes frequencies of each disturbed voltage, and selects the disturbed voltage whose frequency is equal to the predetermined BER. The system further constructs an eye diagram according to the selected disturbed voltages, and determines stability of the data processing device according to the eye diagram.
TW101105233A 2012-02-17 2012-02-17 System and method of analyzing stability of data processing devices TW201336260A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW101105233A TW201336260A (en) 2012-02-17 2012-02-17 System and method of analyzing stability of data processing devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW101105233A TW201336260A (en) 2012-02-17 2012-02-17 System and method of analyzing stability of data processing devices
US13/741,538 US8913654B2 (en) 2012-02-17 2013-01-15 Data processing device and method for analyzing stability of data processing device

Publications (1)

Publication Number Publication Date
TW201336260A true TW201336260A (en) 2013-09-01

Family

ID=48982238

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101105233A TW201336260A (en) 2012-02-17 2012-02-17 System and method of analyzing stability of data processing devices

Country Status (2)

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US (1) US8913654B2 (en)
TW (1) TW201336260A (en)

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5955992A (en) * 1998-02-12 1999-09-21 Shattil; Steve J. Frequency-shifted feedback cavity used as a phased array antenna controller and carrier interference multiple access spread-spectrum transmitter
US6678230B2 (en) * 2000-10-31 2004-01-13 Matsushita Electric Industrial Co., Ltd. Waveform equalizer for a reproduction signal obtained by reproducing marks and non-marks recorded on a recording medium
US7054375B2 (en) * 2000-12-22 2006-05-30 Nokia Corporation Method and apparatus for error reduction in an orthogonal modulation system
US7492818B2 (en) * 2002-04-17 2009-02-17 Thomson Licensing Equalizer mode switch
US7292629B2 (en) * 2002-07-12 2007-11-06 Rambus Inc. Selectable-tap equalizer
US20040120406A1 (en) * 2002-12-18 2004-06-24 Shawn Searles System and method for characterizing the performance of data communication systems and devices
JP4118186B2 (en) * 2003-04-30 2008-07-16 シャープ株式会社 Data transmitting apparatus and a data receiving apparatus and data communication system
KR100556401B1 (en) * 2003-12-04 2006-03-03 엘지전자 주식회사 Equalizer in VSB receiver
US7363563B1 (en) * 2003-12-05 2008-04-22 Pmc-Sierra, Inc. Systems and methods for a built in test circuit for asynchronous testing of high-speed transceivers
WO2006032149A1 (en) * 2004-09-24 2006-03-30 Socovar S.E.C. Multi-equalization method and apparatus
TW201133259A (en) * 2010-03-18 2011-10-01 Hon Hai Prec Ind Co Ltd System and method for synthesizing signals
TW201138332A (en) * 2010-04-21 2011-11-01 Hon Hai Prec Ind Co Ltd System and method for computing optimal parameters of an Equalizer
US8615062B2 (en) * 2012-02-07 2013-12-24 Lsi Corporation Adaptation using error signature analysis in a communication system

Also Published As

Publication number Publication date
US20130215944A1 (en) 2013-08-22
US8913654B2 (en) 2014-12-16

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