TW201310532A - Method for forming gate insulating film, and device for forming gate insulating film - Google Patents

Method for forming gate insulating film, and device for forming gate insulating film Download PDF

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TW201310532A
TW201310532A TW101119001A TW101119001A TW201310532A TW 201310532 A TW201310532 A TW 201310532A TW 101119001 A TW101119001 A TW 101119001A TW 101119001 A TW101119001 A TW 101119001A TW 201310532 A TW201310532 A TW 201310532A
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film
forming
gate insulating
insulating film
gas
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Shintaro Aoyama
Masanobu Igeta
Takahiro HAKAMATA
Yutaka Fujino
Junichi Kitagawa
Koji Akiyama
Clark Robert
Tamaki Takeyama
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Tokyo Electron Ltd
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    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02148Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing hafnium, e.g. HfSiOx or HfSiON
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    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
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    • H01L21/02107Forming insulating materials on a substrate
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    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
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    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate

Abstract

A method for forming a gate insulating film, in which a gate insulating film is formed on a semiconductor substrate, comprises: a film formation step of forming a high-dielectric film on the semiconductor substrate using CVD or ALD; a first modification step of applying radial treatment to, and modifying, the formed high-dielectric film at a temperature lower than the film formation temperature; and a second modification step of applying heat treatment to, and causing crystallization in, the high-dielectric film formed in the first modification step.

Description

閘極絕緣膜之形成方法及閘極絕緣膜之形成裝置 Method for forming gate insulating film and device for forming gate insulating film

本發明係關於閘極絕緣膜之形成方法及閘極絕緣膜之形成裝置。 The present invention relates to a method of forming a gate insulating film and a device for forming a gate insulating film.

近來,為了使MOSFET的閘極絕緣膜的膜厚在實效上變薄而使半導體電路的性能提升,使用高介電係數膜(High-k膜)作為閘極絕緣膜,但是其中亦以鉿氧化物系材料備受矚目,在介電係數較低的狀態下,使HfSiON膜或HfO2膜實用化(例如專利文獻1)。 Recently, in order to improve the performance of a semiconductor circuit by thinning the film thickness of the gate insulating film of the MOSFET, a high dielectric constant film (High-k film) is used as a gate insulating film, but yttrium oxide is also used therein. The material of the material is attracting attention, and the HfSiON film or the HfO 2 film is put into practical use in a state where the dielectric constant is low (for example, Patent Document 1).

以HfSiON膜或HfO2膜般的鉿氧化物系材料膜的成膜手法而言,使用階梯覆蓋性佳的CVD(Chemical Vapor Deposition,化學氣相沈積)或ALD(Atomic Layered Deposition,原子層沈積)。該等之中,CVD的成膜溫度為較高溫的500℃,相對於此,以ALD係可進行300℃左右的低溫成膜,階梯覆蓋性亦以ALD更為良好,因此逐漸喜歡使用ALD。 In the film formation method of the HfSiON film or the HfO 2 film-like ruthenium oxide material film, CVD (Chemical Vapor Deposition) or ALD (Atomic Layered Deposition) is used. . Among these, the film formation temperature of CVD is 500 ° C at a relatively high temperature, whereas the ALD system can form a film at a low temperature of about 300 ° C, and the step coverage is also better with ALD. Therefore, ALD is gradually preferred.

此外,最近由於圖求閘極絕緣膜的介電係數更進一步上升,為了改善膜質而提高介電係數,往往使用高溫(成膜溫度以上、至1000℃左右)下的退火(例如專利文獻2)。此外,亦嘗試控制退火的方法,將HfO2的結晶狀態形成為介電係數更高的Cubic或Tetragonal而使介電係數更加提高(例如專利文獻3)。 In addition, recently, the dielectric constant of the gate insulating film has been further increased, and in order to improve the film quality and improve the dielectric constant, annealing at a high temperature (above the film forming temperature to about 1000 ° C) is often used (for example, Patent Document 2). . Further, attempts have been made to control the annealing method to form a crystal state of HfO 2 into Cubic or Tetragonal having a higher dielectric constant to further improve the dielectric constant (for example, Patent Document 3).

先前技術文獻 Prior technical literature 專利文獻 Patent literature

專利文獻1:日本特開2006-128547號公報 Patent Document 1: Japanese Laid-Open Patent Publication No. 2006-128547

專利文獻2:美國專利公開2005/0136690A1號公報 Patent Document 2: US Patent Publication No. 2005/0136690A1

專利文獻3:國際公開2006/025350號小冊 Patent Document 3: International Publication No. 2006/025350

但是,伴隨著半導體積體電路的微細化,量產採用一種在工程的最後製作MOSFET的Gate-Last的手法。在Gate-Last的手法中,需要高溫的熱處理的擴散工程等係在製程的前半進行,此外在形成閘極時,亦會有被製作金屬配線的一部分的情形。在如上所示之狀況下,要在形成閘極絕緣膜之後進行如習知般在高溫下的熱處理(退火)來將High-k膜進行改質並不易進行,對退火溫度與退火時間(熱預算(Thermal budget))施加限制。因此,不易獲得膜質良、介電係數高的High-k膜。 However, with the miniaturization of the semiconductor integrated circuit, mass production uses a Gate-Last method of fabricating a MOSFET at the end of the project. In the Gate-Last method, a diffusion process requiring heat treatment at a high temperature is performed in the first half of the process, and when a gate is formed, a part of the metal wiring may be formed. In the case as described above, heat treatment (annealing) at a high temperature as is conventionally performed after forming the gate insulating film to modify the High-k film is difficult to perform, and the annealing temperature and annealing time (heat) The budget (Thermal budget) imposes restrictions. Therefore, it is difficult to obtain a High-k film having a good film quality and a high dielectric constant.

因此,本發明之目的在提供以較小的熱預算即可得高介電係數的閘極絕緣膜的閘極絕緣膜之形成方法及閘極絕緣膜之形成裝置。 Accordingly, an object of the present invention is to provide a method of forming a gate insulating film of a gate insulating film which can obtain a high dielectric constant with a small thermal budget, and a device for forming a gate insulating film.

藉由本發明之第1觀點,提供一種閘極絕緣膜之形成方法,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成方法,其具有:成膜工程,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;第1改質工程,其係以低於成膜溫度的溫度,對前述所成膜的高介電 係數膜施行自由基處理來進行改質;及第2改質工程,其係對在前述第1改質工程中所成膜的前述高介電係數膜施行熱處理而結晶化。 According to a first aspect of the present invention, a method of forming a gate insulating film, which is a method of forming a gate insulating film for forming a gate insulating film on a semiconductor substrate, has a film forming process by CVD Or ALD, forming a high dielectric constant film on a semiconductor substrate; the first modification project is to form a high dielectric of the film formed at a temperature lower than the film forming temperature. The coefficient film is subjected to radical treatment for modification; and the second modification process is performed by subjecting the high dielectric constant film formed in the first modification process to heat treatment to be crystallized.

藉由本發明之第2觀點,提供一種閘極絕緣膜之形成方法,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成方法,其具有:成膜工程,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;第1改質工程,其係以低於結晶化溫度的溫度,對前述所成膜的高介電係數膜施行自由基處理來進行改質,而得非晶質狀態的膜;及第2改質工程,其係對前述第1改質工程後的前述高介電係數膜,藉由熱處理進行急速升降溫處理來進行結晶控制。 According to a second aspect of the present invention, there is provided a method of forming a gate insulating film which is a method of forming a gate insulating film for forming a gate insulating film on a semiconductor substrate, comprising: a film forming process by CVD Or ALD, forming a high dielectric constant film on a semiconductor substrate; the first modification project is to perform a radical treatment on the formed high dielectric constant film at a temperature lower than the crystallization temperature. The film is obtained in an amorphous state, and the second modification process is performed by performing a rapid temperature rise and fall process on the high dielectric constant film after the first modification process by heat treatment.

藉由本發明之第3觀點,提供一種閘極絕緣膜之形成方法,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成方法,其具有:成膜工程,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;及改質工程,其係對前述高介電係數膜照射微波,藉由微波加熱來將前述高介電係數膜進行改質。 According to a third aspect of the present invention, there is provided a method of forming a gate insulating film which is a method of forming a gate insulating film for forming a gate insulating film on a semiconductor substrate, comprising: a film forming process by CVD Or ALD, forming a high-k film on a semiconductor substrate; and modifying the substrate by irradiating the high-k film with microwaves and modifying the high-k film by microwave heating.

藉由本發明之第4觀點,提供一種閘極絕緣膜之形成方法,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成方法,其具有:成膜工程,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;及改質工程,其係藉由將前述高介電係數膜以發光二極體進行加熱來將高介電係數膜進行改質。 According to a fourth aspect of the present invention, there is provided a method of forming a gate insulating film which is a method of forming a gate insulating film for forming a gate insulating film on a semiconductor substrate, comprising: a film forming process by CVD Or ALD, forming a high dielectric constant film on a semiconductor substrate; and modifying the process by modifying the high dielectric constant film by heating the high dielectric constant film with a light emitting diode.

藉由本發明之第5觀點,提供一種閘極絕緣膜之形成裝置,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成裝置,其具有:成膜裝置,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;第1改質處理裝置,其係以低於成膜溫度的溫度,對前述所成膜的高介電係數膜施行自由基處理來進行改質;第2改質處理裝置,其係對藉由前述第1改質處理裝置來進行第1改質處理後的高介電係數膜施行熱處理而結晶化;及控制部,其係以在前述成膜裝置的成膜處理、在前述第1改質處理裝置的第1改質處理、及在前述第2改質處理裝置的第2改質處理以該順序進行的方式來進行控制。 According to a fifth aspect of the present invention, there is provided a device for forming a gate insulating film, which is a device for forming a gate insulating film of a gate insulating film on a semiconductor substrate, comprising: a film forming device by CVD Or ALD, forming a high dielectric constant film on a semiconductor substrate; and the first modification processing device performing a radical treatment on the formed high dielectric constant film at a temperature lower than a film formation temperature The second modification treatment device is configured to perform crystallization by heating the high dielectric constant film after the first modification treatment by the first modification treatment device, and the control unit is configured to The film formation process of the film formation apparatus, the first modification process of the first modification process device, and the second modification process of the second modification process device are performed in this order.

藉由本發明之第6觀點,提供一種閘極絕緣膜之形成裝置,其係具有:處理容器,其係收容半導體基板;氣體供給機構,其係用以對前述處理容器內供給供成膜高介電係數膜之用的成膜氣體;複數微波導入機構,其係具有:導引微波的導波管、照射微波且形成有槽孔的平面天線、及與前述平面天線近接而設且使阻抗整合的芯塊調諧器,且對前述處理容器內導入微波;及微波照射機構,其係對半導體基板照射微波,在前述處理容器內進行:高介電係數膜的成膜;利用藉由由前述微波導入機構所被導入的微波所生成的微波電漿所為之第1改質處理;及藉由前述微波照射機構來進行微波加熱的第2改質處理。 According to a sixth aspect of the present invention, there is provided a device for forming a gate insulating film, comprising: a processing container for accommodating a semiconductor substrate; and a gas supply mechanism for supplying a film forming film into the processing container a film forming gas for an electric coefficient film; a plurality of microwave introducing means having: a waveguide for guiding microwaves, a planar antenna for irradiating microwaves and forming a slot, and a proximity of the planar antenna to integrate impedance a pellet tuner, and introducing microwaves into the processing container; and a microwave irradiation mechanism for irradiating the semiconductor substrate with microwaves, wherein: forming a film of a high dielectric constant film; and using the microwave The first modification process is performed by the microwave plasma generated by the microwave introduced by the introduction mechanism, and the second modification process of performing microwave heating by the microwave irradiation means.

以下參照所附圖示,具體說明本發明之實施形態。 Embodiments of the present invention will be specifically described below with reference to the accompanying drawings.

<基本機制> <basic mechanism>

介電質的介電係數ε與密度的關係係可藉由以下(1)式所示之克勞修斯-莫梭提(Clausius-Mossotti)來掌握。 The relationship between the dielectric constant ε of the dielectric and the density can be grasped by Clausius-Mossotti as shown in the following formula (1).

(4/3).πnα=(ε-1)/(ε+2)………(1) (4/3). Πnα=(ε-1)/(ε+2).........(1)

其中,α為分極率、n為分極子的密度。 Where α is the polarization ratio and n is the density of the dipole.

亦即,左邊的(4/3).πnα係與密度成正比的值,若在橫軸取ε,縱軸取(4/3).πnα時,形成圖1所示關係,介電質的密度愈高,介電係數愈高。 That is, on the left (4/3). The πnα system is proportional to the density. If ε is taken on the horizontal axis and (4/3) is plotted on the vertical axis. When πnα, the relationship shown in Fig. 1 is formed, and the higher the density of the dielectric, the higher the dielectric constant.

現狀之作為High-k膜的HfO2膜係介電係數ε為12左右,以膜厚3nm,EOT(Equivalent Oxide Thickness:SiO2容量換算膜厚)為1.02nm,但是由圖1可知,例如使介電係數ε上升至20左右,以膜厚3nm將EOT形成為0.6nm,因此若使密度上升10%程度即可。 The HfO 2 film system having a high-k film has a dielectric constant ε of about 12, a film thickness of 3 nm, and an EOT (Equivalent Oxide Thickness: SiO 2 capacity conversion film thickness) of 1.02 nm. However, as shown in FIG. The dielectric constant ε is increased to about 20, and the EOT is formed to be 0.6 nm at a film thickness of 3 nm. Therefore, the density may be increased by 10%.

因此,在本發明中,藉由較小的熱預算的處理使構成閘極絕緣膜的High-k膜的密度上升,而使膜的介電係數上升作為第1基本概念。此外,為了獲得高介電係數及密度,必須膜呈結晶化。 Therefore, in the present invention, the density of the High-k film constituting the gate insulating film is increased by the treatment of a small thermal budget, and the dielectric constant of the film is increased as the first basic concept. Further, in order to obtain a high dielectric constant and density, it is necessary to crystallize the film.

<第1實施形態> <First embodiment>

在第1實施形態中,考慮到以上情形,以下列說明的方法來形成閘極絕緣膜。圖2係用以說明本發明之第1實 施形態之閘極絕緣膜之形成方法的流程圖。 In the first embodiment, in consideration of the above, the gate insulating film is formed by the method described below. Figure 2 is a diagram for explaining the first embodiment of the present invention. A flow chart of a method of forming a gate insulating film.

首先,藉由稀氫氟酸等,將矽晶圓1的表面清淨化,另外視需要,進行形成由SiO2所成之界面層的前處理(工程1),之後成膜High-k膜(工程2)。以High-k膜而言,可適於使用鉿氧化物材料膜,典型而言為氧化鉿(HfO2)膜或鉿矽酸鹽(HfSiOx)膜。 First, the surface of the tantalum wafer 1 is cleaned by dilute hydrofluoric acid or the like, and if necessary, pretreatment (formation 1) of forming an interface layer made of SiO 2 is performed, and then a high-k film is formed ( Project 2). In the case of a High-k film, a film of a tantalum oxide material, typically a hafnium oxide (HfO 2 ) film or a niobate (HfSiOx) film, can be suitably used.

此時的成膜係可以CVD或ALD來進行。尤其,以可以低溫成膜,階梯覆蓋性良好的ALD來進行為佳。 The film formation system at this time can be performed by CVD or ALD. In particular, it is preferably carried out by ALD which can form a film at a low temperature and has good step coverage.

藉由CVD或ALD來成膜HfO2膜時,係使用Hf源氣與氧化劑作為成膜氣體。 When a film of HfO 2 is formed by CVD or ALD, a Hf source gas and an oxidizing agent are used as a film forming gas.

以Hf源而言,可適於使用有機金屬化合物,可列舉如:例如TDEAH(四(二乙胺基)鉿)、四(乙基甲基胺基酸)鉿(TEMAH)等醯胺系有機鉿化合物、或四叔丁氧基鉿(HTB)等醇氧化合物系有機鉿化合物。以氧化劑而言,可使用O3氣體、H2O氣體、O2氣體、NO2氣體、NO氣體、N2O氣體等。亦可將氧化劑電漿化而提高反應性。此外,亦可為使用O2氣體與H2氣體的自由基氧化。 The Hf source may be suitably used as an organometallic compound, and examples thereof include amide-based organic compounds such as TDEAH (tetrakis(diethylamino)phosphonium) and tetrakis(ethylmethylamino acid) ruthenium (TEMAH). An anthracene compound or an alcohol compound such as tetra-t-butoxyfluorene (HTB) is an organic hydrazine compound. As the oxidizing agent, O 3 gas, H 2 O gas, O 2 gas, NO 2 gas, NO gas, N 2 O gas or the like can be used. The oxidant can also be plasmad to increase reactivity. Further, it is also possible to use radical oxidation of O 2 gas and H 2 gas.

藉由CVD來成膜HfO2膜時,係一面將矽晶圓加熱一面同時供給該等Hf源與氧化劑而在矽晶圓上或其上的界面層上起反應,而成膜HfO2膜。此外,若為ALD的情形,交替反覆使Hf源薄層吸附後再供給氧化劑的動作而成膜HfO2膜。 When the HfO 2 film is formed by CVD, the Hf source is irradiated while the Hf source is heated, and the Hf source is reacted on the germanium wafer or the interface layer thereon to form a film of HfO 2 . Further, in the case of ALD, the HfO 2 film is formed by alternately repeatedly adsorbing the Hf source thin layer and then supplying the oxidizing agent.

藉由CVD或ALD來成膜HfSiOx膜時,使用Hf源氣、Si源氣、及氧化劑來作為成膜氣體。 When a HfSiOx film is formed by CVD or ALD, a Hf source gas, a Si source gas, and an oxidizing agent are used as a film forming gas.

亦可使用與HfO2膜之時相同者來作為Hf源、氧化劑。以Si源而言,可列舉TDMAS(四(二甲胺基)矽烷)等醯胺系有機矽化合物、或TEOS(四乙氧基矽烷)等醇氧化合物系有機矽化合物、或二矽烷(Si2H6)等無機系矽烷化合物。 The same as the HfO 2 film may be used as the Hf source or the oxidizing agent. Examples of the Si source include a guanamine-based organic ruthenium compound such as TDMAS (tetrakis(dimethylamino)decane) or an alcohol compound-based organic ruthenium compound such as TEOS (tetraethoxydecane) or dioxane (Si). 2 H 6 ) and other inorganic decane compounds.

藉由CVD來成膜HfSiOx膜時,一面將矽晶圓加熱一面同時供給該等Hf源、Si源氣、與氧化劑而在矽晶圓上或其上的界面層上起反應而成膜HfSiOx膜。此外,若為ALD的情形,例如反覆進行在使Hf源薄層吸附後再供給氧化劑而使其氧化,接著在使Si源薄層吸附後再氧化的動作,而成膜HfSiOx膜。 When a HfSiOx film is formed by CVD, the HfSiOx film is formed by heating the germanium wafer while supplying the Hf source, the Si source gas, and the oxidant on the germanium wafer or the interface layer thereon. . Further, in the case of ALD, for example, an Hf source film is adsorbed after the Hf source thin layer is adsorbed, and then oxidized, and then the Si source thin layer is adsorbed and then oxidized to form a film of HfSiOx film.

藉由上述CVD來成膜HfO2膜、HfSiOx膜時,係使用350~600℃,例如500℃左右的成膜溫度,在藉由ALD成膜時,係使用150~350℃,例如300℃左右的成膜溫度。 When the HfO 2 film or the HfSiOx film is formed by the above CVD, a film forming temperature of 350 to 600 ° C, for example, about 500 ° C is used, and when film formation by ALD, 150 to 350 ° C, for example, about 300 ° C is used. Film formation temperature.

如上所示在保持以CVD或ALD成膜的狀態,係如圖3(a)所示者,膜中含有大量雜質,而且原子排列不規則而為非晶質狀。因此,在該狀態下,密度低且膜質亦差劣,因此為介電係數較低的狀態。尤其,若為ALD的情形,由於以低溫進行成膜,因此容易殘留雜質。 As shown above, in the state in which film formation by CVD or ALD is maintained, as shown in Fig. 3 (a), the film contains a large amount of impurities, and the atoms are irregularly arranged in an amorphous state. Therefore, in this state, the density is low and the film quality is also inferior, so that the dielectric constant is low. In particular, in the case of ALD, since the film formation is performed at a low temperature, impurities are likely to remain.

因此,在本實施形態中,係在成膜後,藉由低溫下的自由基處理,進行第1改質處理(工程3)。藉由該自由基處理,如圖3(b)所示,去除膜中雜質而使膜質提升,並且使膜的密度上升。若該自由基處理的溫度超過成膜溫度,反而使密度上升的效果會降低,因此較佳為成膜溫度 以下。以如上所示之自由基處理而言,可適於使用紫外線激發自由基氧化處理及微波電漿處理。 Therefore, in the present embodiment, after the film formation, the first modification treatment (Project 3) is performed by radical treatment at a low temperature. By this radical treatment, as shown in FIG. 3(b), impurities in the film are removed to enhance the film quality, and the density of the film is increased. If the temperature of the radical treatment exceeds the film formation temperature, the effect of increasing the density is lowered, so that the film formation temperature is preferred. the following. In the case of the radical treatment as described above, it is suitable to use ultraviolet-ray-excited radical oxidation treatment and microwave plasma treatment.

該改質處理較佳為可以較小的熱預算,而且儘量使High-k膜本身及界面層未增膜,來有效去除膜中雜質,由如上所示之觀點來看,可適於使用350℃以下的紫外線激發自由基氧化處理。為了儘量抑制界面層的增膜,可適於使用室溫下的紫外線激發自由基氧化處理。此外,紫外線激發自由基氧化處理係較佳為在含有O2氣體的環境氣體下進行,較佳為O2氣體的分壓為1.33Pa以上。如上所示之紫外線激發自由基氧化處理係使用後述之圖22所示之紫外線照射裝置來進行。 The modification process preferably has a small thermal budget, and the High-k film itself and the interface layer are not coated as much as possible to effectively remove impurities in the film. From the viewpoint of the above, the 350 can be suitably used. Ultraviolet-excited radical oxidation treatment below °C. In order to suppress the film formation of the interface layer as much as possible, it is suitable to use a UV-excited radical oxidation treatment at room temperature. Further, the ultraviolet excitation radical oxidation treatment is preferably carried out under an atmosphere containing O 2 gas, and preferably, the partial pressure of the O 2 gas is 1.33 Pa or more. The ultraviolet excitation radical oxidation treatment as described above is carried out using an ultraviolet irradiation apparatus shown in Fig. 22 which will be described later.

此外,微波電漿係具有電漿密度高且電子溫度低的優點。以處理氣體而言,可適於使用O2氣體、Ar等稀有氣體、N2氣體等。具體而言,可使用O2氣體、O2氣體+稀有氣體、稀有氣體、稀有氣體+N2氣體。其中,使用O2氣體時,會有使界面層增膜的傾向。此外,微波電漿處理時的溫度係以350℃以下為更佳。如上所示之微波電漿處理係可使用後述之圖23、24所示之微波電漿處理裝置來進行。 In addition, the microwave plasma has the advantages of high plasma density and low electron temperature. As the processing gas, an O 2 gas, a rare gas such as Ar, an N 2 gas, or the like can be suitably used. Specifically, O 2 gas, O 2 gas + rare gas, rare gas, rare gas + N 2 gas can be used. Among them, when O 2 gas is used, there is a tendency for the interface layer to be formed. Further, the temperature at the time of microwave plasma treatment is preferably 350 ° C or less. The microwave plasma processing system as described above can be carried out using the microwave plasma processing apparatus shown in Figs. 23 and 24 to be described later.

可藉由如以上所示之低溫下的自由基處理來去除雜質,但是由於結晶化尚不充分,因此為介電係數尚未充分上升的狀態。因此,在工程3的第1改質處理之後,進行第2改質處理,將High-k膜結晶化如圖3(c)所示(工程4)。 The impurities can be removed by radical treatment at a low temperature as described above, but since the crystallization is not sufficient, the dielectric constant is not sufficiently increased. Therefore, after the first modification process of the process 3, the second modification process is performed, and the High-k film is crystallized as shown in FIG. 3(c) (Project 4).

第2改質處理係用以供予供結晶化用之能量的熱處理,必須以不會對元件造成熱影響的程度的熱預算來進行。High-k膜係藉由第1改質處理來去除雜質,因此在第2改質處理中,可以較小的熱預算來使膜結晶化。 The second modification treatment is a heat treatment for supplying energy for crystallization, and must be performed at a thermal budget to the extent that it does not affect the heat of the element. Since the High-k film removes impurities by the first modification process, the film can be crystallized with a small thermal budget in the second modification process.

以如上所示之較小熱預算下的結晶化處理而言,可列舉使用藉由燈加熱等所致之RTP(Rapid Thermal Process,快速加熱製程)裝置的尖波退火。該尖波退火雖為600~900℃的高溫,但是由於以0.1~1sec左右的短時間進行,因此可進行較小熱預算下的處理。此外,亦可為使用電阻加熱熱處理之以700℃以下的溫度的熱處理。此時的保持時間較佳為3分鐘以下。此時,為了充分進行結晶化,以450℃以上為佳。 In the crystallization treatment under the small thermal budget as described above, sharp-wave annealing using an RTP (Rapid Thermal Process) device by lamp heating or the like can be cited. Although the sharp-wave annealing is a high temperature of 600 to 900 ° C, it is performed in a short time of about 0.1 to 1 sec, so that it can be processed under a small thermal budget. Further, it may be a heat treatment at a temperature of 700 ° C or lower using a resistance heating heat treatment. The holding time at this time is preferably 3 minutes or less. At this time, in order to sufficiently perform crystallization, it is preferably 450 ° C or more.

此外,以第2改質處理而言,微波照射處理(MIT)亦適合。MIT係可藉由利用電磁波能量所致之內部加熱來將High-k膜直接加熱,可在500℃以下的低溫下進行結晶化。因此,可進行極小的熱預算且熱擴散或再氧化極少的改質處理。如上所示之微波照射處理係可使用後述圖28所示之微波加熱裝置來進行。 Further, in the second modification process, microwave irradiation treatment (MIT) is also suitable. The MIT system can directly heat the High-k film by internal heating by electromagnetic wave energy, and can be crystallized at a low temperature of 500 ° C or lower. Therefore, it is possible to carry out a modification process with an extremely small thermal budget and little heat diffusion or reoxidation. The microwave irradiation treatment as described above can be carried out using a microwave heating apparatus shown in Fig. 28 which will be described later.

此外,以第2改質處理而言,可列舉藉由發光二極體(LED)所為之加熱處理。LED加熱並非利用加熱源的黑體輻射,而是利用藉由電子與電洞的再結合所致的電磁輻射,因此熱預算小,而且升降溫速度極大。此外,大部分作為LED元件被加以使用的GaN或GaAs由於對矽的吸收率高,但是對HfO2或HfSiOx的吸收率低,因此使得 HfO2膜或HfSiOx膜的溫度不太上升即可使其結晶化。如上所示之LED加熱係可使用圖29所示之LED加熱裝置來進行。 Further, in the second modification treatment, heat treatment by a light-emitting diode (LED) is exemplified. LED heating does not utilize the black body radiation of the heating source, but uses electromagnetic radiation caused by the recombination of electrons and holes, so the thermal budget is small, and the temperature rise and fall is extremely high. In addition, most of GaN or GaAs used as an LED element has a high absorptivity to germanium, but has a low absorptivity to HfO 2 or HfSiOx, so that the temperature of the HfO 2 film or the HfSiOx film is not raised. Crystallization. The LED heating system as shown above can be carried out using the LED heating device shown in FIG.

第2改質處理亦可藉由併用紫外線照射與自由基照射的UVRF處理來進行。 The second modification treatment can also be carried out by UVRF treatment in which ultraviolet irradiation and radical irradiation are used in combination.

在以上工程中,工程2的成膜處理、工程3的第1改質處理、及工程4的第2改質處理係可分別使用不同的處理裝置來進行,亦可以相同裝置來進行工程2的成膜處理與工程3的第1改質處理,亦可以相同裝置來進行工程3的第1改質處理與工程4的第2改質處理,亦可以相同裝置來進行工程2~4。 In the above process, the film formation process of the project 2, the first modification process of the project 3, and the second modification process of the project 4 may be performed using different processing devices, or the same device may be used for the engineering 2 In the first modification process of the film formation process and the process 3, the first modification process of the work 3 and the second modification process of the work 4 may be performed in the same apparatus, and the works 2 to 4 may be performed in the same apparatus.

此外,在以上工程中,可反覆2次以上的工程3的第1改質處理,亦可反覆2次以上的工程4的第2改質處理。此外,亦可在連續進行工程2的成膜處理與工程3的第1改質處理之後,另外反覆1次以上的工程2及工程3的連續處理。此外,亦可在連續進行工程3的1改質處理與工程4的第2改質處理之後,另外反覆1次以上的工程3及工程4的連續處理。此外,亦可在連續進行工程2~4之後,另外反覆1次以上的工程2~4的連續處理。反覆工程2與工程3時,反覆工程3與工程4時、反覆工程2~4時,係以在同一裝置、同一腔室進行該等為佳。 Further, in the above process, the first modification process of the process 3 of two or more times may be repeated, or the second modification process of the process 4 of two or more times may be repeated. In addition, after the film formation process of the process 2 and the first modification process of the process 3 are continuously performed, the process 2 and the process 3 of the process 3 may be repeated one more time. In addition, after the 1 modification process of the process 3 and the 2nd modification process of the process 4 are continuously performed, the continuous process of the process 3 and the process 4 of one or more times may be repeated. In addition, after continuous engineering 2~4, the continuous processing of 2~4 of the above engineering may be repeated. When the reverse project 2 and the project 3 are repeated, the reverse project 3 and the project 4 and the reverse project 2 to 4 are preferably performed in the same device and in the same chamber.

反覆工程2的成膜處理與工程3的第1改質處理時,考慮按每次成膜預定膜厚時即進行第1改質處理,但是若加多反覆數而使最初的成膜膜厚變薄時,判明出藉由之後 的第1改質處理,該薄層的High-k膜與矽晶圓之間的界面氧化膜會增膜,而使EOT變大。 In the film formation process of the reverse process 2 and the first modification process of the process 3, it is considered that the first modification process is performed every time a predetermined film thickness is formed, but the first film formation film thickness is increased by adding a plurality of times. When thinning, it is determined that after In the first modification process, the interface oxide film between the thin layer of the High-k film and the germanium wafer is increased, and the EOT is increased.

為了解決如上所示之問題,將最初的成膜膜厚,無關於反覆次數,而以一定程度加厚較為有效。具體而言,較佳為將最初的成膜膜厚形成為1.05nm以上。 In order to solve the problem as described above, it is effective to thicken the initial film formation film irrespective of the number of times of overturning, and to thicken it to some extent. Specifically, it is preferable to form the initial film formation film thickness to 1.05 nm or more.

以下說明表示該情形的實驗結果。 The experimental results indicating the situation are described below.

在此,在工程2的成膜處理中,係藉由ALD來成膜HfO2膜,在第1改質處理中,係進行微波電漿處理(自由基處理)。以裝置而言,係使用將後述之圖31所示之成膜處理與第1改質處理在相同腔室內進行者。 Here, in the film formation process of the process 2 , the HfO 2 film is formed by ALD, and in the first modification process, the microwave plasma treatment (radical treatment) is performed. In the case of the apparatus, the film formation process shown in FIG. 31, which will be described later, and the first modification process are performed in the same chamber.

圖4係顯示在以31週期的ALD成膜處理成膜2.5nm的HfO2膜時,使實施藉由40sec的微波電漿處理(自由基處理)所為之第1改質處理的週期數改變時的界面層(SiO2膜)的膜厚的圖。如該圖所示,在31週期成膜後進行第1改質處理時的界面層的膜厚為0.16nm,此為與未進行改質處理時同等的膜厚,沒有增膜。若使至進行第1改質處理為止的膜厚(週期數)變薄(變少)時,界面層的膜厚會增加,在8週期係為0.54nm附近,激烈增膜。由該圖可知,界限膜厚(界面層的膜厚不增膜的最低膜厚)係在15週期近傍,但是在15週期(膜厚1.25nm),界面層的膜厚為0.24nm,與31週期相比較,較為增膜。因此,為了在15週期的成膜不會增膜,必須使作為第1改質處理的微波電漿處理(自由基處理)更弱。其中,界面層的膜厚係藉由X線光電子分光(XPS)來求出(以下 同)。 4 is a view showing a case where the number of cycles of the first modification treatment by the microwave plasma treatment (radical treatment) by 40 sec is performed when a 2.5 nm HfO 2 film is formed by the ALD film formation process of 31 cycles. A plot of the film thickness of the interfacial layer (SiO 2 film). As shown in the figure, the film thickness of the interface layer at the time of performing the first modification treatment after the film formation at 31 cycles was 0.16 nm, which was the same film thickness as that in the case where the reforming treatment was not performed, and there was no film formation. When the film thickness (the number of cycles) until the first modification treatment is made thinner (less), the thickness of the interface layer increases, and the film is strongly increased in the vicinity of 0.54 nm in 8 cycles. As can be seen from the figure, the thickness of the boundary film (the film thickness of the interface layer does not increase the film thickness) is 15 cycles, but at 15 cycles (film thickness: 1.25 nm), the thickness of the interface layer is 0.24 nm, and 31 Compared with the cycle, the film is increased. Therefore, in order to prevent film formation in 15 cycles, it is necessary to make the microwave plasma treatment (radical treatment) as the first modification process weaker. The film thickness of the interface layer is determined by X-ray photoelectron spectroscopy (XPS) (the same applies hereinafter).

因此,使15週期成膜後所進行的微波電漿處理(自由基處理)的處理時間改變。圖5係在橫軸取15週期成膜後所進行的微波電漿處理時間,在縱軸取界面層的厚度來顯示該等的關係的圖。如該圖所示,可知若使藉由微波電漿處理所為之第1改質處理的時間減少至10sec為止,即使為15週期,亦使增膜消失。 Therefore, the treatment time of the microwave plasma treatment (radical treatment) performed after 15 cycles of film formation was changed. Fig. 5 is a view showing the relationship between the microwave plasma treatment time after film formation for 15 cycles on the horizontal axis and the thickness of the interface layer on the vertical axis. As shown in the figure, it is understood that when the time for the first modification treatment by the microwave plasma treatment is reduced to 10 sec, the film formation disappears even for 15 cycles.

接著,使作為第1改質處理的微波電漿處理的時序及長度改變來進行31週期的成膜。圖6係顯示此時之改質處理開始週期數與界面層的膜厚的關係圖。圖中菱形標繪係在進行成膜至圖示的週期之後,進行作為第1改質處理的微波電漿處理1sec,之後每隔成膜1週期,即分別以1sec進行作為第1改質處理的微波電漿處理者,三角標繪係在進行成膜至圖示的週期之後,進行作為第1改質處理的微波電漿處理3sec,之後每隔成膜1週期,即分別以1sec進行作為第1改質處理的微波電漿處理者。此外,×的標繪係在進行成膜至圖示的週期之後,進行作為第1改質處理的微波電漿處理10sec,之後進行剩餘的週期的成膜者,四角標繪係在15週期成膜後,進行作為第1改質處理的微波電漿處理10sec,之後,進行剩餘的16週期的成膜處理者(參照圖5)。其中,微波電漿處理的條件係設為腔室內壓力:20Pa、微波導入機構平均每個的微波輸出:200W、微波導入機構與晶圓的間隙:80mm。 Next, film formation was performed for 31 cycles by changing the timing and length of the microwave plasma treatment as the first modification process. Fig. 6 is a graph showing the relationship between the number of reforming start cycles and the film thickness of the interface layer at this time. In the figure, the rhombic plot is performed after the film formation to the illustrated cycle, and the microwave plasma treatment as the first modification process is performed for 1 sec, and then the first modification process is performed for 1 sec. The microwave plasma processor, after performing the film formation to the illustrated cycle, performs the microwave plasma treatment as the first modification process for 3 sec, and then performs the film for 1 cycle, that is, 1 sec. The microwave plasma processor of the first modification process. In addition, the plot of × is performed after the film formation is performed until the cycle shown in the figure, and the microwave plasma treatment as the first modification process is performed for 10 sec, and then the film formation of the remaining cycle is performed, and the four-corner plot is formed at 15 cycles. After the film, the microwave plasma treatment as the first modification treatment was performed for 10 sec, and then the remaining 16-cycle film formation process was performed (see FIG. 5). The conditions of the microwave plasma treatment are as follows: chamber pressure: 20 Pa, microwave output of each of the microwave introduction mechanisms: 200 W, gap between the microwave introduction mechanism and the wafer: 80 mm.

如圖6所示,確認出至開始第1改質處理為止的週期 數為13週期以上且未發現界面層增膜。亦即,13週期的膜厚為界限膜厚。13週期係相當於1.05nm的膜厚。由此,若反覆進行工程2的成膜處理與工程3的第1改質處理,以1.05nm以上的膜厚進行最初的成膜處理,以10sec以下進行第1改質處理的電漿處理為佳。亦即,成膜處理與第1改質處理的反覆數為2以上時,並非將膜厚作比例分割,而以無關於反覆數,將最初的成膜處理的膜厚形成為1.05nm以上為佳。 As shown in FIG. 6, the period until the start of the first modification process is confirmed. The number was 13 cycles or more and no interfacial layer filming was observed. That is, the film thickness of 13 cycles is the limit film thickness. The 13 cycle system corresponds to a film thickness of 1.05 nm. Therefore, when the film formation process of the process 2 and the first modification process of the process 3 are repeated, the first film formation process is performed with a film thickness of 1.05 nm or more, and the plasma process of the first modification process of 10 sec or less is performed. good. In other words, when the number of times of the film formation treatment and the first modification treatment is 2 or more, the film thickness is not divided into a ratio, and the film thickness of the first film formation treatment is 1.05 nm or more without any reciprocal number. good.

由以上實驗結果可知,最初的成膜膜厚的較佳上限值並未被導出,但是最初的成膜膜厚較薄為佳,以1.21nm以下為佳。1.21nm在上述實驗中係相當於15週期。 From the above experimental results, it is understood that the preferred upper limit of the film thickness of the first film formation is not derived, but the film thickness of the first film formation is preferably as small as 1.21 nm or less. 1.21 nm corresponds to 15 cycles in the above experiment.

如以上所示,在藉由CVD或ALD來成膜High-k膜之後,藉由利用在成膜溫度以下的溫度的自由基處理所為之第1改質處理來去除膜中雜質而使膜質提升,並且可使膜的密度上升,藉由之後的熱處理,可以較小的熱預算將膜結晶化,而使膜的介電係數大幅上升。此外,藉由選擇條件,可抑制界面層的增膜等。 As described above, after the High-k film is formed by CVD or ALD, the film is improved by removing the impurities in the film by the first modification treatment by radical treatment at a temperature lower than the film formation temperature. Moreover, the density of the film can be increased, and the film can be crystallized with a small thermal budget by the subsequent heat treatment, and the dielectric constant of the film is greatly increased. Further, by selecting conditions, filming of the interface layer and the like can be suppressed.

(第1實施形態中的基礎實驗) (Basic experiment in the first embodiment)

圖7係顯示在以ALD成膜HfO2膜之後,進行第1改質處理後的膜厚方向的雜質(碳)的濃度的圖。試樣係使用在Si上,以in-situ分別以3.5nm進行3次處理後的HfO2膜以10nm的厚度所形成,在其上,as depo的HfO2膜以10nm的厚度所形成者。其結果,若為屬於高溫處理 的450℃的情形下,在成膜溫度310℃下成為碳濃度較高的值。由此導出第1改質處理的溫度係以在低溫下進行較為有利。 FIG. 7 is a view showing the concentration of impurities (carbon) in the film thickness direction after the first modification treatment is performed after the HfO 2 film is formed by ALD. The sample was formed on Si, and the HfO 2 film treated with in-situ three times at 3.5 nm was formed to have a thickness of 10 nm, and the HfO 2 film of as depo was formed to have a thickness of 10 nm. As a result, in the case of 450 ° C which is a high temperature treatment, the carbon concentration is high at a film formation temperature of 310 ° C. It is advantageous to derive the temperature of the first modification treatment to perform at a low temperature.

圖8係求出各種改質處理時的界面層的增膜量及膜厚的關係圖,一併顯示以圓圈包圍的部分的放大圖。在氧氣體環境中的紫外線照射處理(UV-O)及在氧氣體環境中的微波電漿處理(微波電漿-O)係如粗實線所示,確認出為溫度上升且界面層增膜的傾向,但是室溫中的UV-O(■RT std UV、□RT UV time、▲RT UV press)係存在有界面層幾乎未增膜,膜厚本身亦不會變厚的條件。 Fig. 8 is a graph showing the relationship between the amount of film formation and the film thickness of the interface layer at the time of various reforming treatments, and an enlarged view of a portion surrounded by a circle is also shown. The ultraviolet irradiation treatment (UV-O) in an oxygen gas atmosphere and the microwave plasma treatment (microwave plasma-O) in an oxygen gas atmosphere are as shown by a thick solid line, and it is confirmed that the temperature rises and the interface layer increases. However, UV-O (■RT std UV, □RT UV time, ▲RT UV press) at room temperature is a condition in which the interface layer hardly increases the film thickness and the film thickness itself does not become thick.

圖9A係顯示UV-O的氧化溫度與界面層的厚度的關係圖,圖9B係將室溫中的UV-O的各種條件中的界面層的厚度與設為450℃、0.10Torr的標準條件下的處理時相比較的圖。由該等圖可知,隨著UV-O的溫度降低,界面層的厚度會變小,此外,室溫中的UV-O與標準條件相比較,可降低0.2nm左右。 9A is a graph showing the relationship between the oxidation temperature of UV-O and the thickness of the interface layer, and FIG. 9B is a standard condition for setting the thickness of the interface layer in various conditions of UV-O at room temperature to 450 ° C and 0.10 Torr. The comparison of the processing time is compared. As can be seen from the figures, as the temperature of the UV-O decreases, the thickness of the interface layer becomes smaller, and the UV-O at room temperature can be reduced by about 0.2 nm as compared with the standard conditions.

圖10係顯示藉由各處理時的Hf的4f的結合能量的XPS測定時X線照射所致的變化者,顯示膜的安定性者。由該圖可知,在700℃的退火中,Hf的4f的結合能量的變化小而膜的安定性高,但是關於進行在O2氣體環境下的UV照射處理、及微波電漿處理者,係Hf的4f的結合能量的變化大。 FIG. 10 shows a change in X-ray irradiation in the XPS measurement by the binding energy of 4f of Hf at the time of each treatment, and shows the stability of the film. As can be seen from the figure, in the annealing at 700 ° C, the change in the binding energy of 4f of Hf is small and the stability of the film is high. However, the UV irradiation treatment in the O 2 gas atmosphere and the microwave plasma treatment are performed. The change in the binding energy of 4f of Hf is large.

圖11A、圖11B、圖11C係分別顯示膜厚2.5nm的HfO2膜的as depo狀態、及以900℃進行尖波退火時、及 以900℃進行10min的退火時的HfO2膜的價帶(valence band,價電子帶)中的X線光電子分光(XPS)頻譜的圖。由該圖,由頻譜變化確認出as depo時的非晶質的膜即使在熱預算小的尖波退火中,亦可與以900℃進行10min的平常的高溫退火同樣地結晶化。 11A, 11B, and 11C show the as depo state of the HfO 2 film having a thickness of 2.5 nm, and the valence band of the HfO 2 film when the annealing is performed at 900 ° C for 10 minutes and at 90 ° C for 10 minutes. A plot of the X-ray photoelectron spectroscopy (XPS) spectrum in a (valence band). In the figure, the amorphous film when the as depo is confirmed by the spectral change can be crystallized in the same manner as the ordinary high-temperature annealing at 900 ° C for 10 minutes even in the sharp-wave annealing with a small thermal budget.

圖12A、圖12B係分別顯示膜厚4.0nm的HfO2膜的as depo狀態、及將MIT以600W進行30min時的XPS頻譜的圖。由該圖確認出在膜厚4.0nm時,藉由600W下進行30min的MIT,即可結晶化。此外,圖13係顯示膜厚2.5nm的HfO2膜的as depo狀態、及以600℃進行尖波退火者、與將MIT以2000W進行30min時的XPS頻譜的圖。膜厚2.5nm時確認出可以比2000W、30min更為高輸出、長時間的條件,與進行600℃的尖波退火時同等地進行結晶化。 12A and 12B are diagrams showing the as depo state of the HfO 2 film having a film thickness of 4.0 nm and the XPS spectrum when the MIT is performed at 600 W for 30 min. From the figure, it was confirmed that crystallization was carried out by performing MIT at 600 W for 30 minutes at a film thickness of 4.0 nm. In addition, FIG. 13 is a view showing an as depo state of an HfO 2 film having a film thickness of 2.5 nm, and an XPS spectrum when a sharp wave annealing is performed at 600 ° C and a MIT is performed at 2000 W for 30 min. When the film thickness was 2.5 nm, it was confirmed that the output was longer than 2000 W and 30 min, and the conditions were long, and the crystallization was performed in the same manner as in the case of the spike annealing at 600 °C.

(第1實施形態中的電氣特性) (Electrical characteristics in the first embodiment)

接著,說明測定出藉由第1實施形態所得之閘極絕緣膜的電氣特性的結果。 Next, the result of measuring the electrical characteristics of the gate insulating film obtained in the first embodiment will be described.

在此,對矽晶圓施行前處理而形成界面層(SiO2膜)後,成膜各種膜厚的HfO2膜作為High-k膜,之後,使用後述之圖23所示之微波電漿處理裝置,以下列所示條件,進行Ar電漿處理或Ar氮電漿處理作為第1改質處理之後,以530℃、580℃、630℃、680℃的各溫度進行藉由具有電阻加熱器的UVRF模組所為之1min的UVRF處理 作為第2改質處理,而形成閘極絕緣膜。 Here, after the interfacial wafer is pretreated to form an interface layer (SiO 2 film), a film of various thicknesses of HfO 2 film is formed as a High-k film, and then microwave plasma treatment as shown in FIG. 23 described later is used. The apparatus was subjected to Ar plasma treatment or Ar nitrogen plasma treatment as the first modification treatment under the following conditions, and then subjected to respective temperatures of 530 ° C, 580 ° C, 630 ° C, and 680 ° C by means of an electric resistance heater. The UVRF process of the UVRF module for 1 min is used as the second modification process to form a gate insulating film.

.Ar電漿處理 . Ar plasma treatment

晶圓溫度:250℃ Wafer temperature: 250 ° C

壓力:20Pa Pressure: 20Pa

微波功率:2000W Microwave power: 2000W

Ar氣體流量:2000mL/min(sccm) Ar gas flow rate: 2000mL/min (sccm)

處理時間:5sec Processing time: 5sec

.Ar氮電漿處理 . Ar nitrogen plasma treatment

晶圓溫度:250℃ Wafer temperature: 250 ° C

壓力:20Pa Pressure: 20Pa

微波功率:1500W Microwave power: 1500W

N2氣體流量:200mL/min(sccm) N 2 gas flow rate: 200mL/min (sccm)

Ar氣體流量:1000mL/min(sccm) Ar gas flow rate: 1000mL/min (sccm)

處理時間:5sec Processing time: 5sec

將如上所示所得之閘極絕緣膜的電氣特性顯示於圖14。圖14係在橫軸取膜的EOT,縱軸取漏電流(Jg)而顯示該等之關係的圖。圖中,虛線係表示未進行改質處理時的傾向,白圈係表示以Ar電漿進行第1改質處理的情形,黑圈係表示以Ar氮電漿進行第1改質處理的情形。此外,各標繪的數字為第2改質處理的溫度。 The electrical characteristics of the gate insulating film obtained as shown above are shown in Fig. 14. Fig. 14 is a view showing the relationship between the EOT of the film on the horizontal axis and the leakage current (Jg) on the vertical axis. In the figure, the broken line indicates the tendency when the reforming treatment is not performed, the white circle indicates the case where the first modification treatment is performed with Ar plasma, and the black circle indicates the case where the first modification treatment is performed with the Ar nitrogen plasma. Further, the numbers plotted are the temperatures of the second reforming process.

如該圖所示,可知處於藉由進行第1改質處理及第2改質處理,EOT及漏電流獲得改善的傾向。此外,在上述條件之中,確認出在進行Ar氮電漿處理作為第1改質處理之後,以680℃進行第2改質處理者,其EOT及漏電流 最被減低。 As shown in the figure, it is understood that EOT and leakage current tend to be improved by performing the first modification process and the second modification process. Further, among the above conditions, it was confirmed that after the Ar nitrogen plasma treatment was performed as the first modification treatment, the second modification was performed at 680 ° C, and the EOT and the leakage current were observed. Most reduced.

<第2實施形態> <Second embodiment>

在上述第1實施形態中,獲得高密度的結晶化的High-k膜,且獲得較高的介電係數。但是,例如若為HfO2膜,在平常的結晶化處理中,結晶為monoclinic(單斜晶),介電係數至多為16左右。因此,第2實施形態中,使介電係數更高的cubic(立方晶)(介電係數=29)、tetragonal(正方晶)(介電係數=70)晶化而使High-k膜的介電係數上升。 In the first embodiment described above, a high-density crystallized High-k film is obtained, and a high dielectric constant is obtained. However, for example, in the case of the HfO 2 film, in the usual crystallization treatment, the crystal is monoclinic (monoclinic crystal), and the dielectric constant is at most about 16. Therefore, in the second embodiment, cubic (cubic crystal) (dielectric constant = 29) and tetragonal (tetragonal crystal) (dielectric constant = 70) having a higher dielectric constant are crystallized to form a high-k film. The electrical coefficient rises.

在本實施形態中,如圖15所示,在與第1實施形態之工程1同樣地進行前處理(工程11)後,與第1實施形態之第2工程同樣地,以CVD或ALD,成膜鉿氧化物材料膜,典型而言為HfO2膜、HfSiOx膜,來作為High-k膜(工程12)。 In the present embodiment, as shown in FIG. 15, the pretreatment (Project 11) is performed in the same manner as the first embodiment of the first embodiment, and the CVD or ALD is used in the same manner as the second project of the first embodiment. The membrane oxide material film, typically HfO 2 film, HfSiOx film, is used as a High-k film (Engineering 12).

成膜後,接著藉由低溫下的自由基處理,進行第1改質處理,在該時點,High-k膜成為非晶質狀態(工程13)。為了在工程13結束的階段將High-k膜形成為非晶質狀態,工程12的成膜處理時,進行結晶幾乎未晶化而成為非晶質般的低溫下的成膜,或者在工程13的低溫下的自由基處理時,藉由施加偏壓,將Ar離子等離子照射在High-k膜而將膜積極地非晶質化。 After the film formation, the first modification treatment was carried out by radical treatment at a low temperature, and at this time, the High-k film was in an amorphous state (Project 13). In order to form the High-k film in an amorphous state at the end of the work 13, in the film formation process of the work 12, the film is formed into a film at a low temperature which is almost uncrystallized and becomes amorphous, or in the process 13 At the time of radical treatment at a low temperature, the Ar ion plasma is irradiated onto the High-k film by applying a bias voltage to positively amorphize the film.

以供非晶質化之用的自由基處理而言,可列舉在使用Ar氣體等稀有氣體的微波電漿處理中,對矽基板施加高 頻偏壓而對膜中照射Ar離子,藉此非晶質化者。 The radical treatment for amorphization may be applied to a tantalum substrate in a microwave plasma treatment using a rare gas such as an Ar gas. The Ar ion is irradiated to the film by a frequency bias, thereby being amorphous.

在如上所示之狀態下,進行藉由450℃以上的急速升降溫所致之第2改質處理(工程14)。藉由該第2改質處理,在加熱時被晶化的高溫相亦即cubic可被帶到至室溫為止而使介電係數上升。 In the state as described above, the second modification process by the rapid temperature rise and fall of 450 ° C or higher is performed (Project 14). According to the second modification treatment, the high temperature phase which is crystallized at the time of heating, that is, the cubic can be brought to room temperature to increase the dielectric constant.

在此,之所以在工程14之前將High-k膜形成為非晶質狀態,係因為若在工程14之前雖僅些微monoclonic晶化,亦不會依存於之後的處理,大部分成為monoclinic,而使結晶控制不易進行之故。 Here, the reason why the High-k film is formed into an amorphous state before the work 14 is because if only a slight monoclonic crystal is crystallized before the work 14, it does not depend on the subsequent processing, and most of them become monoclinic, and The crystallization control is not easy to carry out.

為了進行結晶控制,以在膜中含有促進相變化的成分為佳。例如High-k膜為HfO2時,以促進相變化的成分而言,係可列舉Si、Zr、Y、Ce、Sr、N等。以含有該等的手法而言,可列舉使HfZrOx膜或HfSiOx膜等層積在HfO2膜的手法、或在成膜時使用含有該等成分的化合物作為成膜原料的一部分的手法等。此外,在膜中摻雜該等成分亦為有效。此外,將作為促進分極的成分的Ti或Ba導入至膜中亦為佳。以含有Ti的手法而言,係可使用將HfTiOx層積的手法、或在成膜時將Ti使用含有該等成分的化合物作為成膜原料的一部分的手法等。 In order to carry out crystallization control, it is preferred to include a component which promotes a phase change in the film. For example, when the High-k film is HfO 2 , examples of the component that promotes phase change include Si, Zr, Y, Ce, Sr, N, and the like. In the method of containing such a method, a method of laminating a HfOrOx film or an HfSiOx film or the like on a HfO 2 film, or a method of using a compound containing the components as a film forming material at the time of film formation, or the like may be mentioned. In addition, it is also effective to dope these components in the film. Further, it is also preferred to introduce Ti or Ba as a component for promoting polarization. In the method of containing Ti, a method of laminating HfTiOx or a method of using Ti as a part of a film forming raw material when Ti is formed at the time of film formation can be used.

在該等成分之中,可使介電係數高的tetragonal晶化,因此以在膜中含有N為佳。為了在High-k膜中含有N,較佳為使用在自由基處理時,除了Ar離子以外,以將N離子引入膜中而在膜中摻雜N的手法。 Among these components, tetragonal having a high dielectric constant can be crystallized, and therefore it is preferable to contain N in the film. In order to contain N in the High-k film, it is preferred to use a method of doping N into the film in addition to Ar ions in addition to Ar ions, and doping N in the film.

(第2實施形態中的實驗結果) (Experimental results in the second embodiment)

將藉由ALD而以250℃成膜的HfO2膜、與以310℃成膜的HfO2膜以900℃進行尖波退火後,藉由in-plane XRD來掌握結晶性。其中,以250℃成膜的HfO2膜係在as depo狀態下為非晶質,以310℃成膜的HfO2膜係在as depo狀態下稍微結晶化。將in-plane XRD的結果顯示於圖16。如該圖所示,確認出相較於以310℃成膜後進行尖波退火者,以250℃成膜後進行尖波退火者的cubic或tetragonal部分的X線繞射強度較高。 After will, spike annealing is performed by the ALD HfO 2 film 250 to the film formation deg.] C to 310 deg.] C HfO 2 film deposition at 900 ℃, by in-plane XRD crystallinity grasped. Among them, the HfO 2 film formed at 250 ° C was amorphous in the as depo state, and the HfO 2 film formed at 310 ° C was slightly crystallized in the as depo state. The results of the in-plane XRD are shown in Fig. 16. As shown in the figure, it was confirmed that the X-ray diffraction intensity of the cubic or tetragonal portion where the sharp-wave annealing was performed at 250 ° C after the film formation at 310 ° C and the sharp-wave annealing was performed was high.

<第3實施形態> <Third embodiment>

在第3實施形態中,係僅進行上述微波照射處理(MIT)來作為改質處理。亦即,在上述第1實施形態中,係使用MIT作為供結晶化用的第2改質處理,但是在本實施形態中,係僅以MIT進行高密度化及結晶化。 In the third embodiment, only the above-described microwave irradiation processing (MIT) is performed as the modification processing. In other words, in the first embodiment, MIT is used as the second modification process for crystallization. However, in the present embodiment, the density is increased and crystallized by MIT.

具體而言,如圖17所示,進行與第1實施形態中的工程1相同的前處理(工程21),之後,與工程2同樣地藉由CVD或ALD進行High-k膜的成膜(工程22),之後進行藉由MIT所為之改質處理(工程23)。 Specifically, as shown in FIG. 17 , the same pretreatment as in the first embodiment (the first step 21) is performed, and then the film formation of the High-k film is performed by CVD or ALD in the same manner as in the second embodiment ( Project 22), followed by a modification process by MIT (Project 23).

MIT係如上所述,可使電磁波能量作用在膜的內部,因此可以極小的熱預算,同時進行膜的高密度化與結晶化。以此時的微波頻率而言,係可使用860MHz以上,藉由例如2.45GHz或5.8GHz等高頻的微波照射,可期待更高的改質效果。 Since the MIT system can cause electromagnetic wave energy to act inside the film as described above, it is possible to simultaneously increase the density and crystallization of the film with an extremely small thermal budget. In the microwave frequency at this time, 860 MHz or more can be used, and high-frequency microwave irradiation such as 2.45 GHz or 5.8 GHz can be expected, and a higher modification effect can be expected.

此外,以MIT所形成的微波電場係不僅結晶化成monoclinic,有作用於High-k膜所分極的部分且控制結晶性的可能性。實際上在將HfO2膜藉由ALD成膜後,進行MIT處理的結果,可將膜的密度形成為9.8g/cm2左右,獲得比monoclinic的HfO2膜的理論密度亦即9.68g/cm2為更高的值。由此推定出密度更高的cubic(密度10.2g/cm2)呈晶化。 Further, the microwave electric field formed by MIT is not only crystallized into monoclinic, but also has a possibility of acting on a portion of the high-k film which is polarized and controlling crystallinity. Actually, after the HfO 2 film was formed by ALD, the density of the film was formed to be about 9.8 g/cm 2 as a result of MIT treatment, and the theoretical density of the HfO 2 film of monoclinic was 9.68 g/cm. 2 is a higher value. From this, it was estimated that the cube having a higher density (density 10.2 g/cm 2 ) was crystallized.

(第3實施形態中的電氣特性) (Electrical characteristics in the third embodiment)

接著,說明測定出藉由第3實施形態所得的閘極絕緣膜的電氣特性的結果。 Next, the results of measuring the electrical characteristics of the gate insulating film obtained in the third embodiment will be described.

在此,對矽晶圓施行前處理來形成界面層(SiO2膜)後,成膜膜厚2.5nm及3.5nm的HfO2膜作為High-k膜,之後,藉由後述圖28所示的處理裝置,進行藉由MIT所為的改質處理而形成閘極絕緣膜。此時的條件係設為微波輸出:2000W、處理時間:3min。 Here, after the pre-treatment of the germanium wafer to form the interface layer (SiO 2 film), the HfO 2 film having a film thickness of 2.5 nm and 3.5 nm is formed as a High-k film, and then, as shown in FIG. 28, which will be described later. The processing device performs a modification process by MIT to form a gate insulating film. The conditions at this time were set to microwave output: 2000 W, processing time: 3 min.

將如上所示所得的閘極絕緣膜的電氣特性顯示於圖18。圖18係在橫軸取膜的EOT、在縱軸取漏電流(Jg)而顯示該等的關係的圖。在圖18中,為供比較,關於未進行改質處理的as depo者、及僅進行700℃下的燈退火作為改質處理者亦加以標繪。 The electrical characteristics of the gate insulating film obtained as shown above are shown in Fig. 18. 18 is a view showing the relationship between the EOT of the film on the horizontal axis and the leakage current (Jg) on the vertical axis. In Fig. 18, for comparison, the as depo who has not undergone the upgrading treatment and the lamp annealing at 700 °C are also plotted as the reformer.

如該圖所示,確認出成膜後,藉由進行藉由MIT所為之改質處理,漏電流大幅獲得改善。 As shown in the figure, after confirming the film formation, the leakage current was greatly improved by performing the modification treatment by MIT.

<第4實施形態> <Fourth embodiment>

在第4實施形態中,係僅進行藉由上述發光二極體(LED)所為之加熱處理來作為改質處理。亦即,在上述第1實施形態中,使用LED加熱作為供結晶化之用的第2改質處理,但是在本實施形態中,係僅以LED加熱來進行高密度化及結晶化。 In the fourth embodiment, only the heat treatment by the above-described light-emitting diode (LED) is performed as the reforming process. In other words, in the first embodiment, LED heating is used as the second modification treatment for crystallization. However, in the present embodiment, the LED is heated to increase the density and crystallization.

具體而言,如圖19所示,進行與第1實施形態中的工程1相同的前處理(工程31),之後,與工程2同樣地藉由CVD或ALD來進行High-k膜的成膜(工程32),之後進行藉由LED加熱所為之改質處理(工程33)。 Specifically, as shown in FIG. 19, the same pretreatment as in the first embodiment (the construction 31) is performed, and thereafter, the film formation of the High-k film is performed by CVD or ALD in the same manner as in the second embodiment. (Project 32), followed by a modification process by LED heating (Project 33).

LED加熱係如上所述,並非為利用加熱源的黑體輻射,而是利用藉由電子與電洞的再結合所致之電磁輻射的加熱,而且對矽基板的吸收率高,因此可使HfO2膜或HfSiOx膜的溫度不太上升即可進行改質。藉由LED,亦可去除一定程度的雜質,因此可僅以LED加熱來進行高密度化及結晶化。 As described above, the LED heating system is not a black body radiation using a heating source, but uses electromagnetic heating by recombination of electrons and holes, and has high absorption rate to the substrate, so that HfO 2 can be made. The temperature of the film or HfSiOx film can be modified without a rise in temperature. Since a certain amount of impurities can be removed by the LED, it is possible to increase the density and crystallization by heating only with the LED.

<用以實現本發明之實施形態的處理系統> <Processing System for Realizing an Embodiment of the Present Invention>

接著,說明用以實現本實施形態之方法的系統之例。 Next, an example of a system for realizing the method of the present embodiment will be described.

圖20係顯示用以實現上述第1實施形態的處理系統之例圖。該處理系統100係對進行工程1的前處理之後的矽晶圓,進行工程2以後的處理者。 Fig. 20 is a view showing an example of a processing system for realizing the above-described first embodiment. The processing system 100 is a processor that performs the process 2 after performing the pre-processed pre-processed wafer.

如圖20所示,該處理系統100係具有:成膜High-k膜的2個成膜裝置1、2;及對High-k膜進行第1改質處 理的第1改質處理裝置3;及進行第2改質處理的第2改質處理裝置4,該等成膜裝置1、2、以及第1及第2改質處理裝置3、4係與呈六角形的晶圓搬送室5的4個邊分別相對應而設。此外,在晶圓搬送室5的其他2個邊係分別設有負載鎖定室6、7。在該等負載鎖定室6、7之與晶圓搬送室5相反側係設有晶圓搬入搬出室8,在晶圓搬入搬出室8之與負載鎖定室6、7相反側係設有安裝可收容矽晶圓(以下僅記為晶圓)W的3個FOUP(前開口式通用容器)F的埠9、10、11。 As shown in FIG. 20, the processing system 100 includes two film forming apparatuses 1 and 2 for forming a High-k film, and a first modified portion of the High-k film. The first modification processing device 3 and the second modification processing device 4 that performs the second modification process, the film formation devices 1 and 2, and the first and second modification processing devices 3 and 4 are The four sides of the hexagonal wafer transfer chamber 5 are provided correspondingly. Further, load lock chambers 6 and 7 are provided in the other two sides of the wafer transfer chamber 5, respectively. The wafer loading/unloading chamber 8 is disposed on the opposite side of the load lock chambers 6 and 7 from the wafer transfer chamber 5, and is mounted on the opposite side of the wafer loading/unloading chamber 8 from the load lock chambers 6 and 7.埠9, 10, and 11 of three FOUPs (front open general-purpose containers) F that accommodate 矽 wafers (hereinafter simply referred to as wafers) W.

成膜裝置1、2、第1及第2改質處理裝置3、4、負載鎖定室6、7係如該圖所示,透過閘閥G而被連接在晶圓搬送室5的各邊,該等係藉由將各閘閥G開放而與晶圓搬送室5相連通,藉由關閉各閘閥G而由晶圓搬送室5被遮斷。此外,在負載鎖定室6、7之與晶圓搬入搬出室8相連接的部分亦設有閘閥G,負載鎖定室6、7係藉由將閘閥G開放而與晶圓搬入搬出室8相連通,藉由關閉該等而由晶圓搬入搬出室8被遮斷。 The film forming apparatus 1 and 2, the first and second reforming processing apparatuses 3 and 4, and the load lock chambers 6 and 7 are connected to the respective sides of the wafer transfer chamber 5 through the gate valve G as shown in the figure. By opening the gate valves G and communicating with the wafer transfer chamber 5, the wafer transfer chamber 5 is blocked by closing the gate valves G. Further, a gate valve G is also provided in a portion of the load lock chambers 6 and 7 that is connected to the wafer loading/unloading chamber 8, and the load lock chambers 6 and 7 are connected to the wafer loading/unloading chamber 8 by opening the gate valve G. By closing the wafer, the wafer loading/unloading chamber 8 is blocked.

在晶圓搬送室5內係設有對成膜裝置1、2、第1及第2改質處理裝置3、4、及負載鎖定室6、7進行晶圓W的搬入搬出的晶圓搬送裝置12。該晶圓搬送裝置12係被配設在晶圓搬送室5的大致中央,在可旋轉及伸縮的旋轉/伸縮部13的前端具有保持晶圓W的2個承載片14a、14b,該等2個承載片14a、14b係以彼此朝向相反方向的方式被安裝在旋轉/伸縮部13。其中,該晶圓搬送室5內 係被保持為預定的真空度。 A wafer transfer device that carries in and out the wafer W to the film forming apparatus 1 and 2, the first and second reforming processing apparatuses 3 and 4, and the load lock chambers 6 and 7 is provided in the wafer transfer chamber 5 12. The wafer transfer device 12 is disposed substantially at the center of the wafer transfer chamber 5, and has two carrier sheets 14a and 14b for holding the wafer W at the tip end of the rotatable and expandable/retractable rotating/expanding portion 13. The carrier sheets 14a, 14b are attached to the rotation/expansion portion 13 in such a manner as to face each other in opposite directions. Wherein, the wafer transfer chamber 5 The system is maintained at a predetermined degree of vacuum.

在晶圓搬入搬出室8的頂棚部設有HEPA過濾器(未圖示),通過該HEPA過濾器而去除有機物或微粒等的清淨空氣在下向流狀態下被供給至晶圓搬入搬出室8內,以大氣壓的清淨空氣環境氣體進行晶圓W的搬入搬出。在晶圓搬入搬出室8的FOUP F安裝用的3個埠9、10、11分別設有擋門(未圖示),在該等埠9、10、11直接安裝收容有晶圓W或空的FOUP,在被安裝時,擋門脫離,一面防止外氣侵入,一面與晶圓搬入搬出室8相連通。此外,在晶圓搬入搬出室8的側面設有對準腔室15,在該處進行晶圓W的對準。 A HEPA filter (not shown) is provided in a ceiling portion of the wafer loading/unloading chamber 8, and clean air such as organic matter or fine particles is removed by the HEPA filter, and is supplied to the wafer loading/unloading chamber 8 in a downward flow state. The wafer W is carried in and out at a normal atmospheric air atmosphere. Each of the three cymbals 9, 10, and 11 for mounting the FOUP F in the wafer loading/unloading chamber 8 is provided with a shutter (not shown), and the wafers W or vacant are directly mounted on the cymbals 9, 10, and 11 When the FOUP is mounted, the door is disengaged and communicates with the wafer loading/unloading chamber 8 while preventing the intrusion of outside air. Further, an alignment chamber 15 is provided on the side surface of the wafer loading/unloading chamber 8, where the alignment of the wafer W is performed.

在晶圓搬入搬出室8內設有進行晶圓W對FOUP F的搬入搬出及晶圓W對負載鎖定室6、7的搬入搬出的晶圓搬送裝置16。該晶圓搬送裝置16係具有2個多關節臂,可沿著FOUP F的配列方向在軌條18上行走,在其前端的手部17上載置晶圓W來進行其搬送。其中,在圖20中係顯示其中一方手部17存在於晶圓搬入搬出室8,另一方手部被插入在FOUP F內的狀態。 In the wafer loading/unloading chamber 8, a wafer transfer device 16 that carries in and out of the wafer W to the FOUP F and loads and transports the wafer W into the load lock chambers 6 and 7 is provided. The wafer transfer device 16 has two multi-joint arms, and can travel on the rails 18 along the arrangement direction of the FOUP F, and the wafers W are placed on the hand 17 at the front end to carry them. In FIG. 20, one of the hand portions 17 is present in the wafer loading/unloading chamber 8 and the other hand is inserted into the FOUP F.

處理系統100的構成部,例如成膜裝置1、2、第1及第2改質處理裝置3、4、晶圓搬送裝置12、16等係形成為與由電腦所構成的控制部20相連接來進行控制的構成。此外,在控制部20係連接有:由為了由操作員管理系統而進行指令之輸入操作等的鍵盤、或將系統運轉狀況可視化來進行顯示的顯示器等所構成的使用者介面21。此 外,在控制部20係連接有記憶部22,其儲存有用以以控制部20的控制來實現在系統被執行的各種處理的控制程式、或用以按照處理條件來使各構成部執行處理的程式亦即處理配方。處理配方係被記憶在記憶部22之中的記憶媒體。記憶媒體可為硬碟,亦可為CDROM、DVD、快閃記憶體等可搬性者。此外,亦可由其他裝置,透過例如專用線路而使配方適當傳送。 The components of the processing system 100, for example, the film forming apparatus 1, the first and second modification processing apparatuses 3 and 4, the wafer transfer apparatuses 12 and 16, etc. are formed to be connected to the control unit 20 composed of a computer. To control the composition. Further, the control unit 20 is connected to a user interface 21 including a keyboard for inputting a command or the like for an operator management system, a display for visualizing the system operation state, and the like. this Further, the control unit 20 is connected to a storage unit 22 that stores a control program for realizing various processes executed in the system by the control of the control unit 20, or for causing each component to perform processing in accordance with processing conditions. The program also processes the recipe. The processing recipe is a memory medium that is memorized in the storage unit 22. The memory medium can be a hard disk, or can be a removable person such as a CDROM, a DVD, or a flash memory. In addition, the formulation may be appropriately transferred by other means, for example, through a dedicated line.

接著,視需要,以來自使用者介面21的指示等,將任意的處理配方由記憶部22叫出而使控制部20執行,藉此在控制部20的控制下,進行在處理系統的所希望的處理。其中,控制部20可直接控制各構成部,亦可在各構成部設置個別的控制器,透過該等來進行控制。 Then, if necessary, the arbitrary processing recipe is called by the memory unit 22 by the instruction from the user interface 21, and the control unit 20 is executed, whereby the control unit 20 performs the desired operation in the processing system. Processing. Here, the control unit 20 may directly control each component, or may provide an individual controller in each component, and perform control by transmitting the components.

在如上所示之處理系統100中,首先,被裝載收容有已進行前處理的晶圓W的FOUP F。 In the processing system 100 as described above, first, the FOUP F in which the preprocessed wafer W is accommodated is loaded.

接著,藉由被保持為大氣壓的清淨空氣氣體環境的晶圓搬入搬出室8內的晶圓搬送裝置16,由FOUP F取出一枚晶圓W而搬入至對準腔室15,來進行晶圓W的對位。接著,將晶圓W搬入至負載鎖定室6、7的任一者,在將該負載鎖定內進行真空吸引後,藉由晶圓搬送室5內的晶圓搬送裝置12來取出該負載鎖定內的晶圓,將晶圓W裝入至成膜裝置1或2,來進行工程2的成膜處理。藉由晶圓搬送裝置12取出High-k膜成膜後的晶圓W,接著搬入至第1改質處理裝置3來進行工程3的第1改質處理。之後,藉由晶圓搬送裝置12來取出第1改質處理裝置3內 的晶圓W,插入至第2改質處理裝置4來進行工程4的第2改質處理。之後藉由晶圓搬送裝置12,將成膜後的晶圓W搬入至負載鎖定室6、7的任一者,將其中恢復成大氣壓後,藉由晶圓搬入搬出室8內的晶圓搬送裝置16來取出負載鎖定室內的晶圓W,且被收容在FOUP F的任一者。將如上所示之動作對1批量的晶圓W進行,1套處理即結束。藉由如上所示之處理,不會破壞真空即可連續進行成膜處理、第1改質處理及第2改質處理,形成高密度且經結晶化的良質的閘極絕緣膜。 Then, the wafer transfer device 16 in the clean air gas atmosphere held at atmospheric pressure is loaded into the wafer transfer device 16 in the carry-out chamber 8 to take out one wafer W from the FOUP F and carry it into the alignment chamber 15 to perform wafer processing. The alignment of W. Next, the wafer W is carried into any of the load lock chambers 6 and 7, and after the vacuum is sucked in the load lock, the wafer transfer device 12 in the wafer transfer chamber 5 takes out the load lock. The wafer is loaded into the film forming apparatus 1 or 2, and the film forming process of the process 2 is performed. The wafer W after the film formation by the High-k film is taken out by the wafer transfer device 12, and then transferred to the first modification processing device 3 to perform the first modification process of the process 3. Thereafter, the first modification processing device 3 is taken out by the wafer transfer device 12 The wafer W is inserted into the second modification processing device 4 to perform the second modification process of the process 4. After that, the wafer W after the film formation is carried into the load lock chambers 6 and 7 by the wafer transfer device 12, and the wafers are transferred to the wafers in the wafer loading/unloading chamber 8 after being restored to atmospheric pressure. The device 16 takes out the wafer W in the load lock chamber and is housed in any of the FOUP F. The operation shown above is performed on the wafer W of one batch, and one set of processing is completed. By the treatment as described above, the film formation process, the first modification process, and the second modification process can be continuously performed without breaking the vacuum, and a high-density and crystallized good gate insulating film can be formed.

<成膜裝置> <film forming apparatus>

接著說明工程2的成膜裝置1(2)。 Next, the film forming apparatus 1 (2) of the second embodiment will be described.

圖21係顯示成膜裝置1之一例的剖面圖。該成膜裝置1係具有構成為氣密的大致圓筒狀的腔室31,在其中係在藉由被設在其中央下部的圓筒狀支持構件33予以支持的狀態下配置有用以水平支持作為被處理體的晶圓W的基座32。該基座32係由AIN等陶瓷所構成。此外,在基座32被埋入加熱器35,在該加熱器35連接有加熱器電源36。另一方面,在基座32的上面近傍設有熱電偶37,熱電偶37的訊號係被傳送至控制器38。接著,控制器38係按照熱電偶37的訊號而對加熱器電源36傳送指令,且控制加熱器35的加熱而將晶圓W控制成預定溫度。 Fig. 21 is a cross-sectional view showing an example of the film forming apparatus 1. The film forming apparatus 1 has a substantially cylindrical chamber 31 that is airtight, and is disposed in a state in which it is supported by a cylindrical support member 33 provided at a lower central portion thereof. The susceptor 32 of the wafer W as the object to be processed. The susceptor 32 is made of a ceramic such as AIN. Further, a heater 35 is buried in the susceptor 32, and a heater power source 36 is connected to the heater 35. On the other hand, a thermocouple 37 is provided on the top of the susceptor 32, and the signal of the thermocouple 37 is transmitted to the controller 38. Next, the controller 38 transmits an instruction to the heater power source 36 in accordance with the signal of the thermocouple 37, and controls the heating of the heater 35 to control the wafer W to a predetermined temperature.

其中,在腔室31的內壁、及基座32及支持構件33的外周係設有用以防止附著物堆積的石英襯裡39。在石英 襯裡39與腔室31的壁部之間係流通沖洗氣體(屏蔽氣體),藉此防止附著物堆積在壁部而防止污染。此外,石英襯裡39係可卸除,俾以有效率地進行腔室31內的保養。 Among them, a quartz lining 39 for preventing accumulation of deposits is provided on the inner wall of the chamber 31 and the outer periphery of the susceptor 32 and the support member 33. In quartz A flushing gas (shield gas) is passed between the lining 39 and the wall portion of the chamber 31, thereby preventing deposits from accumulating on the wall portion to prevent contamination. Further, the quartz lining 39 can be removed to perform maintenance in the chamber 31 efficiently.

在腔室31的天壁31a形成有圓形孔31b,自此被嵌入朝向腔室31內突出的淋洗頭40。淋洗頭40係用以將成膜用氣體吐出至腔室31內者,在其上部連接有導入原料氣體的第1導入路41、及導入氧化劑的第2導入路42。在淋洗頭40的內部係以上下2段設有空間43、44。在上側的空間43係連接有第1導入路41,第1氣體吐出路45由該空間43延伸至淋洗頭40的底面。在下側的空間44係連接有第2導入路42,第2氣體吐出路46由該空間44延伸至淋洗頭40的底面。亦即,淋洗頭40係形成為金屬原料氣體與氧化劑不會相混合而在空間43、44均一擴散且分別獨立由吐出路45及46吐出的後混合型(post-mixed type)。 A circular hole 31b is formed in the sky wall 31a of the chamber 31, and is thereby embedded in the shower head 40 which protrudes toward the inside of the chamber 31. The shower head 40 is for discharging the film forming gas into the chamber 31, and a first introduction path 41 into which the material gas is introduced and a second introduction path 42 into which the oxidizing agent is introduced are connected to the upper portion. Spaces 43, 44 are provided in the upper and lower sections of the shower head 40. The first introduction path 41 is connected to the upper space 43, and the first gas discharge path 45 extends from the space 43 to the bottom surface of the shower head 40. The second introduction path 42 is connected to the lower space 44, and the second gas discharge path 46 extends from the space 44 to the bottom surface of the shower head 40. That is, the shower head 40 is formed as a post-mixed type in which the metal material gas and the oxidizing agent are not mixed and uniformly diffused in the spaces 43, 44 and independently discharged from the discharge paths 45 and 46.

其中,基座32係可藉由未圖示之升降機構來作升降,以將被曝露在原料氣體的空間極小化的方式調整製程間隙。 Among them, the susceptor 32 can be raised and lowered by an elevating mechanism (not shown) to adjust the process gap so that the space exposed to the material gas is minimized.

在腔室31的底壁設有朝向下方突出的排氣室51。在排氣室51的側面係連接有排氣管52,在該排氣管52係連接有排氣裝置53。接著使該排氣裝置53作動,藉此可將腔室31內減壓至預定的真空度為止。 An exhaust chamber 51 that protrudes downward is provided on the bottom wall of the chamber 31. An exhaust pipe 52 is connected to the side surface of the exhaust chamber 51, and an exhaust device 53 is connected to the exhaust pipe 52. The exhaust device 53 is then actuated, whereby the pressure in the chamber 31 can be reduced to a predetermined degree of vacuum.

在腔室31的側壁係設有:用以在與晶圓搬送室5之 間進行晶圓W之搬入搬出的搬入搬出口54;及將該搬入搬出口54作開閉的閘閥G。 The sidewall of the chamber 31 is provided for: in the wafer transfer chamber 5 The loading/unloading port 54 for loading and unloading the wafer W; and the gate valve G for opening and closing the loading/unloading port 54.

以原料氣體及氧化劑而言,係可使用如上所述者,若為CVD的情形,原料氣體通過第1導入路41、氧化劑通過第2導入路42而同時被供給至淋洗頭40,若為ALD的情形,則係被交替供給。原料氣體係由例如原料容器壓送液體狀原料,以氣化器使其氣化而被供給。 In the case of CVD, the raw material gas and the oxidizing agent can be supplied to the shower head 40 through the first introduction path 41 and the oxidant through the second introduction path 42 as in the case of CVD. In the case of ALD, it is alternately supplied. The raw material gas system is supplied with a liquid raw material by, for example, a raw material container, and is vaporized by a gasifier to be supplied.

在如上所示所構成的成膜裝置中,首先,在將晶圓W搬入至腔室31內後,將其中進行排氣而形成為預定的真空狀態,藉由加熱器35,將晶圓W加熱至預定溫度。 In the film forming apparatus configured as described above, first, after the wafer W is carried into the chamber 31, it is exhausted to form a predetermined vacuum state, and the wafer W is heated by the heater 35. Heat to a predetermined temperature.

在該狀態下,若為CVD的情形,係透過第1導入路41及第2導入路42,而同時透過淋洗頭40將原料氣體與氧化劑導入至腔室31內,若為ALD的情形,則係將該等交替導入至腔室31內。 In this case, in the case of CVD, the first introduction path 41 and the second introduction path 42 are transmitted through the shower head 40, and the source gas and the oxidant are introduced into the chamber 31. These are alternately introduced into the chamber 31.

藉此,在經加熱的晶圓W上,原料氣體與氧化劑起反應,在晶圓W上成膜預定的High-k膜。 Thereby, the raw material gas reacts with the oxidant on the heated wafer W, and a predetermined High-k film is formed on the wafer W.

<第1改質處理裝置之第1例> <First Example of First Modification Processing Apparatus>

接著說明第1改質處理裝置之第1例。 Next, a first example of the first modification processing device will be described.

第1例係紫外線照射裝置之例。圖22係第1改質處理裝置之第1例的剖面圖。在該例中,第1改質處理裝置3-1係具有構成為氣密的大致圓筒狀腔室61,在腔室61內係以可旋轉的方式設有以可旋轉的方式支持晶圓W的支持構件62。支持構件62的旋轉軸63係朝下方延伸,藉 由腔室61外的旋轉驅動機構64進行旋轉。 The first example is an example of an ultraviolet irradiation device. Fig. 22 is a cross-sectional view showing a first example of the first modification processing device. In this example, the first modification processing device 3-1 has a substantially cylindrical chamber 61 configured to be airtight, and is rotatably provided in the chamber 61 to rotatably support the wafer. Support member 62 of W. The rotation shaft 63 of the support member 62 extends downward, borrowing Rotation is performed by the rotary drive mechanism 64 outside the chamber 61.

在腔室61的外周係以環狀設有排氣路徑65,腔室61與排氣路徑65係透過排氣孔66而相連。接著,在排氣路65的至少1部位連接有真空泵等排氣機構(未圖示),腔室61內被排氣。 An exhaust path 65 is provided in an annular shape on the outer circumference of the chamber 61, and the chamber 61 and the exhaust path 65 are connected to each other through the exhaust hole 66. Next, an exhaust mechanism (not shown) such as a vacuum pump is connected to at least one portion of the exhaust passage 65, and the inside of the chamber 61 is exhausted.

在腔室61的天壁設有照射紫外線的紫外線燈67,對腔室61內的晶圓W照射紫外線。此外,在腔室61的天壁被插入有氣體導入管68,在氣體導入管68連接有氣體供給管69,透過氣體供給管69及氣體導入管68,O2氣體被導入至腔室61內。 An ultraviolet lamp 67 that emits ultraviolet rays is provided on the wall of the chamber 61, and the wafer W in the chamber 61 is irradiated with ultraviolet rays. Further, a gas introduction pipe 68 is inserted into the ceiling of the chamber 61, a gas supply pipe 69 is connected to the gas introduction pipe 68, and the gas supply pipe 69 and the gas introduction pipe 68 are passed through, and the O 2 gas is introduced into the chamber 61. .

在腔室61的底部設有燈室70,燈室70的上面設有由石英等透明材料所構成的透光板71。在燈室內設有複數加熱燈72,可將晶圓W加熱。其中,在燈室70的底面與旋轉驅動機構64之間係以包圍旋轉軸63的方式設有伸縮囊73。 A lamp chamber 70 is provided at the bottom of the chamber 61, and a light-transmitting plate 71 made of a transparent material such as quartz is provided on the upper surface of the lamp chamber 70. A plurality of heating lamps 72 are provided in the lamp chamber to heat the wafer W. The bellows 73 is provided between the bottom surface of the lamp chamber 70 and the rotation drive mechanism 64 so as to surround the rotation shaft 63.

在如上所示所構成的第1改質處理裝置3-1中,首先,在對腔室61內搬入晶圓W之後,將其中排氣而形成為預定的真空狀態,藉由旋轉驅動機構64,透過支持構件62而使晶圓W旋轉,並且視需要,藉由燈室70的燈72,將晶圓W加熱至預定溫度。若為室溫處理時,並不使用燈72。 In the first modification processing apparatus 3-1 configured as described above, first, after the wafer W is loaded into the chamber 61, the exhaust gas is exhausted to a predetermined vacuum state, and the rotary drive mechanism 64 is driven. The wafer W is rotated by the support member 62, and the wafer W is heated to a predetermined temperature by the lamp 72 of the lamp chamber 70 as needed. If it is treated at room temperature, the lamp 72 is not used.

在該狀態下將O2氣體導入至腔室61內,並且照射紫外線燈67,藉此對晶圓W上的High-k膜施行紫外線激發自由基氧化處理作為第1改質處理。藉此,High-k膜的雜 質被去除,並且膜被緻密化。 In this state, O 2 gas is introduced into the chamber 61, and the ultraviolet lamp 67 is irradiated, whereby the High-k film on the wafer W is subjected to ultraviolet excitation radical oxidation treatment as the first modification treatment. Thereby, impurities of the High-k film are removed, and the film is densified.

<第1改質處理裝置之第2例> <Second example of the first modification processing device>

接著說明第1改質處理裝置之第2例。第2例係微波電漿裝置之例,作為RLSA(Radial Line Slot Antenna,輻射線槽孔天線)微波電漿方式的微波電漿處理裝置所構成。圖23係顯示第1改質處理裝置之第2例的剖面圖。在該例中,第1改質處理裝置3-2係具有:大致圓筒狀的腔室81;被設在其中的基座82;導入被設在腔室81的側壁的處理氣體的氣體導入部83;以面向腔室81的上部的開口部的方式而設,形成有多數的微波透過孔84a的平面天線84;使微波發生的微波發生部85;及將微波發生部85導至平面天線84的微波傳送機構86。 Next, a second example of the first modification processing device will be described. The second example is an example of a microwave plasma processing apparatus, and is configured as a microwave plasma processing apparatus of a RLSA (Radial Line Slot Antenna) microwave plasma type. Fig. 23 is a cross-sectional view showing a second example of the first modification processing device. In this example, the first reforming treatment device 3-2 includes a substantially cylindrical chamber 81, a susceptor 82 provided therein, and a gas introduction of a process gas introduced into a side wall of the chamber 81. a portion 83 that faces the upper portion of the chamber 81, a planar antenna 84 in which a plurality of microwave transmission holes 84a are formed, a microwave generating portion 85 that generates microwaves, and a microwave generating portion 85 that leads to a planar antenna Microwave transfer mechanism 86 of 84.

在平面天線84的下方設有由介電質所構成的微波透過板91,在平面天線84之上設有屏蔽構件92。屏蔽構件92係形成為水冷構造。其中,在平面天線84的上面亦可設有由介電質所構成的遲波材。 A microwave transmitting plate 91 made of a dielectric material is provided below the planar antenna 84, and a shield member 92 is provided on the planar antenna 84. The shield member 92 is formed in a water-cooled configuration. Among them, a late wave material made of a dielectric material may be provided on the upper surface of the planar antenna 84.

微波傳送機構86係具有:由微波發生部85導引微波之朝水平方向延伸的導波管101;由從平面天線84朝上方延伸的內導體103及外導體104所構成的同軸導波管102;及設在導波管101與同軸導波管102之間的模式變換機構105。其中,符號93為排氣管。 The microwave transmission mechanism 86 includes a waveguide 101 extending in the horizontal direction by the microwave generating unit 85, and a coaxial waveguide 102 composed of the inner conductor 103 and the outer conductor 104 extending upward from the planar antenna 84. And a mode conversion mechanism 105 provided between the waveguide 101 and the coaxial waveguide 102. Wherein, reference numeral 93 is an exhaust pipe.

在基座82係連接有供離子引入之用的高頻電源106, 可將離子引入至High-k膜而將膜形成為非晶質狀。 A high frequency power source 106 for ion introduction is connected to the susceptor 82, Ions can be introduced into the High-k film to form the film into an amorphous state.

如上所示所構成的第1改質處理裝置3-2係將在微波發生部85所發生的微波透過微波傳送機構86而以預定的模式導至平面天線84,通過平面天線84的微波透過孔84a及微波透過板91而均一供給至腔室81內,藉由該微波,將由氣體導入部83所被供給的處理氣體電漿化而藉由該電漿中的自由基,對晶圓W上的High-k膜施行第1改質處理(微波電漿處理)。以處理氣體而言,係可使用O2氣體、O2氣體+稀有氣體、稀有氣體、稀有氣體+N2氣體。 The first modification processing device 3-2 configured as described above transmits the microwave generated by the microwave generating unit 85 to the planar antenna 84 in a predetermined pattern through the microwave transmission mechanism 86, and passes through the microwave transmission hole of the planar antenna 84. 84a and the microwave transmitting plate 91 are uniformly supplied into the chamber 81, and the processing gas supplied from the gas introduction portion 83 is plasma-formed by the microwave to be on the wafer W by the radical in the plasma. The High-k film was subjected to a first modification treatment (microwave plasma treatment). As the processing gas, O 2 gas, O 2 gas + rare gas, rare gas, rare gas + N 2 gas can be used.

<第1改質處理裝置之第3例> <The third example of the first modification processing device>

接著說明第1改質處理裝置之第3例。 Next, a third example of the first modification processing device will be described.

第3例係使用複數小型微波照射機構之微波電漿裝置之例。圖24係顯示第1改質處理裝置之第3例的剖面圖。在該例中,第1改質處理裝置3-3係具有構成為氣密之大致圓筒狀的腔室111,在腔室111內,在其中央以支持腳113予以支持的狀態下設有載置晶圓W的基座112。在基座112係被埋入加熱器114,在該加熱器114係連接有加熱器電源115,根據熱電偶(未圖示)的溫度訊號,藉由控制器(未圖示)來控制晶圓W的溫度。 The third example is an example of a microwave plasma apparatus using a plurality of small microwave irradiation mechanisms. Fig. 24 is a cross-sectional view showing a third example of the first modification processing device. In this example, the first reforming treatment device 3-3 has a substantially cylindrical chamber 111 that is airtight, and is provided in the chamber 111 in a state where the center is supported by the support leg 113. The susceptor 112 on which the wafer W is placed. The susceptor 112 is embedded in the heater 114, and the heater 114 is connected to the heater power source 115. The wafer is controlled by a controller (not shown) according to a temperature signal of a thermocouple (not shown). The temperature of W.

在腔室111的外周係以環狀設有排氣路徑116,腔室111與排氣路徑116係透過排氣孔117而相連。接著,在排氣路徑116的至少1部位連接有真空泵等排氣機構(未 圖示),腔室111內被排氣。 An exhaust path 116 is provided in an annular shape on the outer circumference of the chamber 111, and the chamber 111 and the exhaust path 116 are connected to each other through the exhaust hole 117. Next, an exhaust mechanism such as a vacuum pump is connected to at least one portion of the exhaust path 116 (not As shown in the figure, the chamber 111 is exhausted.

在腔室111的天壁,係如圖25所示,設有構成微波電漿源且將電漿生成用微波導入至腔室111內的6個微波導入機構118。該微波導入機構118係將導入第2例之微波的機構形成為小型,具有由筒狀同軸纜線所構成的導波管;設在其前端的平面天線;及以可移動的方式設置導波管的調諧器。由於將調諧器與天線部一體設置,因此可將調諧器形成為簡易構造的芯塊調諧器,可將微波導入機構118形成為極為精簡的構造。 As shown in Fig. 25, the sky wall of the chamber 111 is provided with six microwave introduction mechanisms 118 constituting a microwave plasma source and introducing microwaves for plasma generation into the chamber 111. The microwave introduction mechanism 118 is configured to have a mechanism for introducing the microwave of the second example into a small size, and has a waveguide composed of a cylindrical coaxial cable; a planar antenna provided at the front end thereof; and a waveguide that is movably provided Tube tuner. Since the tuner and the antenna unit are integrally provided, the tuner can be formed as a pellet tuner of a simple structure, and the microwave introduction mechanism 118 can be formed into an extremely compact structure.

此外,在腔室111的天壁係被插入氣體導入管119,在氣體導入管119係被連接有氣體供給管120,透過氣體供給管120及氣體導入管119,處理氣體被導入至腔室111內。 Further, the ceiling wall of the chamber 111 is inserted into the gas introduction pipe 119, the gas supply pipe 120 is connected to the gas introduction pipe 119, and the gas supply pipe 120 and the gas introduction pipe 119 are transmitted, and the process gas is introduced into the chamber 111. Inside.

如上所示所構成的第1改質處理裝置3-3係首先在腔室111內搬入晶圓W後,將其中進行排氣而形成為預定的真空狀態,將在未圖示之微波發生部所發生的微波以放大器放大而透過導波路來導至微波導入機構118,由在該處所內置的平面天線對腔室111內導入微波,並且透過氣體供給管120及氣體導入管119來對腔室111內導入處理氣體,藉由微波將處理氣體電漿化,藉由該電漿中的自由基,對晶圓W上的High-k膜施行第1改質處理(微波電漿處理)。以處理氣體而言,係可使用O2氣體、O2氣體+稀有氣體、稀有氣體、稀有氣體+N2氣體。 The first modification processing device 3-3 configured as described above firstly carries out the wafer W in the chamber 111, and then exhausts it to form a predetermined vacuum state, and the microwave generating unit (not shown) The generated microwave is amplified by the amplifier and guided to the microwave introduction mechanism 118 through the waveguide, and the microwave is introduced into the chamber 111 by the planar antenna built therein, and the gas is supplied through the gas supply tube 120 and the gas introduction tube 119. A processing gas is introduced into the 111, and the processing gas is plasma-formed by the microwave, and the high-k film on the wafer W is subjected to a first modification treatment (microwave plasma treatment) by the radicals in the plasma. As the processing gas, O 2 gas, O 2 gas + rare gas, rare gas, rare gas + N 2 gas can be used.

本例之微波導入機構118係精簡的構造,因此設置自 由度高,可按照晶圓W的高度位置等,使角度成為可變,且可以對晶圓W效率佳地照射微波的方式進行調整。 The microwave introduction mechanism 118 of this example is a compact structure, and thus is set from The degree is high, the angle can be made variable according to the height position of the wafer W, and the like, and the wafer W can be efficiently irradiated with microwaves.

<第2改質處理裝置之第1例> <First Example of Second Modification Processing Apparatus>

接著說明第2改質處理裝置之第1例。 Next, a first example of the second modification processing device will be described.

第1例係作為使用燈加熱的RTP裝置所構成,對High-k膜施行尖波退火者。圖26係顯示第2改質處理裝置之第1例的剖面圖。在該例中,第2改質處理裝置4-1係具有構成為氣密之大致圓筒狀的腔室121,在腔室121內係以可旋轉的方式設有以可旋轉的方式支持晶圓W的支持構件122。支持構件122的旋轉軸123係朝下方延伸,藉由腔室121外的旋轉驅動機構124進行旋轉。 The first example is constituted by an RTP apparatus which is heated by a lamp, and is subjected to a sharp-wave annealing of the High-k film. Fig. 26 is a cross-sectional view showing a first example of the second modification processing device. In this example, the second reforming treatment device 4-1 has a substantially cylindrical chamber 121 that is airtight, and is rotatably provided in the chamber 121 to rotatably support the crystal. Support member 122 of circle W. The rotation shaft 123 of the support member 122 extends downward, and is rotated by a rotation driving mechanism 124 outside the chamber 121.

在腔室121的外周係以環狀設有排氣路徑125,腔室121與排氣路徑125係透過排氣孔126而相連。接著,在排氣路徑125的至少1部位連接有真空泵等排氣機構(未圖示),腔室121內被排氣。 An exhaust path 125 is provided in an annular shape on the outer circumference of the chamber 121, and the chamber 121 and the exhaust path 125 are connected to each other through the exhaust hole 126. Next, an exhaust mechanism (not shown) such as a vacuum pump is connected to at least one portion of the exhaust path 125, and the inside of the chamber 121 is exhausted.

在腔室121的天壁係被插入氣體導入管128,在氣體導入管128係連接有氣體供給管129,透過氣體供給管129及氣體導入管128,處理氣體被導入至腔室121內。以處理氣體而言,係可適於使用Ar氣體等稀有氣體或N2氣體。 The gas introduction pipe 128 is inserted into the ceiling wall of the chamber 121, the gas supply pipe 129 is connected to the gas introduction pipe 128, and the gas supply pipe 129 and the gas introduction pipe 128 are passed through, and the process gas is introduced into the chamber 121. In terms of the processing gas, a rare gas such as an Ar gas or an N 2 gas can be suitably used.

在腔室121的底部設有燈室130,燈室130的上面係設有由石英等透明材料所構成的透光板131。在燈室內設 有複數加熱燈132,可將晶圓W加熱。其中,在燈室130的底面與旋轉驅動機構124之間係以包圍旋轉軸123的方式設有伸縮囊133。 A lamp chamber 130 is provided at the bottom of the chamber 121, and a light-transmitting plate 131 made of a transparent material such as quartz is disposed on the upper surface of the lamp chamber 130. Set in the lamp room There is a plurality of heating lamps 132 that heat the wafer W. The bellows 133 is provided between the bottom surface of the lamp chamber 130 and the rotation drive mechanism 124 so as to surround the rotation shaft 123.

在如上所示所構成的第2改質處理裝置4-1中,首先在將晶圓W搬入至腔室121內後,將其中進行排氣而形成為預定的真空狀態,一面對腔室121內導入處理氣體,一面藉由旋轉驅動機構124,透過支持構件122而使晶圓W旋轉,並且藉由燈室130的燈132,將晶圓W急速升溫,在形成為預定溫度的時點,將燈132形成為OFF而急速降溫。藉此,可以較小的熱預算來進行High-k膜的結晶化處理。 In the second modification processing apparatus 4-1 configured as described above, first, after the wafer W is carried into the chamber 121, the inside of the wafer W is exhausted to form a predetermined vacuum state, and a chamber is faced. When the processing gas is introduced into the 121, the wafer W is rotated by the rotation driving mechanism 124 through the support member 122, and the wafer W is rapidly heated by the lamp 132 of the lamp chamber 130, and when the temperature is set to a predetermined temperature, The lamp 132 is turned OFF and rapidly cooled. Thereby, the crystallization treatment of the High-k film can be performed with a small thermal budget.

其中,晶圓W亦可不一定使其旋轉。此外,亦可將燈室130配置在晶圓W的上方。此時亦可在晶圓W的背面側設置冷卻機構,可更急速的降溫。 Among them, the wafer W may not necessarily rotate. Further, the lamp chamber 130 may be disposed above the wafer W. At this time, a cooling mechanism can be provided on the back side of the wafer W, and the temperature can be lowered more rapidly.

<第2改質處理裝置之第2例> <Second Example of Second Modification Processing Apparatus>

接著說明第2改質處理裝置之第2例。 Next, a second example of the second modification processing device will be described.

第2例係具備有電阻加熱器之加熱裝置之例。圖27係顯示第2改質處理裝置之第2例的剖面圖。在該例中,第2改質處理裝置4-2係具有構成為氣密之大致圓筒狀的腔室141,在腔室141內,以其中央以支持腳143予以支持的狀態下設有載置晶圓W的基座142。在基座142係被埋入有電阻加熱器144,在該加熱器144係連接有加熱器電源145,根據熱電偶(未圖示)的溫度訊號,藉由控制 器(未圖示)來控制晶圓W的溫度。 The second example is an example of a heating device having a resistance heater. Fig. 27 is a cross-sectional view showing a second example of the second modification processing device. In this example, the second reforming treatment device 4-2 has a substantially cylindrical chamber 141 that is airtight, and is provided in the chamber 141 with the center supported by the support legs 143. The susceptor 142 on which the wafer W is placed. A resistor heater 144 is embedded in the pedestal 142, and a heater power source 145 is connected to the heater 144, and is controlled by a temperature signal of a thermocouple (not shown). A device (not shown) controls the temperature of the wafer W.

在腔室141的外周係以環狀設有排氣路徑146,腔室141與排氣路徑146係透過排氣孔147而相連。接著,在排氣路徑146的至少1部位連接有真空泵等排氣機構(未圖示),腔室141內被排氣。 An exhaust path 146 is provided in an annular shape on the outer circumference of the chamber 141, and the chamber 141 and the exhaust path 146 are connected to each other through the exhaust hole 147. Next, an exhaust mechanism (not shown) such as a vacuum pump is connected to at least one portion of the exhaust path 146, and the inside of the chamber 141 is exhausted.

在腔室141的天壁係被插入氣體導入管148,在氣體導入管148係連接有氣體供給管149,透過氣體供給管149及氣體導入管148,處理氣體被導入至腔室141內。以處理氣體而言,可適於使用Ar氣體等稀有氣體或N2氣體。 The gas introduction pipe 148 is inserted into the ceiling wall of the chamber 141, the gas supply pipe 149 is connected to the gas introduction pipe 148, and the gas supply pipe 149 and the gas introduction pipe 148 are passed through, and the process gas is introduced into the chamber 141. As the processing gas, a rare gas such as an Ar gas or an N 2 gas can be suitably used.

在如上所示所構成的第2改質處理裝置4-2中,首先將晶圓W搬入至腔室141內後,將其中進行排氣而形成為預定的真空狀態,一面對腔室141內導入處理氣體,一面藉由電阻加熱器144將晶圓W加熱,在形成為700℃以下的預定溫度的時點,將該溫度保持預定時間,之後,使電阻加熱器成為OFF。 In the second modification processing apparatus 4-2 configured as described above, first, the wafer W is carried into the chamber 141, and then exhausted therein to be in a predetermined vacuum state, and a chamber 141 is faced. The wafer W is heated by the electric resistance heater 144 while the processing gas is introduced thereinto, and the temperature is maintained for a predetermined time at a predetermined temperature of 700 ° C or lower, and then the electric resistance heater is turned off.

如上所示以較為低溫進行退火處理,因此可以較小的熱預算進行High-k膜的結晶化處理。 Since the annealing treatment is performed at a relatively low temperature as described above, the crystallization treatment of the High-k film can be performed with a small thermal budget.

<第2改質處理裝置之第3例> <Third Example of Second Modification Processing Apparatus>

接著說明第2改質處理裝置之第3例。 Next, a third example of the second modification processing device will be described.

第3例係使用複數微波照射機構之微波加熱裝置之例。圖28係顯示第2改質處理裝置之第3例的剖面圖。在該例中,第2改質處理裝置4-3係具有構成為氣密之大 致圓筒狀的腔室151,在腔室151內,在其中央以支持腳153予以支持的狀態下設有載置晶圓W的載置台152。 The third example is an example of a microwave heating apparatus using a plurality of microwave irradiation mechanisms. Fig. 28 is a cross-sectional view showing a third example of the second modification processing device. In this example, the second modification processing device 4-3 is configured to be airtight. The cylindrical chamber 151 is provided with a mounting table 152 on which the wafer W is placed in the center of the chamber 151 with the support leg 153 supported.

在腔室151的外周係以環狀設有排氣路徑155,腔室151與排氣路徑155係透過排氣孔156而相連。接著,在排氣路徑155的至少1部位連接有真空泵等排氣機構(未圖示),腔室151內被排氣。 An exhaust path 155 is formed in an annular shape on the outer circumference of the chamber 151, and the chamber 151 and the exhaust path 155 are connected to each other through the exhaust hole 156. Next, an exhaust mechanism (not shown) such as a vacuum pump is connected to at least one portion of the exhaust path 155, and the inside of the chamber 151 is exhausted.

在腔室151的天壁係設有照射微波的6個微波照射機構157。該微波照射機構157係用以照射860MHz以上的預定波長的微波而將形成在晶圓W的High-k膜進行微波加熱者。 Six microwave irradiation mechanisms 157 that irradiate microwaves are provided in the sky wall of the chamber 151. The microwave irradiation unit 157 is configured to irradiate microwaves of a predetermined wavelength of 860 MHz or more to microwave the High-k film formed on the wafer W.

此外,在腔室151的天壁係被插入氣體導入管158,在氣體導入管158係連接有氣體供給管159,透過氣體供給管159及氣體導入管158,處理氣體被導入至腔室151內。以處理氣體而言,可適於使用Ar氣體等稀有氣體或N2氣體。 Further, the gas wall introduction pipe 158 is inserted into the gas wall of the chamber 151, the gas supply pipe 159 is connected to the gas introduction pipe 158, and the gas is introduced into the chamber 151 through the gas supply pipe 159 and the gas introduction pipe 158. . As the processing gas, a rare gas such as an Ar gas or an N 2 gas can be suitably used.

如上所示所構成的第2改質處理裝置4-3係首先在將晶圓W搬入至腔室151內後,將其中進行排氣而形成為預定的真空狀態,一面透過氣體供給管159及氣體導入管158對腔室151內導入處理氣體,一面將預定波長的微波以預定的輸出由微波照射機構157朝向晶圓W進行照射,藉由利用電磁波能量所致之內部加熱,將High-k膜直接加熱。因此,可以400℃以下的低溫將High-k膜結晶化。 The second modification processing apparatus 4-3 configured as described above first passes through the gas supply pipe 159 and after the wafer W is carried into the chamber 151, and is exhausted to form a predetermined vacuum state. The gas introduction pipe 158 introduces a processing gas into the chamber 151, and irradiates the microwave of a predetermined wavelength to the wafer W by the microwave irradiation means 157 at a predetermined output, and the High-k is heated by internal heating by electromagnetic energy. The film is heated directly. Therefore, the High-k film can be crystallized at a low temperature of 400 ° C or lower.

其中,該微波加熱裝置亦可作為上述第3實施形態之 改質處理裝置來使用。 Wherein, the microwave heating device can also be used as the third embodiment. The modification processing device is used.

<第2改質處理裝置之第4例> <Fourth Example of Second Modification Processing Apparatus>

接著說明第2改質處理裝置之第4例。 Next, a fourth example of the second modification processing device will be described.

第4例係使用LED之LED加熱裝置之例。圖29係顯示第2改質處理裝置之第4例的剖面圖。在該例中,第2改質處理裝置4-4係具有構成為氣密之大致圓筒狀的腔室161,在腔室161內,以其中央以支持腳163予以支持的狀態下設有載置晶圓W的載置台162。 The fourth example is an example of an LED heating device using LEDs. Fig. 29 is a cross-sectional view showing a fourth example of the second modification processing device. In this example, the second reforming treatment device 4-4 has a substantially cylindrical chamber 161 that is airtight, and is provided in the chamber 161 with the center supported by the support leg 163. The mounting table 162 on which the wafer W is placed.

在腔室161的外周係以環狀設有排氣路徑165,腔室161與排氣路徑165係透過排氣孔166而相連。接著,在排氣路徑165的至少1部位連接有真空泵等排氣機構(未圖示),腔室161內被排氣。 An exhaust path 165 is provided in an annular shape on the outer circumference of the chamber 161, and the chamber 161 and the exhaust path 165 are connected to each other through the exhaust hole 166. Next, an exhaust mechanism (not shown) such as a vacuum pump is connected to at least one portion of the exhaust path 165, and the inside of the chamber 161 is exhausted.

在腔室161的上部設有LED單元170。LED單元170係被嵌入在腔室161的天壁的中央,具有:形成具有比載置台162稍微大的直徑的圓筒狀的銅製冷卻構件171;在冷卻構件171之與晶圓W相對向的面,以與晶圓W相對應的方式而設的圓形凹部172;在設在凹部172之由良熱傳導性絕緣構件所構成的支持構件173搭載有複數LED174的LED陣列175;及以覆蓋凹部172的方式與晶圓W相對向而設之透過來自石英等LED的光透過構件176。在冷卻構件171設有冷卻媒體流路177,在其中通流可冷卻至0℃以下,例如-50℃左右的冷卻的液體狀冷卻媒體而使LED174被冷卻。 An LED unit 170 is provided at an upper portion of the chamber 161. The LED unit 170 is embedded in the center of the ceiling wall of the chamber 161, and has a cylindrical copper cooling member 171 having a diameter slightly larger than the mounting table 162, and a cooling member 171 opposed to the wafer W. a circular recess 172 provided to correspond to the wafer W; an LED array 175 on which the plurality of LEDs 174 are mounted on the support member 173 formed of the good thermal conductive insulating member in the recess 172; and a cover recess 172 The method is such that the light is transmitted through the light transmitting member 176 from the LED such as quartz. The cooling member 171 is provided with a cooling medium flow path 177 in which the LED 174 can be cooled by flowing through a cooled liquid cooling medium that can be cooled to below 0 ° C, for example, about -50 ° C.

在腔室161的天壁係被插入氣體導入管168,在氣體導入管168係連接有氣體供給管169,透過氣體供給管169及氣體導入管168,處理氣體被導入至腔室161內。以處理氣體而言,可適於使用Ar氣體等稀有氣體或N2氣體。 The gas introduction pipe 168 is inserted into the ceiling wall of the chamber 161, the gas supply pipe 169 is connected to the gas introduction pipe 168, and the gas supply pipe 169 and the gas introduction pipe 168 are passed through, and the process gas is introduced into the chamber 161. As the processing gas, a rare gas such as an Ar gas or an N 2 gas can be suitably used.

如上所示所構成的第2改質處理裝置4-4係先在將晶圓W搬入至腔室161內後,將其中進行排氣而形成為預定的真空狀態,一面透過氣體供給管169及氣體導入管168而對腔室161內導入處理氣體,一面與LED174通電來進行LED加熱處理。LED加熱並非利用加熱源的黑體輻射,而是利用藉由電子與電洞的再結合所致之電磁輻射,因此熱預算小,而且降溫速度極大。此外,大部分作為LED元件來使用的GaN或GaAs雖然對矽的吸收率高,但是對HfO2或HfSiOx的吸收率低,因此使HfO2膜或HfSiOx膜的溫度不太上升即可使其結晶化。 The second modification processing apparatus 4-4 configured as described above first passes through the gas supply pipe 169 and after the wafer W is carried into the chamber 161, and is exhausted to form a predetermined vacuum state. The gas introduction pipe 168 introduces a processing gas into the chamber 161, and energizes the LED 174 to perform LED heat treatment. LED heating does not utilize the black body radiation of the heating source, but utilizes the electromagnetic radiation caused by the recombination of electrons and holes, so the thermal budget is small and the cooling rate is extremely high. In addition, most of GaN or GaAs used as an LED element has a high absorptivity to germanium, but has a low absorptivity to HfO 2 or HfSiOx. Therefore, the temperature of the HfO 2 film or the HfSiOx film is not increased, and the crystal is crystallized. Chemical.

其中,該LED加熱裝置亦可作為上述第4實施形態之改質處理裝置來使用。 However, the LED heating device can also be used as the modification processing device of the fourth embodiment.

<可在相同腔室進行成膜處理與第1改質處理之裝置之例1> <Example 1 of a device capable of performing a film formation process and a first modification process in the same chamber>

以上係顯示在一個處理裝置進行一個工程之例,但是由處理的效率化或裝置費用減低的觀點來看,在本例中係顯示可在相同腔室進行成膜處理與第1改質處理之裝置之例。圖30係顯示可在相同腔室進行成膜處理與第1改質 處理之裝置之例1的剖面圖。該處理裝置180係具有構成為氣密之大致圓筒狀的腔室181,在腔室181內係以可旋轉的方式設有以可旋轉的方式支持晶圓W的支持構件182。支持構件182的旋轉軸183係朝下方延伸,藉由腔室181外的旋轉驅動機構184進行旋轉。此外,旋轉軸係可藉由升降機構(未圖示)來作升降,藉此使支持構件182可作升降。 The above shows an example in which one processing device performs one project. However, from the viewpoint of efficiency of processing or reduction of device cost, in this example, it is shown that the film forming process and the first reforming process can be performed in the same chamber. An example of a device. Figure 30 shows that the film formation process and the first modification can be performed in the same chamber. A cross-sectional view of Example 1 of the device being processed. The processing device 180 has a substantially cylindrical chamber 181 that is airtight, and a support member 182 that rotatably supports the wafer W is rotatably provided in the chamber 181. The rotation shaft 183 of the support member 182 extends downward, and is rotated by a rotation driving mechanism 184 outside the chamber 181. Further, the rotating shaft can be raised and lowered by a lifting mechanism (not shown), whereby the supporting member 182 can be raised and lowered.

在腔室181的外周係以環狀設有排氣路徑185,腔室181與排氣路徑185係透過排氣孔186而相連。接著,在排氣路徑185的至少1部位連接有真空泵等排氣機構(未圖示),腔室181內被排氣。 An exhaust path 185 is provided in an annular shape on the outer circumference of the chamber 181, and the chamber 181 and the exhaust path 185 are connected to each other through the exhaust hole 186. Next, an exhaust mechanism (not shown) such as a vacuum pump is connected to at least one portion of the exhaust path 185, and the inside of the chamber 181 is exhausted.

在腔室181的天壁設有照射紫外線的紫外線燈187,對腔室181內的晶圓W照射紫外線。此外,在腔室181的天壁被插入複數氣體導入栓塞190,第1孔191與第2孔192垂直貫穿至氣體導入栓塞190。接著,在第1孔191係連接有供給供成膜之用的原料氣體的第1氣體配管193,在第2孔192係連接有用以供給成膜時所使用的氧化劑及第1改質處理時所使用的O2氣體的第2氣體配管194。其中,若氧化劑為O2氣體時,若由第2氣體配管194僅供給O2氣體即可。 An ultraviolet lamp 187 that irradiates ultraviolet rays is provided on the ceiling of the chamber 181, and the wafer W in the chamber 181 is irradiated with ultraviolet rays. Further, a plurality of gas introduction plugs 190 are inserted into the ceiling of the chamber 181, and the first holes 191 and the second holes 192 are vertically inserted into the gas introduction plugs 190. Then, the first gas pipe 193 to which the material gas for film formation is supplied is connected to the first hole 191, and the oxidizing agent used for film formation is connected to the second hole 192, and the first modification process is used. The second gas pipe 194 of the O 2 gas used. However, when the oxidizing agent is O 2 gas, only the O 2 gas may be supplied from the second gas pipe 194.

在腔室181的底部設有燈室200,燈室200的上面係設有由石英等透明材料所構成的透光板201。在燈室200內設有複數加熱燈202,可將晶圓W加熱。其中,在燈室200的底面與旋轉驅動機構184之間係以包圍旋轉軸183 的方式設有伸縮囊203。 A lamp chamber 200 is provided at the bottom of the chamber 181, and a light-transmitting plate 201 made of a transparent material such as quartz is provided on the upper surface of the lamp chamber 200. A plurality of heater lamps 202 are provided in the lamp chamber 200 to heat the wafer W. Wherein, between the bottom surface of the lamp chamber 200 and the rotation driving mechanism 184, the rotation axis 183 is enclosed. The manner is provided with a bellows 203.

在如上所示所構成的處理裝置180中,首先,將晶圓W搬入至腔室181內且載置於支持構件182。接著,藉由未圖示之升降機構,以將被曝露在原料氣體的空間極小化的方式調整製程間隙後,將腔室181內進行排氣而形成為預定的真空狀態,一面藉由加熱燈202將晶圓W加熱成預定溫度,一面由氣體導入栓塞190同時或交替供給原料氣體及氧化劑,藉由CVD或ALD,成膜High-k膜,例如HfO2膜或HfSiOx膜。以原料氣體及氧化劑而言,係可使用如上所述者。此外,原料氣體係由例如原料容器壓送液體狀原料而以氣化器使其氣化來進行供給。 In the processing apparatus 180 configured as described above, first, the wafer W is carried into the chamber 181 and placed on the support member 182. Then, the process gap is adjusted so that the space exposed to the material gas is minimized by an elevating mechanism (not shown), and then the inside of the chamber 181 is exhausted to form a predetermined vacuum state, and the heat lamp is used. 202 heats the wafer W to a predetermined temperature, and simultaneously or alternately supplies the material gas and the oxidant from the gas introduction plug 190 to form a High-k film such as an HfO 2 film or an HfSiOx film by CVD or ALD. As the raw material gas and the oxidizing agent, those described above can be used. Further, the raw material gas system is supplied by, for example, pressing a liquid raw material by a raw material container and vaporizing it by a gasifier.

由氣體導入栓塞190所被供給的原料氣體與氧化劑係在被加熱的晶圓W上起反應,在晶圓W上成膜預定的High-k膜。 The material gas supplied from the gas introduction plug 190 reacts with the oxidant on the heated wafer W to form a predetermined High-k film on the wafer W.

成膜後,停止原料氣體與氧化劑的供給,在視需要將腔室181內沖洗後,調整製程間隙,在相同腔室內進行第1改質處理。 After the film formation, the supply of the material gas and the oxidant is stopped, and if necessary, the chamber 181 is rinsed, the process gap is adjusted, and the first modification process is performed in the same chamber.

首先,將腔室181內形成為預定的真空狀態,藉由旋轉驅動機構184,透過支持構件182來使晶圓W旋轉,並且視需要,藉由燈室200的加熱燈202,將晶圓W加熱至預定溫度。若為室溫處理,並不使用加熱燈202。 First, the inside of the chamber 181 is formed into a predetermined vacuum state, and the wafer W is rotated by the support member 182 by the rotation driving mechanism 184, and the wafer W is heated by the heating lamp 202 of the lamp chamber 200 as needed. Heat to a predetermined temperature. If it is treated at room temperature, the heater lamp 202 is not used.

在該狀態下將O2氣體導入至腔室181內,並且照射紫外線燈187,藉此對晶圓W上的High-k膜施行紫外線激發自由基氧化處理作為第1改質處理。藉此,High-k膜 的雜質被去除,並且膜被緻密化。 In this state, O 2 gas is introduced into the chamber 181, and the ultraviolet lamp 187 is irradiated, whereby the High-k film on the wafer W is subjected to ultraviolet excitation radical oxidation treatment as the first modification treatment. Thereby, impurities of the High-k film are removed, and the film is densified.

如上所示可在相同腔室內進行成膜處理與第1改質處理,因此可達成處理的效率化,亦可減低裝置費用。 As described above, since the film formation process and the first modification process can be performed in the same chamber, the efficiency of the process can be achieved, and the device cost can be reduced.

<可在相同腔室進行成膜處理與第1改質處理之裝置之例2> <Example 2 of a device capable of performing film formation processing and first modification treatment in the same chamber>

顯示可在相同腔室進行成膜處理與第1改質處理之裝置之例2。圖31係顯示可在相同腔室進行成膜處理與第1改質處理之裝置之例2的剖面圖。 Example 2 of a device capable of performing a film formation process and a first modification process in the same chamber. Fig. 31 is a cross-sectional view showing an example 2 of an apparatus which can perform a film forming process and a first modification process in the same chamber.

在該例中,處理裝置210係具有被構成為氣密之大致圓筒狀的腔室211,在腔室211內,在其中央以支持腳213予以支持的狀態下設有載置晶圓W的基座212。在基座212係被埋入加熱器214,在該加熱器214係連接有加熱器電源215,根據熱電偶(未圖示)的溫度訊號,藉由控制器(未圖示)來控制晶圓W的溫度。基座212係可藉由未圖示之升降機構來作升降。 In this example, the processing apparatus 210 has a substantially cylindrical chamber 211 that is configured to be airtight, and a wafer W is placed in the chamber 211 with the support leg 213 supported in the center thereof. Base 212. The susceptor 212 is embedded in a heater 214, and a heater power source 215 is connected to the heater 214. The wafer is controlled by a controller (not shown) according to a temperature signal of a thermocouple (not shown). The temperature of W. The base 212 can be raised and lowered by a lifting mechanism (not shown).

在腔室211的外周係以環狀設有排氣路徑216,腔室211與排氣路徑216係透過排氣孔217而相連。接著,在排氣路徑216的至少1部位連接有真空泵等排氣機構(未圖示),腔室211內被排氣。 An exhaust path 216 is provided in an annular shape on the outer circumference of the chamber 211, and the chamber 211 and the exhaust path 216 are connected to each other through the exhaust hole 217. Next, an exhaust mechanism (not shown) such as a vacuum pump is connected to at least one portion of the exhaust path 216, and the inside of the chamber 211 is exhausted.

在腔室211的天壁係與圖24同樣地設有6個微波導入機構218。該微波導入機構218係將導入第2例之微波的機構形成為小型者,具有:由筒狀的同軸纜線所構成的導波管;被設在其前端的平面天線;及以可移動導波管的 方式而設的調諧器。 In the sky wall system of the chamber 211, six microwave introduction mechanisms 218 are provided in the same manner as in Fig. 24 . The microwave introduction mechanism 218 is configured to be small in a mechanism for introducing the microwave of the second example, and includes a waveguide composed of a cylindrical coaxial cable, a planar antenna provided at the tip end thereof, and a movable guide. Wave tube The tuner of the way.

在腔室211的天壁的內側係設有以放射狀放出氣體的氣體放出構件220。該氣體放射構件220係被安裝在呈中央凹陷形狀的導引構件223,由氣體放射構件220以放射狀被放出的氣體係朝向晶圓W被放出。氣體放出構件220係呈半球狀而設有被區分為2系統的多數孔,在第1群的孔係連接有用以供給供成膜之用的原料氣體的第1氣體配管221,在第2群的孔係連接有用以供給氧化劑及第1改質處理所使用的處理氣體的第2氣體配管222。 A gas discharge member 220 that emits a gas in a radial direction is provided inside the ceiling wall of the chamber 211. The gas radiation member 220 is attached to the guide member 223 having a central concave shape, and is discharged toward the wafer W by the gas system radially discharged by the gas radiation member 220. The gas discharge member 220 has a hemispherical shape and is provided with a plurality of holes which are divided into two systems, and the first gas pipe 221 for supplying a material gas for film formation is connected to the hole of the first group, and the second group is connected to the second group. The hole is connected to a second gas pipe 222 for supplying an oxidizing agent and a processing gas used in the first reforming process.

在如上所示所構成的處理裝置210中,首先將晶圓W搬入至腔室211內且載置於基座212。接著,藉由未圖示之升降機構,以將被曝露在原料氣體的空間極小化的方式調整製程間隙後,將腔室211內進行排氣而形成為預定的真空狀態,一面藉由加熱器214將晶圓W加熱至預定溫度,一面由氣體放出構件220同時或交替供給原料氣體及氧化劑,藉由CVD或ALD成膜High-k膜,例如HfO2膜或HfSiOx膜。以原料氣體及氧化劑而言,係可使用如上所述者。此外,原料氣體係由例如原料容器壓送液體狀原料而以氣化器使其氣化來進行供給。 In the processing apparatus 210 configured as described above, the wafer W is first carried into the chamber 211 and placed on the susceptor 212. Then, the process gap is adjusted so that the space exposed to the material gas is minimized by an elevating mechanism (not shown), and then the inside of the chamber 211 is exhausted to form a predetermined vacuum state, and the heater is used. 214: The wafer W is heated to a predetermined temperature, and the source gas and the oxidant are simultaneously or alternately supplied from the gas discharge member 220, and a High-k film such as an HfO 2 film or an HfSiOx film is formed by CVD or ALD. As the raw material gas and the oxidizing agent, those described above can be used. Further, the raw material gas system is supplied by, for example, pressing a liquid raw material by a raw material container and vaporizing it by a gasifier.

由氣體放射構件220所被供給的原料氣體與氧化劑係在經加熱的晶圓W上起反應,在晶圓W上成膜預定的High-k膜。 The material gas supplied from the gas radiation member 220 reacts with the oxidant on the heated wafer W to form a predetermined High-k film on the wafer W.

成膜後,停止原料氣體與氧化劑的供給,在視需要沖洗腔室211內後,調整製程間隙,在相同腔室內進行第1 改質處理。 After the film formation, the supply of the material gas and the oxidant is stopped, and the process gap is adjusted after rinsing the chamber 211 as needed, and the first chamber is placed in the same chamber. Modification treatment.

首先,將腔室211內進行排氣而形成為預定的真空狀態,將在未圖示之微波發生部所發生的微波以放大器放大而透過導波路來導至微波導入機構218,由在該處所被內置的平面天線對腔室211內導入微波,並且由氣體放出構件220對腔室211內以放射狀導入處理氣體,藉由微波將處理氣體電漿化而藉由該電漿中的自由基,對晶圓W上的High-k膜施行第1改質處理(微波電漿處理)。以處理氣體而言,係可使用O2氣體、O2氣體+稀有氣體、稀有氣體、稀有氣體+N2氣體。 First, the inside of the chamber 211 is exhausted to form a predetermined vacuum state, and the microwave generated in the microwave generating unit (not shown) is amplified by an amplifier and transmitted to the microwave introducing mechanism 218 through the waveguide, and is placed in the space. The built-in planar antenna introduces microwaves into the chamber 211, and the gas discharge member 220 radially introduces the processing gas into the chamber 211, and plasma-processes the gas by the microwave to generate free radicals in the plasma. The first modification process (microwave plasma treatment) is performed on the High-k film on the wafer W. As the processing gas, O 2 gas, O 2 gas + rare gas, rare gas, rare gas + N 2 gas can be used.

本例之微波導入機構218係精簡的構造,因此設置自由度高,可按照晶圓W的高度位置等,使角度成為可變,且可以對晶圓W效率佳地照射微波的方式進行調整。 Since the microwave introduction mechanism 218 of the present embodiment has a simplified structure, the degree of freedom of installation is high, the angle can be made variable according to the height position of the wafer W, and the like, and the wafer W can be efficiently irradiated with microwaves.

在本例中,亦可在相同腔室進行成膜處理與第1改質處理,因此可達成處理效率化,亦可減低裝置費用。 In this example, the film formation process and the first modification process can be performed in the same chamber, so that the processing efficiency can be achieved and the device cost can be reduced.

<可在相同腔室進行成膜處理與第1改質處理之裝置之例3> <Example 3 of a device capable of performing a film formation process and a first modification process in the same chamber>

顯示可在相同腔室進行成膜處理與第1改質處理之裝置之例3。圖32係顯示可在相同腔室進行成膜處理與第1改質處理之裝置之例3的剖面圖。該例3與例2僅在氣體導入方式不同,因此其他共通部分係標註相同符號且省略說明。 An example 3 of a device capable of performing a film forming process and a first modification process in the same chamber is shown. Fig. 32 is a cross-sectional view showing an example 3 of a device which can perform a film forming process and a first modification process in the same chamber. In the example 3 and the example 2, the gas introduction method is different, and the other common parts are denoted by the same reference numerals, and the description thereof is omitted.

在該例中,處理裝置210’係在腔室211的天壁被插入複數氣體導入栓塞230,第1孔231與第2孔232垂直貫穿至氣體導入栓塞230。接著,在第1孔231係連接有供給供成膜之用的原料氣體的第1氣體配管233,在第2孔232係連接有用以供給成膜時所使用的氧化劑及第1改質處理時所使用的處理氣體的第2氣體配管234。 In this example, the processing device 210' is inserted into the plurality of gas introduction plugs 230 in the wall of the chamber 211, and the first holes 231 and the second holes 232 are vertically inserted into the gas introduction plugs 230. Then, the first gas pipe 233 to which the material gas for film formation is supplied is connected to the first hole 231, and the oxidizing agent used for film formation is connected to the second hole 232, and the first modification process is performed. The second gas pipe 234 of the processing gas to be used.

在如上所示之構成的裝置中亦與例2同樣地,可在相同腔室211內,連續進行成膜處理與第1改質處理。 Also in the apparatus having the above configuration, as in the case of Example 2, the film formation process and the first modification process can be continuously performed in the same chamber 211.

<可在同一腔室進行成膜處理、第1改質處理、及第2改質處理之裝置之例> <Example of a device capable of performing a film formation process, a first modification process, and a second modification process in the same chamber>

顯示可在相同腔室進行成膜處理、第1改質處理、及第2改質處理之裝置之例2。圖33係顯示可在相同腔室進行成膜處理、第1改質處理、及第2改質處理之裝置之例2的剖面圖。 Example 2 of a device capable of performing a film formation process, a first modification process, and a second modification process in the same chamber. Fig. 33 is a cross-sectional view showing an example 2 of a device which can perform a film forming process, a first modification process, and a second modification process in the same chamber.

在該例中,處理裝置240係具有構成為氣密之大致圓筒狀的腔室241,在腔室241內係在將其中央以支持腳243予以支持的狀態下設有載置晶圓W的基座242。在基座242係被埋入有加熱器244,在該加熱器244係連接有加熱器電源245,根據熱電偶(未圖示)的溫度訊號,藉由控制器(未圖示)來控制晶圓W的溫度。基座242係可藉由未圖示之升降機構來作升降。 In this example, the processing apparatus 240 has a chamber 241 having a substantially cylindrical shape that is airtight, and a wafer W is placed in the chamber 241 while the center thereof is supported by the support leg 243. Base 242. A heater 244 is embedded in the susceptor 242, and a heater power source 245 is connected to the heater 244, and the controller is controlled by a controller (not shown) according to a temperature signal of a thermocouple (not shown). The temperature of the circle W. The base 242 can be raised and lowered by a lifting mechanism (not shown).

在腔室241的外周係以環狀設有排氣路徑246,腔室241與排氣路徑246係透過排氣孔247而相連。接著,在 排氣路徑246的至少1部位連接有真空泵等排氣機構(未圖示),腔室241內被排氣。 An exhaust path 246 is provided in an annular shape on the outer circumference of the chamber 241, and the chamber 241 and the exhaust path 246 are connected to each other through the exhaust hole 247. Then, at At least one portion of the exhaust path 246 is connected to an exhaust mechanism (not shown) such as a vacuum pump, and the inside of the chamber 241 is exhausted.

在腔室241的天壁,如圖34所示,交替以圓周狀設有3個微波導入機構248與3個微波照射機構249。微波導入機構248係與上述微波導入機構118完全同樣地構成,微波照射機構249係與上述微波照射機構157完全同樣地構成。 In the sky wall of the chamber 241, as shown in Fig. 34, three microwave introduction mechanisms 248 and three microwave irradiation mechanisms 249 are alternately arranged in a circumferential direction. The microwave introduction mechanism 248 is configured in the same manner as the microwave introduction mechanism 118 described above, and the microwave irradiation mechanism 249 is configured in exactly the same manner as the microwave irradiation mechanism 157 described above.

在腔室241的天壁被插入複數氣體導入栓塞250,第1孔251與第2孔252垂直貫穿至氣體導入栓塞250。接著,在第1孔251係連接有供給供成膜之用的原料氣體的第1氣體配管253,在第2孔252係連接有用以供給成膜時所使用的氧化劑及第1改質處理時所使用的處理氣體及第2改質處理時所使用的處理氣體的第2氣體配管254。 A plurality of gas introduction plugs 250 are inserted into the ceiling of the chamber 241, and the first holes 251 and the second holes 252 are vertically penetrated to the gas introduction plug 250. Then, the first gas pipe 253 to which the material gas for film formation is supplied is connected to the first hole 251, and the oxidizing agent used for film formation is connected to the second hole 252, and the first modification process is used. The processing gas used and the second gas pipe 254 of the processing gas used in the second reforming process.

在如上所示所構成的處理裝置240中,首先,在腔室241內搬入晶圓W而載置在基座242。接著,藉由未圖示之升降機構,以將被曝露在原料氣體的空間極小化的方式調整製程間隙之後,將腔室241內進行排氣而形成為預定的真空狀態,一面藉由加熱器244將晶圓W加熱至預定溫度,一面由氣體導入栓塞250同時或交替供給原料氣體及氧化劑,藉由CVD或ALD,來成膜High-k膜,例如HfO2膜或HfSiOx膜。以原料氣體及氧化劑而言,係可使用如上所述者。此外,原料氣體係例如由原料容器壓送液體狀原料而以氣化器使其氣化來進行供給。 In the processing apparatus 240 configured as described above, first, the wafer W is carried in the chamber 241 and placed on the susceptor 242. Then, the process gap is adjusted so that the space exposed to the material gas is minimized by an elevating mechanism (not shown), and then the inside of the chamber 241 is exhausted to form a predetermined vacuum state, and the heater is used. 244 heats the wafer W to a predetermined temperature, and simultaneously or alternately supplies the material gas and the oxidant from the gas introduction plug 250 to form a High-k film such as an HfO 2 film or an HfSiOx film by CVD or ALD. As the raw material gas and the oxidizing agent, those described above can be used. Further, the raw material gas system is supplied by, for example, pressing a liquid raw material from a raw material container and vaporizing it by a gasifier.

由氣體導入栓塞250所被供給的原料氣體與氧化劑係 在經加熱的晶圓W上起反應,在晶圓W上成膜預定的High-k膜。 The raw material gas and oxidant system supplied from the gas introduction plug 250 A predetermined high-k film is formed on the wafer W by reacting on the heated wafer W.

成膜後,停止原料氣體與氧化劑的供給,視需要,將腔室241內沖洗後,調整製程間隙,在相同腔室內進行第1改質處理。 After the film formation, the supply of the material gas and the oxidizing agent is stopped, and if necessary, the chamber 241 is rinsed, the process gap is adjusted, and the first modification process is performed in the same chamber.

首先,以將腔室241內進行排氣而形成為預定的真空狀態,將在未圖示之微波發生部所發生的微波以放大器放大而透過導波路來導至微波導入機構248,由在該處所內置的平面天線將微波導入至腔室241內,並且由氣體導入栓塞250對腔室241內導入處理氣體,藉由微波將處理氣體電漿化,藉由該電漿中的自由基,對晶圓W上的High-k膜施行第1改質處理(微波電漿處理)。以處理氣體而言,係可使用O2氣體、O2氣體+稀有氣體、稀有氣體、稀有氣體+N2氣體。 First, the inside of the chamber 241 is evacuated to a predetermined vacuum state, and the microwave generated in the microwave generating unit (not shown) is amplified by an amplifier and transmitted to the microwave introducing unit 248 through the waveguide. The planar antenna built in the space introduces the microwave into the chamber 241, and the processing gas is introduced into the chamber 241 by the gas introduction plug 250, and the processing gas is plasmaized by the microwave, by the free radical in the plasma, The High-k film on the wafer W is subjected to a first modification process (microwave plasma treatment). As the processing gas, O 2 gas, O 2 gas + rare gas, rare gas, rare gas + N 2 gas can be used.

第1改質處理結束後,停止微波導入機構248的輸出,視需要將腔室241內沖洗後,調整製程間隙,在相同腔室內進行第2改質處理(微波照射處理)。 After the completion of the first modification process, the output of the microwave introduction mechanism 248 is stopped, and if necessary, the chamber 241 is rinsed, the process gap is adjusted, and the second modification process (microwave irradiation process) is performed in the same chamber.

一面透過氣體導入栓塞250而對腔室241內導入處理氣體,一面將預定波長的微波以預定的輸出由微波照射機構249朝向晶圓W照射,藉由利用電磁波能量所致之內部加熱來對High-k膜直接加熱。因此,可以400℃以下的低溫來將High-k膜結晶化。 While introducing the processing gas into the chamber 241 through the gas introduction plug 250, the microwave of a predetermined wavelength is irradiated toward the wafer W by the microwave irradiation means 249 at a predetermined output, and the internal heating by the electromagnetic wave energy is applied to the High. -k film is heated directly. Therefore, the High-k film can be crystallized at a low temperature of 400 ° C or lower.

由於如上所示可在同一腔室進行成膜處理與第1改質處理與第2改質處理,因此處理效率化極高,且亦可大幅 減低裝置費用。 Since the film formation process, the first modification process, and the second modification process can be performed in the same chamber as described above, the processing efficiency is extremely high and can be greatly increased. Reduce the cost of the device.

其中,本發明可作各種變形,而非限定於上述實施形態。例如,在上述實施形態中係說明主要使用HfO2膜、HfSiOx膜來作為High-k膜之例,但是並非侷限於此。此外,關於被適用於第1改質處理的自由基處理,亦若熱預算小,則並非侷限於上述實施形態。此外,在上述實施例中係使用矽晶圓(矽基板),但是亦可為其他半導體基板。 However, the present invention can be variously modified and is not limited to the above embodiment. For example, in the above embodiment, an example in which an HfO 2 film or an HfSiOx film is mainly used as a High-k film is described, but the invention is not limited thereto. Further, regarding the radical treatment applied to the first modification treatment, if the thermal budget is small, it is not limited to the above embodiment. Further, in the above embodiment, a germanium wafer (germanium substrate) is used, but other semiconductor substrates may be used.

此外,只要未脫離本發明之範圍,適當組合上述實施形態之構成要素者、或將上述實施形態之構成要素局部去除者亦在本發明之範圍內。 Further, it is also within the scope of the invention to appropriately combine the constituent elements of the above-described embodiments or to partially remove the constituent elements of the above-described embodiments without departing from the scope of the invention.

1、2‧‧‧成膜處理裝置 1, 2‧‧‧ film forming treatment device

3、3-1、3-2、3-2、3-3‧‧‧第1改質處理裝置 3, 3-1, 3-2, 3-2, 3-3‧‧‧ first modification processing device

4、4-1、4-2、4-3、4-4‧‧‧第2改質處理裝置 4, 4-1, 4-2, 4-3, 4-4‧‧‧ second modification processing device

5‧‧‧搬送室 5‧‧‧Transport room

6、7‧‧‧負載鎖定室 6, 7‧‧‧ load lock room

8‧‧‧晶圓搬入搬出室 8‧‧‧Wood loading and unloading room

9、10、11‧‧‧埠 9, 10, 11‧‧‧埠

12、16‧‧‧搬送機構 12.16‧‧‧Transportation agencies

13‧‧‧旋轉/伸縮部 13‧‧‧Rotation/Flexure Department

14a、14b‧‧‧承載片 14a, 14b‧‧‧ carrier sheets

15‧‧‧對準腔室 15‧‧‧Alignment chamber

17‧‧‧手部 17‧‧‧Hands

18‧‧‧軌條 18‧‧‧ rails

20‧‧‧控制部 20‧‧‧Control Department

21‧‧‧使用者介面 21‧‧‧User interface

22‧‧‧記憶部(記憶媒體) 22‧‧‧Memory Department (memory media)

31、61、81、111、121、141、151、161、181、211、241‧‧‧腔室 31, 61, 81, 111, 121, 141, 151, 161, 181, 211, 241‧‧ ‧ chamber

31a‧‧‧天壁 31a‧‧‧天壁

31b‧‧‧圓形孔 31b‧‧‧round hole

32、82、112、142、212、242‧‧‧基座 32, 82, 112, 142, 212, 242 ‧ ‧ pedestals

33、62、122、173、182‧‧‧支持構件 33, 62, 122, 173, 182 ‧ ‧ supporting components

35、114、144、214、244‧‧‧加熱器 35, 114, 144, 214, 244‧‧ heaters

36、115、145、215、245‧‧‧加熱器電源 36, 115, 145, 215, 245‧‧‧ heater power supply

37‧‧‧熱電偶 37‧‧‧ thermocouple

38‧‧‧控制器 38‧‧‧ Controller

39‧‧‧石英襯裡 39‧‧‧Quartz lining

40‧‧‧淋洗頭 40‧‧‧washing head

41‧‧‧第1導入路 41‧‧‧1st introduction road

42‧‧‧第2導入路 42‧‧‧2nd introduction road

43、44‧‧‧空間 43, 44‧‧‧ space

45‧‧‧第1氣體吐出路 45‧‧‧1st gas discharge path

46‧‧‧第2氣體吐出路 46‧‧‧2nd gas discharge path

51‧‧‧排氣室 51‧‧‧Exhaust chamber

52‧‧‧排氣管 52‧‧‧Exhaust pipe

53‧‧‧排氣裝置 53‧‧‧Exhaust device

54‧‧‧搬入搬出口 54‧‧‧ moving into and out

63、123、183‧‧‧旋轉軸 63, 123, 183‧‧‧ rotating shaft

64、124、184‧‧‧旋轉驅動機構 64,124,184‧‧‧Rotary drive mechanism

65、116、125、146、155、165、185、216、246‧‧‧排氣路徑 65, 116, 125, 146, 155, 165, 185, 216, 246‧‧ ‧ exhaust path

66、117、126、147、156、166、186、217、247‧‧‧排氣孔 66, 117, 126, 147, 156, 166, 186, 217, 247‧‧ vents

67、187‧‧‧紫外線燈 67, 187‧‧‧ UV light

68、119、128、148、158、168‧‧‧氣體導入管 68, 119, 128, 148, 158, 168‧‧‧ gas introduction tube

69、120、129、149、159、169‧‧‧氣體供給管 69, 120, 129, 149, 159, 169‧‧‧ gas supply pipe

70、130、200‧‧‧燈室 70, 130, 200‧‧ ‧ lamp room

71、131、201‧‧‧透光板 71, 131, 201‧‧‧ Translucent panels

72、132、202‧‧‧加熱燈 72, 132, 202‧ ‧ heating lamps

73、133、203‧‧‧伸縮囊 73, 133, 203‧‧‧ telescopic bladder

83‧‧‧氣體導入部 83‧‧‧Gas introduction department

84‧‧‧平面天線 84‧‧‧ planar antenna

84a‧‧‧微波透過孔 84a‧‧‧Microwave through hole

85‧‧‧微波發生部 85‧‧‧Microwave Generation Department

86‧‧‧微波傳送機構 86‧‧‧Microwave transmission mechanism

91‧‧‧微波透過板 91‧‧‧Microwave transmission plate

92‧‧‧屏蔽構件 92‧‧‧Shielding members

93‧‧‧排氣管 93‧‧‧Exhaust pipe

100‧‧‧處理系統 100‧‧‧Processing system

101‧‧‧導波管 101‧‧‧guide tube

102‧‧‧同軸導波管 102‧‧‧ coaxial waveguide

103‧‧‧內導體 103‧‧‧ Inner conductor

104‧‧‧外導體 104‧‧‧Outer conductor

105‧‧‧模式變換機構 105‧‧‧Mode change mechanism

106‧‧‧高頻電源 106‧‧‧High frequency power supply

113、143、153、163、213、243‧‧‧支持腳 113, 143, 153, 163, 213, 243 ‧ ‧ support feet

118、218、248‧‧‧微波導入機構 118, 218, 248‧‧‧ microwave induction mechanism

152、162‧‧‧載置台 152, 162‧‧‧ mounting table

157‧‧‧微波照射機構 157‧‧‧Microwave Irradiation Mechanism

170‧‧‧LED單元 170‧‧‧LED unit

171‧‧‧冷卻構件 171‧‧‧Cooling components

172‧‧‧凹部 172‧‧‧ recess

174‧‧‧LED 174‧‧‧LED

175‧‧‧LED陣列 175‧‧‧LED array

176‧‧‧光透過構件 176‧‧‧Light transmission members

177‧‧‧冷卻媒體流路 177‧‧‧ Cooling media flow path

180、210、210’、240‧‧‧處理裝置 180, 210, 210', 240‧‧‧ processing devices

190、230、250‧‧‧氣體導入栓塞 190, 230, 250‧‧‧ gas introduction embolization

191、231、251‧‧‧第1孔 191, 231, 251‧‧‧1 hole

192、232、252‧‧‧第2孔 192, 232, 252‧‧‧ second hole

193、221、233、253‧‧‧第1氣體配管 193, 221, 233, 253 ‧ ‧ 1st gas piping

194、222、234、254‧‧‧第2氣體配管 194, 222, 234, 254‧‧‧ second gas piping

220‧‧‧氣體放出構件 220‧‧‧ gas release member

223‧‧‧導引構件 223‧‧‧Guide members

249‧‧‧微波照射機構 249‧‧‧Microwave Irradiation Mechanism

F‧‧‧FOUP(前開口式通用容器) F‧‧‧FOUP (front open general purpose container)

G‧‧‧閘閥 G‧‧‧ gate valve

W‧‧‧半導體晶圓 W‧‧‧Semiconductor Wafer

圖1係用以說明本發明之基本機制的圖。 Figure 1 is a diagram for explaining the basic mechanism of the present invention.

圖2係顯示本發明之第1實施形態之絕緣膜之形成方法的流程圖。 Fig. 2 is a flow chart showing a method of forming an insulating film according to the first embodiment of the present invention.

圖3係以模式顯示本發明之第1實施形態之各工程之時的膜的狀態圖。 Fig. 3 is a view showing a state of a film at the time of each of the first embodiment of the present invention.

圖4係顯示以31週期的ALD成膜處理成膜2.5nm的HfO2膜時,使實施藉由40sec的微波電漿處理所為之第1改質處理的週期數改變時的界面層的膜厚的圖。 4 is a graph showing the thickness of the interface layer when the number of cycles of the first modification treatment is changed by the microwave plasma treatment for 40 sec when the HfO 2 film having a thickness of 2.5 nm is formed by the ALD film formation process of 31 cycles. Figure.

圖5係顯示15週期成膜後所進行的微波電漿處理時間與界面層的厚度的關係圖。 Fig. 5 is a graph showing the relationship between the microwave plasma treatment time and the thickness of the interface layer after 15 cycles of film formation.

圖6係顯示使作為第1改質處理的微波電漿處理的時 序及長度改變而進行31週期的成膜時之改質處理開始週期數與界面層的膜厚的關係圖。 Figure 6 shows the timing of processing the microwave plasma as the first modification process. A graph showing the relationship between the number of reforming start cycles and the film thickness of the interface layer at the time of film formation of 31 cycles in which the order and the length were changed.

圖7係顯示在以ALD成膜HfO2膜後,進行第1改質處理後的膜厚方向的雜質(碳)的濃度的圖。 FIG. 7 is a view showing the concentration of impurities (carbon) in the film thickness direction after the first modification treatment is performed after the HfO 2 film is formed by ALD.

圖8係求出各種改質處理時之界面層之增膜量及膜厚的關係圖、及以該圓圈所包圍的部分的放大圖。 Fig. 8 is a graph showing the relationship between the amount of film formation and the film thickness of the interface layer at the time of various reforming treatments, and an enlarged view of a portion surrounded by the circle.

圖9A係顯示UV-O的氧化溫度與界面層的厚度的關係圖。 Fig. 9A is a graph showing the relationship between the oxidation temperature of UV-O and the thickness of the interface layer.

圖9B係將室溫下的UV-O的各種條件中的界面層的厚度,與設為450℃、0.10Torr的標準條件下的處理的情形相比較的圖。 Fig. 9B is a graph comparing the thickness of the interface layer in various conditions of UV-O at room temperature with the case of treatment under standard conditions of 450 ° C and 0.10 Torr.

圖10係顯示各處理時的Hf的4f的結合能量的變化,顯示膜的安定性者。 Fig. 10 is a graph showing changes in the binding energy of 4f of Hf at the time of each treatment, and showing the stability of the film.

圖11A係顯示膜厚2.5nm的HfO2膜的as depo狀態的X線光電子分光(XPS)頻譜的圖。 Fig. 11A is a view showing an X-ray photoelectron spectroscopy (XPS) spectrum of an as depo state of an HfO 2 film having a film thickness of 2.5 nm.

圖11B係顯示膜厚2.5nm的HfO2膜以900℃進行尖波退火時的X線光電子分光(XPS)頻譜的圖。 Fig. 11B is a view showing the X-ray photoelectron spectroscopy (XPS) spectrum when the HfO 2 film having a film thickness of 2.5 nm is subjected to sharp-wave annealing at 900 °C.

圖11C係顯示膜厚2.5nm的HfO2膜以900℃進行10min的退火時的X線光電子分光(XPS)頻譜的圖。 Fig. 11C is a view showing an X-ray photoelectron spectroscopy (XPS) spectrum when an HfO 2 film having a film thickness of 2.5 nm is annealed at 900 ° C for 10 minutes.

圖12A係顯示膜厚4.0nm的HfO2膜的as depo狀態的XPS頻譜的圖。 Fig. 12A is a view showing an XPS spectrum of an as depo state of an HfO 2 film having a film thickness of 4.0 nm.

圖12B係顯示將膜厚4.0nm的HfO2膜的MIT以600W進行30min時的XPS頻譜的圖。 Fig. 12B is a graph showing the XPS spectrum when the MIT of the HfO 2 film having a film thickness of 4.0 nm was performed at 600 W for 30 min.

圖13係顯示膜厚2.5nm的HfO2膜的as depo狀態、 及以600℃進行尖波退火者、及將MIT以2000W進行30min時的XPS頻譜的圖。 Fig. 13 is a view showing an as depo state of an HfO 2 film having a film thickness of 2.5 nm, a sharp wave annealing at 600 ° C, and an XPS spectrum when MIT is performed at 2000 W for 30 min.

圖14係顯示第1實施形態中的電氣特性圖。 Fig. 14 is a view showing electrical characteristics in the first embodiment.

圖15係顯示本發明之第2實施形態之絕緣膜之形成方法的流程圖。 Fig. 15 is a flow chart showing a method of forming an insulating film according to a second embodiment of the present invention.

圖16係顯示針對以250℃所成膜的HfO2膜、與以310℃所成膜的HfO2膜,在以900℃進行尖波退火後的in-plane XRD的結果的圖。 FIG. 16 for display system 250 ℃ HfO 2 film at the film formation, the HfO 2 film and the film formation at 310 deg.] C, results in FIG. In-plane XRD performed after annealing at 900 ℃ spike of.

圖17係顯示本發明之第3實施形態之絕緣膜之形成方法的流程圖。 Fig. 17 is a flow chart showing a method of forming an insulating film according to a third embodiment of the present invention.

圖18係顯示第3實施形態中的電氣特性圖。 Fig. 18 is a view showing electrical characteristics in the third embodiment.

圖19係顯示本發明之第4實施形態之絕緣膜之形成方法的流程圖。 Fig. 19 is a flow chart showing a method of forming an insulating film according to a fourth embodiment of the present invention.

圖20係顯示用以實現第1實施形態之處理系統之例圖。 Fig. 20 is a view showing an example of a processing system for realizing the first embodiment.

圖21係顯示成膜裝置之一例的剖面圖。 Fig. 21 is a cross-sectional view showing an example of a film forming apparatus.

圖22係顯示第1改質處理裝置之第1例的剖面圖。 Fig. 22 is a cross-sectional view showing a first example of the first modification processing device.

圖23係顯示第1改質處理裝置之第2例的剖面圖。 Fig. 23 is a cross-sectional view showing a second example of the first modification processing device.

圖24係顯示第1改質處理裝置之第3例的剖面圖。 Fig. 24 is a cross-sectional view showing a third example of the first modification processing device.

圖25係顯示第1改質處理裝置之第3例所使用之微波導入機構的配置狀態圖。 Fig. 25 is a view showing an arrangement state of a microwave introduction mechanism used in a third example of the first modification processing device.

圖26係顯示第2改質處理裝置之第1例的剖面圖。 Fig. 26 is a cross-sectional view showing a first example of the second modification processing device.

圖27係顯示第2改質處理裝置之第2例的剖面圖。 Fig. 27 is a cross-sectional view showing a second example of the second modification processing device.

圖28係顯示第2改質處理裝置之第3例的剖面圖。 Fig. 28 is a cross-sectional view showing a third example of the second modification processing device.

圖29係顯示第2改質處理裝置之第4例的剖面圖。 Fig. 29 is a cross-sectional view showing a fourth example of the second modification processing device.

圖30係顯示可在相同腔室進行成膜處理與第1改質處理之裝置之例1的剖面圖。 Fig. 30 is a cross-sectional view showing an example 1 of an apparatus which can perform a film forming process and a first modification process in the same chamber.

圖31係顯示可在相同腔室進行成膜處理與第1改質處理之裝置之例2的剖面圖。 Fig. 31 is a cross-sectional view showing an example 2 of an apparatus which can perform a film forming process and a first modification process in the same chamber.

圖32係顯示可在相同腔室進行成膜處理與第1改質處理之裝置之例3的剖面圖。 Fig. 32 is a cross-sectional view showing an example 3 of a device which can perform a film forming process and a first modification process in the same chamber.

圖33係顯示可在相同腔室進行成膜處理與第1改質處理與第2改質處理之裝置之例的剖面圖。 Fig. 33 is a cross-sectional view showing an example of an apparatus which can perform a film forming process, a first modification process, and a second modification process in the same chamber.

圖34係顯示圖33的裝置的微波導入機構與微波照射機構的配置狀態圖。 Fig. 34 is a view showing an arrangement state of a microwave introducing mechanism and a microwave irradiation mechanism of the apparatus of Fig. 33;

Claims (37)

一種閘極絕緣膜之形成方法,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成方法,其具有:成膜工程,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;第1改質工程,其係以低於成膜溫度的溫度,對前述所成膜的高介電係數膜施行自由基處理來進行改質;及第2改質工程,其係對在前述第1改質工程中所成膜的前述高介電係數膜施行熱處理而結晶化。 A method for forming a gate insulating film, which is a method for forming a gate insulating film for forming a gate insulating film on a semiconductor substrate, comprising: a film forming process for forming a film on a semiconductor substrate by CVD or ALD a high dielectric constant film; a first modification project in which a high dielectric constant film formed by the film formation is subjected to radical treatment at a temperature lower than a film formation temperature; and a second modification project, The high dielectric constant film formed in the first modification process is subjected to heat treatment to be crystallized. 如申請專利範圍第1項之閘極絕緣膜之形成方法,其中,前述高介電係數膜係Hf系氧化物材料膜。 The method for forming a gate insulating film according to the first aspect of the invention, wherein the high dielectric constant film is a film of an Hf-based oxide material. 如申請專利範圍第2項之閘極絕緣膜之形成方法,其中,前述高介電係數膜係氧化鉿膜或鉿矽酸鹽膜。 The method for forming a gate insulating film according to the second aspect of the invention, wherein the high dielectric constant film is a hafnium oxide film or a niobate film. 如申請專利範圍第1項之閘極絕緣膜之形成方法,其中,前述第1改質工程係藉由紫外線激發自由基氧化處理來進行。 The method for forming a gate insulating film according to the first aspect of the invention, wherein the first modification process is performed by ultraviolet excitation radical oxidation treatment. 如申請專利範圍第1項之閘極絕緣膜之形成方法,其中,前述第1改質工程係藉由微波電漿處理來進行。 The method for forming a gate insulating film according to claim 1, wherein the first modification process is performed by microwave plasma treatment. 如申請專利範圍第5項之閘極絕緣膜之形成方法,其中,前述微波電漿處理係使用作為處理氣體之含氧氣體、或稀有氣體、或氮氣、或將該等之2以上加以混合的混合氣體來進行。 The method for forming a gate insulating film according to the fifth aspect of the invention, wherein the microwave plasma treatment uses an oxygen-containing gas as a processing gas, or a rare gas, or nitrogen, or a mixture of two or more thereof. Mixing gas is carried out. 如申請專利範圍第5項之閘極絕緣膜之形成方法,其中,前述微波電漿處理係藉由將微波使用具有槽孔的平 面天線而對處理容器內導入微波,藉由該微波來激發電漿氣體來進行。 The method for forming a gate insulating film according to claim 5, wherein the microwave plasma processing is performed by using microwaves with slots The microwave is introduced into the processing container by the surface antenna, and the plasma gas is excited by the microwave. 如申請專利範圍第5項之閘極絕緣膜之形成方法,其中,前述微波電漿處理係藉由設有複數微波導入機構,其係具有:導引微波的導波管、照射微波且形成有槽孔的平面天線、及與前述平面天線近接而設且使阻抗整合的芯塊調諧器,由該等複數微波導入機構放射微波而將處理氣體電漿化來進行。 The method for forming a gate insulating film according to the fifth aspect of the invention, wherein the microwave plasma processing system comprises: a microwave guiding mechanism for guiding microwaves, irradiating microwaves, and forming The planar antenna of the slot and the pellet tuner provided in proximity to the planar antenna and integrating the impedance are performed by the plurality of microwave introducing mechanisms radiating microwaves and plasma-treating the processing gas. 如申請專利範圍第1項之閘極絕緣膜之形成方法,其中,前述第2改質工程係藉由利用燈加熱所為之急速加熱處理來進行。 The method for forming a gate insulating film according to claim 1, wherein the second modification process is performed by rapid heating treatment by heating with a lamp. 如申請專利範圍第1項之閘極絕緣膜之形成方法,其中,前述第2改質工程係藉由以700℃以下的溫度的退火來進行。 The method of forming a gate insulating film according to the first aspect of the invention, wherein the second modification process is performed by annealing at a temperature of 700 ° C or lower. 如申請專利範圍第1項之閘極絕緣膜之形成方法,其中,前述第2改質工程係藉由利用微波照射所致之加熱來進行。 The method for forming a gate insulating film according to claim 1, wherein the second modification process is performed by heating by microwave irradiation. 如申請專利範圍第1項之閘極絕緣膜之形成方法,其中,前述第2改質工程係藉由利用發光二極體所致之加熱來進行。 The method of forming a gate insulating film according to the first aspect of the invention, wherein the second modification process is performed by heating by using a light-emitting diode. 如申請專利範圍第1項之閘極絕緣膜之形成方法,其中,前述成膜工程與前述第1改質工程係反覆進行。 The method of forming a gate insulating film according to the first aspect of the invention, wherein the film forming process and the first modification engineering are repeated. 如申請專利範圍第13項之閘極絕緣膜之形成方 法,其中,最初的成膜工程時所成膜的高介電係數膜的厚度為1.05nm以上。 Such as the formation of the gate insulating film of claim 13 In the method, the thickness of the high dielectric constant film formed during the initial film formation process is 1.05 nm or more. 如申請專利範圍第14項之閘極絕緣膜之形成方法,其中,最初的成膜工程時所成膜的高介電係數膜的厚度為1.21nm以下。 The method for forming a gate insulating film according to claim 14, wherein the thickness of the high dielectric constant film formed in the first film forming process is 1.21 nm or less. 如申請專利範圍第13項之閘極絕緣膜之形成方法,其中,前述成膜工程與前述第1改質工程係在同一腔室內進行。 The method for forming a gate insulating film according to claim 13, wherein the film forming process and the first modification engineering are performed in the same chamber. 一種閘極絕緣膜之形成方法,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成方法,其具有:成膜工程,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;第1改質工程,其係以低於結晶化溫度的溫度,對前述所成膜的高介電係數膜施行自由基處理來進行改質,而得非晶質狀態的膜;及第2改質工程,其係對前述第1改質工程後的前述高介電係數膜,藉由熱處理進行急速升降溫處理來進行結晶控制。 A method for forming a gate insulating film, which is a method for forming a gate insulating film for forming a gate insulating film on a semiconductor substrate, comprising: a film forming process for forming a film on a semiconductor substrate by CVD or ALD a high dielectric constant film; a first modification process in which a high dielectric constant film formed by the film formation is subjected to radical treatment at a temperature lower than a crystallization temperature to be modified, and an amorphous state is obtained. And a second modification process for performing crystallization control by rapidly increasing and lowering the high dielectric constant film after the first modification process by heat treatment. 如申請專利範圍第17項之閘極絕緣膜之形成方法,其中,前述成膜工程係以所形成的高介電係數膜成為非晶質狀態的溫度來進行。 The method for forming a gate insulating film according to claim 17, wherein the film forming process is performed at a temperature at which the formed high dielectric constant film is in an amorphous state. 如申請專利範圍第17項之閘極絕緣膜之形成方法,其中,前述第1改質工程係對前述高介電係數膜打入離子而進行非晶質化。 The method for forming a gate insulating film according to the seventeenth aspect of the invention, wherein the first modified engineering system is characterized in that ions are implanted into the high dielectric constant film to be amorphous. 如申請專利範圍第17項之閘極絕緣膜之形成方法,其中,前述第2改質工程係在450℃以上進行。 The method for forming a gate insulating film according to claim 17, wherein the second modification process is performed at 450 ° C or higher. 如申請專利範圍第17項之閘極絕緣膜之形成方法,其中,前述第2改質工程係藉由利用微波照射所為之加熱來進行。 The method for forming a gate insulating film according to claim 17, wherein the second modification process is performed by heating by microwave irradiation. 如申請專利範圍第17項之閘極絕緣膜之形成方法,其中,前述高介電係數膜為HfO2膜。 The method for forming a gate insulating film according to claim 17, wherein the high dielectric constant film is an HfO 2 film. 如申請專利範圍第22項之閘極絕緣膜之形成方法,其中,使Si、Zr、Y、Ce、Sr及N的至少一種導入至HfO2膜。 A method of forming a gate insulating film according to claim 22, wherein at least one of Si, Zr, Y, Ce, Sr, and N is introduced into the HfO 2 film. 如申請專利範圍第22項之閘極絕緣膜之形成方法,其中,使Ti或Ba導入至HfO2膜。 A method of forming a gate insulating film according to claim 22, wherein Ti or Ba is introduced into the HfO 2 film. 一種閘極絕緣膜之形成方法,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成方法,其具有:成膜工程,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;及改質工程,其係對前述高介電係數膜照射微波,藉由微波加熱來將前述高介電係數膜進行改質。 A method for forming a gate insulating film, which is a method for forming a gate insulating film for forming a gate insulating film on a semiconductor substrate, comprising: a film forming process for forming a film on a semiconductor substrate by CVD or ALD a high dielectric constant film; and a upgrading process, wherein the high dielectric constant film is irradiated with microwaves, and the high dielectric constant film is modified by microwave heating. 一種閘極絕緣膜之形成方法,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成方法,其具有:成膜工程,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;及改質工程,其係藉由將前述高介電係數膜以發光二極體進行加熱來將高介電係數膜進行改質。 A method for forming a gate insulating film, which is a method for forming a gate insulating film for forming a gate insulating film on a semiconductor substrate, comprising: a film forming process for forming a film on a semiconductor substrate by CVD or ALD a high dielectric constant film; and a modification process for modifying a high dielectric constant film by heating the high dielectric constant film with a light emitting diode. 一種閘極絕緣膜之形成裝置,其係在半導體基板上形成閘極絕緣膜之閘極絕緣膜之形成裝置,其具有:成膜裝置,其係藉由CVD或ALD,在半導體基板上成膜高介電係數膜;第1改質處理裝置,其係以低於成膜溫度的溫度,對前述所成膜的高介電係數膜施行自由基處理來進行改質;第2改質處理裝置,其係對藉由前述第1改質處理裝置來進行第1改質處理後的高介電係數膜施行熱處理而結晶化;及控制部,其係以在前述成膜裝置的成膜處理、在前述第1改質處理裝置的第1改質處理、及在前述第2改質處理裝置的第2改質處理以該順序進行的方式來進行控制。 A device for forming a gate insulating film, which is a device for forming a gate insulating film of a gate insulating film on a semiconductor substrate, comprising: a film forming device which forms a film on a semiconductor substrate by CVD or ALD a high dielectric constant film; the first modified processing device performs a radical treatment on the formed high dielectric constant film at a temperature lower than a film forming temperature; and the second modified processing device The crystallization is performed by performing heat treatment on the high dielectric constant film after the first modification treatment by the first modification processing device, and the control unit is formed by the film formation process of the film formation apparatus. The first modification process of the first modification processing device and the second modification process of the second modification processing device are performed in this order. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述第1改質處理裝置係具有:收容被處理基板的處理容器;對處理容器內供給含氧氣體的氣體供給機構;及對前述處理容器內供給紫外線的紫外線供給源。 The device for forming a gate insulating film according to claim 27, wherein the first modifying device includes a processing container that houses the substrate to be processed, and a gas supply mechanism that supplies an oxygen-containing gas to the processing container; An ultraviolet light supply source that supplies ultraviolet rays to the processing container. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述第1改質處理裝置係將微波使用具有槽孔的平面天線對處理容器內導入微波,藉由該微波來激發電漿氣體者。 The device for forming a gate insulating film according to claim 27, wherein the first modification processing device introduces a microwave into a processing container by using a planar antenna having a slot, and excites the plasma by the microwave. Gas. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述第1改質處理裝置係具有複數微波導入機構,其係具有:導引微波的導波管、照射微波且形成有槽孔的平面天線、及與前述平面天線近接而設且使阻抗整合 的芯塊調諧器,由該等複數微波導入機構放射微波而將處理氣體電漿化來進行第1改質處理。 The apparatus for forming a gate insulating film according to claim 27, wherein the first modifying processing device has a plurality of microwave introducing means having a waveguide for guiding microwaves, irradiating microwaves, and forming a groove. The planar antenna of the hole and the proximity of the planar antenna and the impedance integration In the pellet tuner, the plurality of microwave introducing means radiates microwaves to plasma the processing gas to perform the first modification process. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述第2改質處理裝置係具有:收容被處理基板的處理容器;及將處理容器內的基板急速加熱的加熱燈。 The device for forming a gate insulating film according to claim 27, wherein the second modifying device includes a processing container that houses the substrate to be processed, and a heating lamp that rapidly heats the substrate in the processing container. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述第2改質處理裝置係具有:收容被處理基板的處理容器;將被處理基板加熱的電阻加熱器;及將加熱溫度控制在700℃以下的控制機構。 The device for forming a gate insulating film according to claim 27, wherein the second modifying device includes: a processing container that houses the substrate to be processed; a resistance heater that heats the substrate to be processed; and a heating temperature Control the control mechanism below 700 °C. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述第2改質處理裝置係具有:收容被處理基板的處理容器;及對半導體基板照射微波的微波照射機構。 The device for forming a gate insulating film according to claim 27, wherein the second modifying device includes a processing container that houses the substrate to be processed, and a microwave irradiation mechanism that irradiates the semiconductor substrate with microwaves. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述第2改質處理裝置係具有:收容半導體基板的處理容器;及將半導體基板加熱的複數發光二極體。 The device for forming a gate insulating film according to claim 27, wherein the second modifying device includes a processing container that houses the semiconductor substrate, and a plurality of light emitting diodes that heat the semiconductor substrate. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述成膜裝置、前述第1改質處理裝置、前述第2改質處理裝置係被組入在具備有在真空中搬送半導體基板的搬送裝置的多腔室系統。 The apparatus for forming a gate insulating film according to claim 27, wherein the film forming apparatus, the first modifying processing apparatus, and the second modifying processing apparatus are incorporated in a vacuum to carry the semiconductor A multi-chamber system for a substrate transfer device. 如申請專利範圍第27項之閘極絕緣膜之形成裝置,其中,前述成膜裝置與前述第1處理裝置係被設在共通的處理容器內。 The apparatus for forming a gate insulating film according to claim 27, wherein the film forming apparatus and the first processing apparatus are provided in a common processing container. 一種閘極絕緣膜之形成裝置,其係具有:處理容器,其係收容半導體基板;氣體供給機構,其係用以對前述處理容器內供給供成膜高介電係數膜之用的成膜氣體;複數微波導入機構,其係具有:導引微波的導波管、照射微波且形成有槽孔的平面天線、及與前述平面天線近接而設且使阻抗整合的芯塊調諧器,且對前述處理容器內導入微波;及微波照射機構,其係對半導體基板照射微波,在前述處理容器內進行:高介電係數膜的成膜;利用藉由由前述微波導入機構所被導入的微波所生成的微波電漿所為之第1改質處理;及藉由前述微波照射機構來進行微波加熱的第2改質處理。 A device for forming a gate insulating film, comprising: a processing container for accommodating a semiconductor substrate; and a gas supply mechanism for supplying a film forming gas for forming a film of a high dielectric constant film into the processing container a plurality of microwave introduction mechanisms having: a waveguide for guiding microwaves, a planar antenna for irradiating microwaves and having slots, and a pellet tuner for abutting the planar antenna and integrating impedance, and a microwave introduced into the processing container; and a microwave irradiation mechanism that irradiates the semiconductor substrate with microwaves, and performs film formation of the high dielectric constant film in the processing container; and is generated by microwaves introduced by the microwave introducing mechanism The first modification process is performed by the microwave plasma; and the second modification process of performing microwave heating by the microwave irradiation means.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105102675A (en) * 2013-04-07 2015-11-25 村川惠美 Rotating semi-batch ALD device and process

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5934665B2 (en) 2013-02-22 2016-06-15 東京エレクトロン株式会社 Film forming method, program, computer storage medium, and film forming system
JP6149139B2 (en) * 2016-05-09 2017-06-14 東京エレクトロン株式会社 Film forming method, program, computer storage medium, and film forming system
KR102563298B1 (en) * 2021-01-18 2023-08-03 주식회사 유진테크 Method for removing impurities in thin film and substrate processing apparatus

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004006699A (en) * 2002-04-25 2004-01-08 Hitachi Kokusai Electric Inc Manufacturing method for semiconductor device, and substrate processing apparatus
JP4007864B2 (en) * 2002-06-21 2007-11-14 富士通株式会社 Manufacturing method of semiconductor device
JP4712292B2 (en) * 2003-09-02 2011-06-29 財団法人国際科学振興財団 Semiconductor device and manufacturing method thereof
JP2005166710A (en) * 2003-11-28 2005-06-23 Matsushita Electric Ind Co Ltd Method for forming thin-film
JP2006040945A (en) * 2004-07-22 2006-02-09 Tokyo Electron Ltd Processor and processing method of high dielectric constant film
JP2007258286A (en) * 2006-03-22 2007-10-04 Tokyo Electron Ltd Heat treatment apparatus and method, and storage medium
JP5286565B2 (en) * 2007-06-15 2013-09-11 株式会社日立国際電気 Semiconductor device manufacturing method, substrate processing method, and substrate processing apparatus
JP2009076747A (en) * 2007-09-21 2009-04-09 Fujitsu Microelectronics Ltd Manufacturing method of semiconductor device
KR101248651B1 (en) * 2008-02-08 2013-03-28 도쿄엘렉트론가부시키가이샤 Method for insulating film formation, storage medium from which information is readable with computer, and treatment system
JP2010170974A (en) * 2008-12-22 2010-08-05 Tokyo Electron Ltd Plasma source and plasma treatment device
US20110081137A1 (en) * 2009-10-06 2011-04-07 Advantest Corporation Manufacturing equipment and manufacturing method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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US10480073B2 (en) 2013-04-07 2019-11-19 Shigemi Murakawa Rotating semi-batch ALD device

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