201208226 六、發明說明： 【發明所屬之技術領域】 參考相關申請案 本專利申請案請求美國臨時專利申請案61/185,264 ’申 凊曰2009年6月9日及名稱「具有每一面板最大電力點追蹤 之太陽能陣列反相器」之優先權。 發明領域 本發明係有關於用以自能轉換電路獲取電力之電路及 方法，及更明確言之，係有關於用以從串聯耦合直流電源 獲取最大電力之此等電路及方法。 發明背景 如技藝界眾所周知，基於中心反相器之能量轉換設施 使用串聯的成組DC電源，偶爾稱作為串（stHngs)。實例包 括生質電池、化學電池、燃料電池及能量儲存電池組。但 長串的電源具有特有缺陷。舉例言之，以太陽能面板為例， 若面板被遮蔽或擋住，則產生較少光電流。面板電流也可 能因其它因素而不平衡。由於呈串聯串的太陽能面板係限 於全部皆傳導相等電流，最弱者將限制從其餘太陽能面板獲 取的電力，因而減低陣列的總效率。同理，成串的太陽能面 板必須給定相同取向且具有相同類型及大小。但因審美理由 或其它建築學理由故，並非經常可能如此或期望如此。 另一項眾所周知的解決之道是微反相器。微反相器轉 換來自單一太陽能面板的太陽能用以饋至商業交流電(AC) 201208226 電網。雖然MPPT係基於每一面板的基準進行，因而最大化 能量的獲取，但微反相器設施的成本效益低，原因在於每 瓦成本較尚，及電力轉換效率較低故。 【發明内容】 發明概要 依據本請求專利發明’提出一種用以最大化得自彼此 串聯麵合多個直流電源的電力及提供不等DC電流之電路 及方法。與不等DC電流間之差有關的電流係從串聯耦合電 源轉向，捕捉為磁場能，及然後加至由該串聯耦合電源所 提供的DC電流。 依據本請求專利發明之一個實施例，電流平衡電路包括： 第一、第二及第三電極其係用以耦接第一及第二串聯 耦合直流電源來 透過該第一及第三電極而接收分別由該第一及第二直 流電源所產生之第一及第二直流電壓之和，及由該第一及 第二直流電源所產生之—共用直流電流，及 透過該第二電極而接收實質上等於分別由該第一及第 二直流電源所產生之第—與第二直流電流間之差的一差分 直流電流， 耦接至該第一、第二及第三電極之電容電路； 耦接在該第一與第三電極間之切換電路； 耦接在該第二電極與該切換電㈣之電感電路；及 麵接至該第-、第二及第三電極及該切換電路之控制 電路，其中 201208226 該控制電路係藉提供多個控制信號而回應於該第一及 第二直流電壓及該第一及第二直流電流，及 該切換電路係藉在一第一時間區間期間提供在該電感 電路與該第一電極間之一第一直流電流路徑，及在一第二 時間區間期間提供在該電感電路與該第三電極間之一第二 直流電流路徑而回應於該等多個控制信號。 依據本請求專利發明之另一個實施例，一種最大化得 自多個DC電源之電力方法包括： 透過該第一及第三電極而接收分別由該第一及第二直 流電源所產生之第一及第二直流電壓之和，及由該第一及 第二直流電源所產生之一共用直流電流； 透過該第二電極而接收實質上等於分別由該第一及第 二直流電源所產生之第一與第二直流電流間之差的一差分 直流電流； 電容式耦合該第一、第二及第三電極；及 感測該第一及第二直流電壓及該第一及第二直流電 流，及據此而 針對該差分直流電流，於該第一時間區間期間提供在 該第二與第一電極間之一第一電感直流電流路徑，及 針對該差分直流電流，於該第二時間區間期間提供在 該第二與第三電極間之一第二電感直流電流路徑。 圖式簡單說明 第1圖為依據一個實施例，一種電力平衡器之示意圖。 第2圖顯示第1圖之電力平衡器之操作。 201208226 第3圖為針對用於第1圖之電力平衡器的切換控制信號 之信號時序圖實例。 第4圖為針對典型太陽能面板之電流_電壓及功率-電壓 特性曲線之全圖及放大圖》 第5圖為依據另一個實施例，具有多個串聯電力平衡器 之電力平衡器模組具體實施之示意圖。 第5a圖為依據另一個實施例，具有多個串聯電力平衡 器之電力平衡器模組具體實施之示意圖。 第5b圖為第5a圖之控制單元之具體實施例之方塊圖。 第5c圖為於第5b圖之控制單元執行之方法之具體實施 例之流程圖。 第6圖為依據另一個實施例，耦接來提供Dc電流欲藉 DC/AC轉換器而轉換成AC電流之四個電力平衡器模組之 方塊圖。 第6a圖為依據另一個實施例，分散式反相器系統架構 之方塊圖。 第7圖為依據另一個實施例’針對三相電網之dc/ac轉 換器之示意圖。 第乃圖為依據另一個實施例，針對單相電網之DC/AC 轉換器之示意圖。 C實施冷式】 較佳實施例之詳細說明 後文詳細說明部分係有關本請求專利發明之具體實施 例參考附圖之梅述。此種描述意圖為例示說明性而非限制 6 201208226 本發明之範圍。此等實施例係以充分細節描述來使得熟諳 相關技藝人士實施本發明，須瞭解未恃離本發明之精髓及 範圍可以若干變化實施其它實施例。 本文全文揭示中，若未對上下文有明白相反指示，則 須瞭解如所述的個別電路元件之數目可以是單數或複數。 舉例言之’「電路」及「環路」可包括單一組件或多個組件， 其為作用狀態及/或不作用狀態且係連結或以其它方式耗 接在一起（例如呈一或多個積體電路晶片）來提供所述功 能。此外，若無其它明白相反指示’則「信號」一詞可指 稱一或多個電流、一或多個電壓、或資料信號。又復，雖 然已經使用離散式電子電路（較佳係呈一或多個積體電路 晶片形式）以具體實施脈絡討論本發明，但此種電路之任_ 部分的功能另外可使用一或多個適當地規劃的處理器具體 實施，取決於欲處理的信號頻率或資料率。此外，雖然附 圖例示說明各個實施例之功能方塊的略圖，但功能方塊並 非必然係指硬體電路間的劃分。如此，舉例言之，功能方 塊中之一或多者(例如處理器、記憶體等）可在單塊硬體具體 實施(例如通用信號處理器、隨機存取記憶體、硬碟機等）。 同理，所述之任何程式可以是孤立程式，可以結合於作業 系統(os)作為次常式，可以是所安裝的套裝軟體功能等。 谷後洋述’本請求專利發明最大化自串聯耦合DC電源 的電力獲取。作為呈現應时例之手段，後文討論係基於 下述實例，將太陽能轉換成AC電流，欲饋進商用電網，具 有車又问轉換效率及轉換之成本效益。較高的能源獲取係針 201208226 對各太陽能面板使用MPPT而達成。基於公開統計資料，此 種每模組MPPT促成針對典型太陽能設施的5 %至2 5 %能量 獲取增益。太陽能設施的維護可從連續監測各個光伏模組 的效能而額外獲益。額外優點為屋頂上不存在有高直流電 壓導線。 參考第1圖’本請求專利發明之重要特徵結構為電力平 衡器。如針對具體實施倒顯示，兩片太陽能面板PV1 1〇〇、 PV2 1〇1係串聯。若其具有相同特性，則Μρρτ轉換器將找 到兩片面板遞送最大電力的一點。若兩片的特性不相同， 則較弱的面板將限制從較強面板所獲取的電力。舉例言 之，若有一片面板PV1被遮蔽而產生比另一片面板PV2少1 安培的電流，電力平衡器允許MPPT轉換器例如藉補償兩片 面板間的不匹配而從兩片面板獲取較大電力。 依據一個實施例，電力平衡器包括電容器C1 102、C2 103、一電感器L1 104、開關SW1 105、SW2 106(例如金氧 半導體場效電晶體(MOSFET))、及一控制單元1〇7如圖所示 實質上互連。若開關105、106係以50%工作週期操作，與 面板PV卜PV2所產生的電流獨立無關地，電力平衡器將在 面板PV1、PV2上維持實質上相等電壓。 假設面板PV1產生電流1|及面板PV2產生電流 I2=Ii+Idelta。若未使用電力平衡器’則MPPT轉換器將接收 總電流I,，而Idelta不被回收或獲取。電力平衡器的目的係從 面板PV2獲取此一額外電流Ideha ’及將其相關聯之額外電力 傳遞給MPPT。 8 201208226 參考第2圖，電力平衡器之操作可與傳統升壓轉換器之 操作做比較。在開關SW2 200為閉路期間，開關SW1 203係 開路，電流差Irlfldeita係透過PATH1 202傳導，能量累積在 電感器L1 201的磁場。在開關swi 203為閉路期間，開關 SW2 200係開路，電流係透過PATH2 205傳導，先前儲存在 電感器L1 201的能量係作為額外電流(具有有關太陽能面板 PV1、PV2之差分電流Iddta之平均幅值，及理想地係等 於*匕’2 /(Kn +心2 PP))而遞送給MPPT轉換器204。如此 電力平衡器只轉換能206之不平衡部分，而不影響與電流工j 相關聯之能的平衡部分，其係直接送至MppT轉換器2〇4。 據此，於電力平衡器内的能轉換效率係與能2〇6的不平衡部 分之幅值實質上成正比。電容器C1 204、C2 203之電容值 不具關鍵重要性，反而應基於下述標準擇定，標準包括開 關SW1 105、SW2 106之切換頻率、及最大容許面板不匹 配。又，電容值應夠高來確保橫跨其間的電壓漣波不會導 致檢過太1%能面板PV1、PV2的電壓過度偏離面板PV1、PV2 之最大電力點(MPP)電壓。如此將維持接近從太陽能面板所 獲取之最大能。針對典型結晶矽太陽能面板，若電壓漣波係 在面板MPP電壓之約5%(峰至峰），則將達成獲取99 5%能。 參考第4圖，藉由針對各面板個別地最佳化電壓，可獲 得電力獲取之進一步改良。線圖4〇〇顯示針對典型太陽能面 板的電流-電壓及功率-電壓特性曲線。舉例言之，「pv 1 ι_ν 曲線」相對應於面板PV1 100其係被遮蔽，而rpV2 曲 線」相對應於面板PV2 101其係未被遮蔽。放大線圖4〇1顯 201208226 示面板PV2之最大電力係達到比較面板PV1之略較高電 壓，例如分別地為6(//^ 402及403。此種最大化係 基於電壓乂, 108、V2 109及電流I〗110、111之測量值，而 藉在控制單元1〇7(第1圖）之二次（例如較慢的）最佳化迴路 進行（容後詳述）。 參考第3圖，控制單元107設定用以開及關開關SW1、 SW2之控制信號的工作週期如下：7；/：r2=k2_/Km_，此處 及分別為面板PV1及PV2的最佳電壓，及卩及 T2分別為控制信號SW, 300SW2 301之脈寬。 參考第5圖’依據另一個實施例，類似技術可應用來最 大化從多於兩塊太陽能面板獲取的電力，例如於具有四個 串聯太陽能面板PV1 500、PV2 501、PV3 502、PV4 503的 多平衡器電力獲取最大化器模組具體實施例。三個電力平 衡器係用來平衡四塊面板’排列成平衡的兩對。各對面 PV1+PV2、PV3+PV4之電力平衡係如前述操作。第三電力 平衡器平衡兩對太陽能面板PV1+PV2、PV3+PV4。結果， 全部四片獲得平衡，及提供MPPT轉換器504的電力。MPPT 轉換器504包括電感器L4 505、開關SW7 506(例如 MOSFET)、二極體D1 507及電容器C5 508實質上如圖所示 互連’其係操作為有效升壓轉換器。 控制單元509具體實施四個最佳化迴路。藉由控制 MPPT轉換器5〇4之開關SW7 5〇6之工作週期，最快速迴路 追縱全部四#平衡面板的猜。兩個贿的最佳化迴路(較 佳為相同）最佳化在成社陽能面㈣部的侧太陽能面 10 201208226 板。成對太陽能面板PV1+PV2係藉其開關swi 5i〇、州 511的切換作週期控制，域對太陽能面板閉係藉 其開關SW3 512、SW4 513的切換工作週期控制。最慢的最 佳化迴路係經由控制其f„SW55u、SW65i5之切換工作 週期而成組平衡太陽能面板對PV1+PV2、PV3+PV4。 參考第5a圖，依據另一個實施例，針對多個太陽能面 板之電力平衡器可對奇數太陽能面板具體實施。舉例言 之’五片太陽能面板可藉四個電力平衡H電路排列成將最 高電壓降至任何單-電力平衡器之方式而何衡。於此具 體實施例巾’單-電力平衡器電路制來平衡在串聯太陽 能面板(如前文討論）中之各個冑氣上相鄰對，此處各成對太 陽能面板係如圖所示藉交插電力平衡器電路加以平衡。交 插電力平衡H之操作使得在全部串_太陽能面板間維持 最佳化電壓比。第一電力平衡器502a包括兩個開關sw^ SW2 ’及維持在其相關聯之太陽能面板pvi、pV2上的電壓 比實質上係等於開關SW1、SW2狀態之工作週期的反比。 同理，第二電力平衡器5〇4a針對在連鎖中的全部面板界定 其相關聯之太陽能面板PV2、PV3等上的電壓比。如此五片 太陽能面板PV1、PV2、PV3、PV4、PV5具有其個別的電 壓比係由四個電力平衡器電路502a、504a、5〇5a、5〇6a界 定，及如前文討論提供電力給MPPT轉換器5〇7a。於本具體 實施例之一般情況下，N個串聯太陽能面板可藉個電力 平衡器電路平衡。 參考第5b圖，依據一個實施例，第】、5及化圖之控制 201208226 單元107、509a、508a可實質上如圖所示具體實施。太陽能 面板電壓及電流之電壓及電流感測係使用變壓器501b、 502b、503b ' 504b執行，提供用以藉類比至數位轉換器 (ADC)505b轉換而與太陽能面板電壓及電流成正比的類比 電壓。MPPT回授電壓也係藉ADC 505b數位化^ ADC 505b 提供此等轉換信號作為數位化測量資料給微處理器5〇7b， 與其相關聯之資料記憶體5 06b(例如隨機存取記憶體(ram)) 及程式記憶體508b(例如唯讀記憶體(ROM))執行運算演繹 法則（容後詳述）。結果寫至開關脈衝形成邏輯509b，例如使 用場可規劃閘陣列(FPGA)具體實施。來自開關脈衝形成邏 輯509b之輸出脈衝係藉用以驅動電力平衡器及mppt轉換 器開關（如前文討論）的信號驅動程式51 〇b(例如MOSFET驅 動程式）而被轉成適當位準。 參考第5c圖，依據具體實施例’例如如第外圖所示， 控制單元之操作可如圖所示進行。在MPPT轉換器控制迴路 啟動501c後，開關控制脈寬係wdTrn的小增量增加5〇2c，隨 後全部太陽能面板之電力和係根據下式計算5〇3c， P 目前=V1*I1+ V2*I2+".+ Vn*In 此處：Vn=得自太陽能面板n之電壓201208226 VI. Description of the invention: [Technical field to which the invention pertains] Reference to the related application This patent application claims US Provisional Patent Application No. 61/185,264 'Shenzhen June 9, 2009 and the name "has the maximum power point per panel" The priority of tracking solar array inverters. FIELD OF THE INVENTION The present invention relates to circuits and methods for obtaining power from a self-converting circuit and, more particularly, to such circuits and methods for obtaining maximum power from a series coupled DC power source. BACKGROUND OF THE INVENTION As is well known in the art, energy conversion facilities based on central inverters use a series of DC power supplies in series, occasionally referred to as strings (stHngs). Examples include biomass batteries, chemical batteries, fuel cells, and energy storage battery packs. However, long strings of power supplies have unique drawbacks. For example, in the case of a solar panel, if the panel is shielded or blocked, less photocurrent is generated. Panel currents may also be unbalanced due to other factors. Since the solar panels in series are limited to all conducting equal currents, the weakest will limit the power drawn from the remaining solar panels, thus reducing the overall efficiency of the array. For the same reason, a string of solar panels must be given the same orientation and of the same type and size. However, it is not always possible or desirable to do so for aesthetic reasons or other architectural reasons. Another well-known solution is the micro-inverter. The micro-inverter converts solar energy from a single solar panel for feeding to the commercial alternating current (AC) 201208226 grid. Although MPPT is based on the benchmark of each panel, maximizing energy acquisition, micro-inverter facilities are less cost-effective because of the higher cost per watt and lower power conversion efficiency. SUMMARY OF THE INVENTION According to the present invention, a circuit and method for maximizing power from a plurality of DC power sources connected in series with each other and providing unequal DC currents are proposed. The current associated with the difference between the unequal DC currents is diverted from the series coupled power source, captured as magnetic field energy, and then applied to the DC current provided by the series coupled power supply. According to an embodiment of the present invention, the current balancing circuit includes: the first, second, and third electrodes are configured to couple the first and second series coupled DC power sources to receive through the first and third electrodes a sum of the first and second DC voltages generated by the first and second DC power sources, and a common DC current generated by the first and second DC power sources, and receiving the substantial substance through the second electrode a differential DC current equal to a difference between the first and second DC currents generated by the first and second DC power sources, coupled to the capacitor circuits of the first, second, and third electrodes; a switching circuit between the first and third electrodes; an inductive circuit coupled to the second electrode and the switching electric (4); and a control circuit surface-connected to the first, second and third electrodes and the switching circuit Wherein the control circuit is responsive to the first and second DC voltages and the first and second DC currents by providing a plurality of control signals, and the switching circuit is provided during the first time interval a first direct current path between the sensing circuit and the first electrode, and a second direct current path between the inductive circuit and the third electrode during a second time interval in response to the plurality of controls signal. According to another embodiment of the present patent application, a method for maximizing power from a plurality of DC power sources includes: receiving, by the first and third electrodes, a first one generated by the first and second DC power sources, respectively And a sum of the second DC voltages, and a DC current shared by the first and second DC power sources; receiving the second electrode and receiving substantially the same amount respectively generated by the first and second DC power sources a differential DC current between the first DC current and the second DC current; capacitively coupling the first, second, and third electrodes; and sensing the first and second DC voltages and the first and second DC currents, And for the differential DC current, providing a first inductive DC current path between the second and first electrodes during the first time interval, and for the differential DC current during the second time interval Providing a second inductive direct current path between the second and third electrodes. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic illustration of a power balancer in accordance with one embodiment. Figure 2 shows the operation of the power balancer of Figure 1. 201208226 Figure 3 is an example of a signal timing diagram for a switching control signal for the power balancer of Figure 1. 4 is a full view and an enlarged view of a current-voltage and power-voltage characteristic curve for a typical solar panel. FIG. 5 is a specific implementation of a power balancer module having a plurality of series power balancers according to another embodiment. Schematic diagram. Figure 5a is a schematic illustration of a specific implementation of a power balancer module having a plurality of series power balancers in accordance with another embodiment. Figure 5b is a block diagram of a specific embodiment of the control unit of Figure 5a. Figure 5c is a flow diagram of a specific embodiment of the method performed by the control unit of Figure 5b. Figure 6 is a block diagram of four power balancer modules coupled to provide DC current to be converted to AC current by a DC/AC converter, in accordance with another embodiment. Figure 6a is a block diagram of a decentralized inverter system architecture in accordance with another embodiment. Figure 7 is a schematic illustration of a dc/ac converter for a three phase grid in accordance with another embodiment. The first diagram is a schematic diagram of a DC/AC converter for a single phase grid, in accordance with another embodiment. C DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT The following detailed description refers to the specific embodiments of the claimed invention with reference to the accompanying drawings. This description is intended to be illustrative, and not restrictive. The embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. In the entire disclosure, unless the context clearly dictates otherwise, it is to be understood that the number of individual circuit elements as described may be singular or plural. For example, 'circuitry' and 'loop' may include a single component or multiple components that are in an active state and/or inactive state and that are linked or otherwise dissipated together (eg, in one or more products) Body circuit wafers) to provide the described functionality. In addition, the term "signal" may refer to one or more currents, one or more voltages, or a data signal unless otherwise indicated to the contrary. Still further, although the invention has been discussed in a specific implementation using discrete electronic circuits, preferably in the form of one or more integrated circuit wafers, the functionality of any of the circuits may additionally use one or more A properly planned processor implementation depends on the frequency of the signal or data rate to be processed. Further, although the drawings exemplify the outlines of the functional blocks of the various embodiments, the functional blocks do not necessarily refer to the division between the hardware circuits. Thus, by way of example, one or more of the functional blocks (e.g., processor, memory, etc.) can be embodied in a single block of hardware (e.g., general purpose signal processor, random access memory, hard drive, etc.). Similarly, any of the programs described may be isolated programs, may be combined with the operating system (os) as a subroutine, may be installed software functions, and the like. Gu Houyang said that the patented invention maximizes power acquisition from a series coupled DC power supply. As a means of presenting a time-based example, the following discussion is based on the following example, converting solar energy into AC current, which is to be fed into the commercial power grid, with the vehicle and the conversion efficiency and the cost-effectiveness of the conversion. The higher energy acquisition system needle 201208226 was achieved by using MPPT for each solar panel. Based on public statistics, this per module MPPT contributes to 5% to 25 percent energy gain for typical solar installations. Maintenance of solar installations can benefit from continuous monitoring of the performance of individual PV modules. An additional advantage is that there are no high DC voltage conductors on the roof. Referring to Figure 1 'an important feature of the claimed invention is the power balancer. As shown in the specific implementation, two solar panels PV1 1〇〇, PV2 1〇1 are connected in series. If it has the same characteristics, the Μρρτ converter will find a point where the two panels deliver the maximum power. If the characteristics of the two pieces are not the same, the weaker panel will limit the power drawn from the stronger panel. For example, if one panel PV1 is shielded to produce 1 amp less current than the other panel PV2, the power balancer allows the MPPT converter to obtain greater power from the two panels, for example, by compensating for mismatch between the two panels. . According to one embodiment, the power balancer includes capacitors C1 102, C2 103, an inductor L1 104, switches SW1 105, SW2 106 (eg, a MOSFET), and a control unit 1〇7 The figure shows a substantial interconnection. If the switches 105, 106 are operated at 50% duty cycle, the power balancer will maintain substantially equal voltage across the panels PV1, PV2, independent of the current generated by the panel PVb PV2. It is assumed that panel PV1 generates current 1| and panel PV2 generates current I2=Ii+Idelta. If the power balancer is not used, the MPPT converter will receive the total current I, and Idelta will not be recovered or acquired. The purpose of the power balancer is to obtain this additional current Ideha' from panel PV2 and pass its associated additional power to the MPPT. 8 201208226 Referring to Figure 2, the operation of the power balancer can be compared to the operation of a conventional boost converter. During the closed period of the switch SW2 200, the switch SW1 203 is open, and the current difference Irlfldeita is conducted through the PATH1 202, and the energy is accumulated in the magnetic field of the inductor L1 201. During the closed circuit of the switch swi 203, the switch SW2 200 is open, and the current is conducted through the PATH 2 205. The energy previously stored in the inductor L1 201 is used as an additional current (having an average amplitude of the differential current Iddta about the solar panels PV1, PV2). And, ideally, equal to *匕'2 / (Kn + heart 2 PP)) is delivered to the MPPT converter 204. Thus, the power balancer only converts the unbalanced portion of the energy 206 without affecting the balance of the energy associated with the current, which is sent directly to the MppT converter 2〇4. Accordingly, the conversion efficiency in the power balancer is substantially proportional to the magnitude of the unbalanced portion of the energy balance 2〇6. The capacitance values of capacitors C1 204, C2 203 are not critical, but should be based on criteria such as the switching frequency of switches SW1 105, SW2 106, and the maximum allowable panel mismatch. Again, the value of the capacitor should be high enough to ensure that the voltage ripple across it does not cause the voltage of the panel 1 PV1, PV2 to excessively deviate from the maximum power point (MPP) voltage of the panels PV1, PV2. This will maintain close proximity to the maximum energy available from solar panels. For a typical crystallization solar panel, if the voltage chopping is about 5% (peak to peak) of the panel MPP voltage, then 99 5% energy will be achieved. Referring to Fig. 4, further improvement in power acquisition can be obtained by individually optimizing the voltage for each panel. Line graph 4 shows current-voltage and power-voltage characteristics for a typical solar panel. For example, the "pv 1 ι_ν curve" corresponds to the panel PV1 100, and the rpV2 curve corresponds to the panel PV2 101. Magnification line 4〇1 display 201208226 The maximum power of the panel PV2 reaches a slightly higher voltage of the comparison panel PV1, for example, 6 (//^ 402 and 403 respectively. This maximization is based on voltage 乂, 108, V2 The measured values of 109 and current I are 110, 111, and are performed by a secondary (for example, slower) optimization loop of control unit 1〇7 (Fig. 1) (described later in detail). The control unit 107 sets the duty cycle of the control signals for turning the switches SW1 and SW2 on and off as follows: 7; /: r2 = k2_ / Km_, where is the optimum voltage of the panels PV1 and PV2, respectively, and T2 The pulse width of the control signal SW, 300SW2 301, respectively. Referring to Figure 5, according to another embodiment, similar techniques can be applied to maximize power drawn from more than two solar panels, for example with four series solar panels PV1 500, PV2 501, PV3 502, PV4 503 multi-balancer power acquisition maximizer module embodiment. Three power balancer is used to balance the four panels 'two pairs arranged in balance. Each opposite PV1 + PV2 The power balance of PV3+PV4 is as described above. The third power The balancer balances the two pairs of solar panels PV1+PV2, PV3+PV4. As a result, all four pieces are balanced and provide power to the MPPT converter 504. The MPPT converter 504 includes an inductor L4 505, a switch SW7 506 (eg, a MOSFET), Diode D1 507 and capacitor C5 508 are substantially interconnected as shown in the figure, which operate as an active boost converter. Control unit 509 implements four optimized loops. By controlling MPPT converter 5〇4 Switch SW7 5〇6 working cycle, the fastest loop to track all four #balance panel guess. The two bribe optimization loop (preferably the same) is optimized in the solar energy side of the Chengyang solar energy (four) 10 201208226 board. The paired solar panel PV1+PV2 is controlled by the switching of its switch swi 5i〇 and state 511, and the domain-to-solar panel is controlled by the switching duty cycle of its switches SW3 512 and SW4 513. The slowest The optimized circuit is formed by balancing the solar panel pairs PV1+PV2, PV3+PV4 by controlling the switching duty cycle of the f„SW55u, SW65i5. Referring to FIG. 5a, according to another embodiment, power for multiple solar panels is performed according to another embodiment. Balancer For the implementation of odd solar panels. For example, 'five solar panels can be arranged by four power balance H circuits to reduce the maximum voltage to any single-power balancer. The power balancer circuit is configured to balance adjacent pairs of helium in a tandem solar panel (as discussed above), where each pair of solar panels is balanced by an interleaved power balancer circuit as shown. The operation of interleaving the power balance H maintains an optimized voltage ratio across all strings of solar panels. The first power balancer 502a includes two switches sw^SW2' and an inverse ratio of the duty cycle maintained on its associated solar panels pvi, pV2 that is substantially equal to the state of the switches SW1, SW2. Similarly, the second power balancer 5〇4a defines the voltage ratios on its associated solar panels PV2, PV3, etc. for all panels in the chain. Such five solar panels PV1, PV2, PV3, PV4, PV5 have their individual voltage ratios defined by four power balancer circuits 502a, 504a, 5〇5a, 5〇6a, and provide power to MPPT conversion as discussed above. 5〇7a. In the general case of this embodiment, the N series solar panels can be balanced by a power balancer circuit. Referring to Figure 5b, in accordance with one embodiment, the control of the 5th, 5th, and the maps 201208226 The units 107, 509a, 508a may be embodied as substantially as shown. The voltage and current sensing of the solar panel voltage and current is performed using transformers 501b, 502b, 503b '504b, providing an analog voltage proportional to the solar panel voltage and current converted by analog to digital converter (ADC) 505b. The MPPT feedback voltage is also digitized by the ADC 505b. The ADC 505b provides these conversion signals as digital measurement data to the microprocessor 5〇7b, and its associated data memory 506b (eg, random access memory (ram) )) and the program memory 508b (for example, read-only memory (ROM)) to execute the arithmetic deduction rule (detailed later). The result is written to switch pulse forming logic 509b, for example using a field programmable gate array (FPGA) implementation. The output pulse from switch pulse forming logic 509b is converted to the appropriate level by a signal driver 51 〇b (e.g., a MOSFET driver) that drives the power balancer and mppt converter switch (as discussed above). Referring to Figure 5c, the operation of the control unit can be performed as shown, as shown in the external figures, e.g., as shown in the external figures. After the MPPT converter control loop starts 501c, the small increment of the switch control pulse width system wdTrn is increased by 5〇2c, and then the power of all the solar panels is calculated according to the following formula: 5〇3c, P is currently =V1*I1+V2*I2 +".+ Vn*In here: Vn=voltage from solar panel n
In=得自太陽能面板n之電流 此一新運算的功率Pa *係與先前儲存的功率p㈣作比 較504c。若目刖功率p目前係高於先前功率p先前，則功率儲存 值係以目前值更新5〇6c，及繼續進行迴路。否則，開關控 制脈衝增量dTm的符號顛倒505c，而持續進行迴路。 12 201208226 同理’較慢的電力平衡器控制迴路經啟動507c，接著 為改變508c平衡器開關時序。藉增加一個開關控制信號 swi之工作週期T1達定量dTn，藉減少另一個開關控制信號 SW2之工作週期T2達同量dTn，而變更在電力平衡器（第3圖） 中兩個開關間之時序關係。電力係如前述測量509c，但只 針對附接至電力平衡器之該等太陽能面板。此值Ps *係比較 510c先前儲存功率^若目前功率Pa*係高於先前儲存功 率P** ’則功率儲存值係以目前值更新512c，而針對下一個 電力平衡器繼續迴路513c。否則，如先前討論，開關控制 脈衝增量dTn的符號顛倒5lic，而持續進行迴路。 參考第6圖’ MPPT轉換器之輸出作為電流源，藉此允 許數個MPPT轉換器並聯，例如四個並聯的mppt轉換器μ 1 600、M2 601、M3 602、Μ4 603(識別為「電力獲取最大化 器模組」）。其所產生的DC電流係藉DC/AC轉換器604而轉 成AC電流。 參考第6a圖’電力獲取最大化器模組之孤立性質使得 實際上可將此項功能與電網連結DC至AC反相器功能作實 體連結。如此允許如圖所示之分散式反相器系統架構。於 此具體實施中’二或多片太陽能面板601 a係連結至一或多 個電力獲取最大化器模組602a且藉此而予最佳化。各個電 力獲取最大化器模組服務一或多個太陽能面板，及包括連 結的一個MPPT轉換器及針對太陽能面板數目為適當數目 的平衡器。然後二或多個電力獲取最大化器模組連結至Dc 至三相AC轉換器603a。監測及控制閘道器介面6〇5a提供透 13 201208226 過電力線通訊之系統監測手段，及提供允許本地及遠端與 電力系統互動用來監測與控制狀態之通訊橋接器。 參考第7圖，顯示一種用來提供電力給3-相電網之 DC/AC轉換器之具體實施。DC電流進入斬波器7〇〇，其針 對升壓變壓器T1 701產生高頻(例如大於20千赫茲(KHz))電 壓。變壓器T1之電流絕緣輸出係以整流器702整流來產生橫 過濾波電容器C1 703之DC電壓。六個開關SW1 704、SW2 7〇5、SW3 706、SW4 707、SW5 708、SW6 709(例如 MOSFET 或絕緣閘兩極性電晶體(IGBT))產生3-相AC電壓，其係藉濾 波電路710濾竦來遞送至商業3_相電網。 控制單元711監測3-相電網電壓V3j及電流I3-相，及針對 開關SW卜SW2、SW3、SW4、SW5、SW6產生控制脈衝來 傳遞能量給具有適當相位的電網。若符合標準並不要求電 流絕緣，則DC輸入電壓Vinp可直接施加至濾波電容器703， 因而免除斬波器700、變壓器T1 701及整流器702的需要。 前述架構藉將轉換比Vrect/Vinp維持恆定而優異地最大 化DC/AC電力轉換效率。結果，DC輸入電壓Vinp追蹤電網 電壓。橫過開關SW1、SW2、SW3、SW4、SW5、SW6之整 流DC電壓Vreet係維持在針對目前電網電壓提供未失真輸出 波形所要求的最低位準。於此架構中，各異的太陽能與各 異的電網電壓之匹配係在一處亦即在MPPT轉換器5〇4(第5 圖）進行。 參考第7a圖’依據另一個實施例，電力獲取最大化器 可用在單相電力反相器。如前文討論，太陽能面板提供連 14 201208226 續能量流。由於能量無法連續地供應單相電網，要求能量 儲存緩衝器。如圖所示，此種能量儲存可具體實施電容器 701a。橫過串聯平衡太陽能面板之施加至mppt升壓轉換器 之電壓和，結果導致高電力獲取最大化器模組輸出電壓。 因儲存在電容器之能係與所施加電壓之平方成正比，故如 此導致比較既有單一太陽能面板反相器，電容儲存元件的 貫體大小相對應的縮小。橫過電容器701 3存在的電壓漣波 可藉適當電力獲取最大化器模組控制演繹法則而與太陽能 面板隔離，進一步縮小電容器701a的大小。 基於刖文討論，依據本請求專利發明，可知：提供一 種電力平衡器，其藉補償太陽能面板間的不匹配而改良從 串聯耦合DC電源諸如太陽能面板之能獲取；此種電力平衡 器可用來平衡多於兩個太陽能面板；Mpp丁轉換器其係作為 電流源，允許多個轉換器並聯來加總其輸出電流；針對 DC/AC電力轉換器提出—種高度有效架構，其補償在能量 轉換鏈中單-位置各異的太陽能位準及各異的電網電壓； 及提供多迴路控制演繹法則來最佳化系統效能。 熟π相關技藝人士顯然易知可未悖離本發明之範圍及 精韃而對本發明之結構及操作方法做出多種其它修改及變 ^雖然⑼就特定較佳實施觸述本發明，但須瞭解本 明求專利之發明;應;^ t地隱於此等特定實施例。如下 申^利範圍意圖界定本發明之，及藉此涵蓋落入於 申请專利範圍各項範_之結構及方法及其相當物。 15 201208226 【圖式簡單說明】 第1圖為依據一個實施例，一種電力平衡器之示意圖。 第2圖顯示第1圖之電力平衡器之操作。 第3圖為針對用於第1圖之電力平衡器的切換控制信號 之信號時序圖實例。 第4圖為針對典型太陽能面板之電流-電壓及功率-電壓 特性曲線之全圖及放大圖。 第5圖為依據另一個實施例，具有多個串聯電力平衡器 之電力平衡器模組具體實施之示意圖。 第5a圖為依據另一個實施例，具有多個串聯電力平衡 器之電力平衡器模組具體實施之示意圖。 第5b圖為第5a圖之控制單元之具體實施例之方塊圖。 第5c圖為於第5b圖之控制單元執行之方法之具體實施 例之流程圖。 第6圖為依據另一個實施例，耦接來提供DC電流欲藉 DC/AC轉換器而轉換成AC電流之四個電力平衡器模組之 方塊圖。 第6a圖為依據另一個實施例，分散式反相器系統架構 之方塊圖。 第7圖為依據另一個實施例，針對三相電網之DC/AC轉 換器之示意圖。 第7a圖為依據另一個實施例，針對單相電網之DC/AC 轉換器之示意圖。 16 201208226 【主要元件符號說明】 100、101、500-503、601a". 501c-513c...處理方塊 太陽能面板 502a ' 504a > 505a ' 506a... 102、103、508、701a...電容器 電力平衡器電路 104、201、505...電感器 505b...類比至數位轉換器(ADC) 105、106、200、203、506 5〇6b...資料記憶體 、510-516、704-709...開關 507...二極體 107'508a > 509 ' 509a ' 711... 507b...微處理器 控制單元 508b...程式記憶體 108、109...電壓 50%...開關脈衝形成邏輯 110、111...電流 510b...信號驅動程式 202、205...路徑 602a…電力獲取最大化器模組 204、504、507a、600-603... 603a、604a...DC至三相AC轉換器 MPPT轉換器 604...DC/AC 轉換器 206…能 605a…監測及控制閘道器介面 300、301…控制信號 700...斬波器 400...線圖 701…升壓變壓器 401…放大線圖 702...整流器 402、403…最大電力 703…濾波電容器 501b-504b···變壓器 710…濾波電路 17In = current from the solar panel n The power Pa * of this new operation is compared with the previously stored power p (four) 504c. If the witness power p is currently higher than the previous power p, then the power storage value is updated 5 〇 6c with the current value and the loop continues. Otherwise, the sign of the switch control pulse increment dTm is reversed 505c, and the loop continues. 12 201208226 Similarly, the slower power balancer control loop is activated by 507c, followed by changing the 508c balancer switching timing. By adding a switch control signal swi to the duty cycle T1 to the quantitative dTn, by reducing the duty cycle T2 of the other switch control signal SW2 to the same amount dTn, and changing the timing between the two switches in the power balancer (Fig. 3) relationship. The power system is measured 509c as previously described, but only for the solar panels attached to the power balancer. This value Ps* is compared to 510c previously stored power. ^ If the current power Pa* is higher than the previous stored power P**' then the power storage value is updated 512c with the current value and the loop 513c is continued for the next power balancer. Otherwise, as previously discussed, the sign of the switch control pulse increment dTn is reversed by 5 lic and the loop continues. Refer to Figure 6 for the output of the MPPT converter as a current source, thereby allowing several MPPT converters to be connected in parallel, for example four parallel mppt converters μ 1 600, M2 601, M3 602, Μ 4 603 (identified as "power acquisition" Maximizer module"). The DC current generated by it is converted to an AC current by the DC/AC converter 604. Referring to Figure 6a, the isolated nature of the Power Acquisition Maximizer module allows this functionality to be physically linked to the grid-coupled DC-to-AC inverter function. This allows for a decentralized inverter system architecture as shown. In this implementation, the two or more solar panels 601a are coupled to one or more power acquisition maximizer modules 602a and thereby optimized. Each power acquisition maximizer module serves one or more solar panels, and includes an MPPT converter coupled and an appropriate number of balancers for the number of solar panels. Two or more power acquisition maximizer modules are then coupled to the Dc to three phase AC converter 603a. The monitoring and control gateway interface 6〇5a provides system monitoring means for over-current line communication, and provides a communication bridge that allows local and remote interaction with the power system for monitoring and control status. Referring to Figure 7, a specific implementation of a DC/AC converter for providing power to a 3-phase grid is shown. The DC current enters the chopper 7 〇〇 which produces a high frequency (e.g., greater than 20 kilohertz (KHz)) voltage to the step-up transformer T1 701. The current insulated output of transformer T1 is rectified by rectifier 702 to produce a DC voltage across filter capacitor C1 703. Six switches SW1 704, SW2 7〇5, SW3 706, SW4 707, SW5 708, SW6 709 (such as MOSFET or insulated gate bipolar transistor (IGBT)) generate 3-phase AC voltage, which is filtered by filter circuit 710 It is delivered to the commercial 3_phase grid. The control unit 711 monitors the 3-phase grid voltage V3j and the current I3-phase, and generates control pulses for the switch SWs SW2, SW3, SW4, SW5, SW6 to transfer energy to the grid having the appropriate phase. If current compliance is not required, current input voltage Vinp can be applied directly to filter capacitor 703, thereby eliminating the need for chopper 700, transformer T1 701, and rectifier 702. The foregoing architecture maximizes the DC/AC power conversion efficiency by maintaining the conversion constant over Vrect/Vinp. As a result, the DC input voltage Vinp tracks the grid voltage. The rectified DC voltage Vreet across switches SW1, SW2, SW3, SW4, SW5, SW6 maintains the lowest level required to provide an undistorted output waveform for the current grid voltage. In this architecture, the matching of the different solar energy to the different grid voltages is performed in one place, ie in the MPPT converter 5〇4 (figure 5). Referring to Figure 7a', according to another embodiment, a power harvesting maximizer can be used in a single phase power inverter. As discussed earlier, the solar panel provides continuous energy flow for the 2012 20122626. Energy storage buffers are required because energy cannot be continuously supplied to a single-phase grid. As shown, such energy storage can be embodied in capacitor 701a. The voltage sum applied to the mppt boost converter across the series balanced solar panel results in a high power acquisition maximizer module output voltage. Since the energy stored in the capacitor is proportional to the square of the applied voltage, a comparison is made between the single solar panel inverter and the corresponding size of the capacitor storage element. The voltage chopping across capacitor 701 3 can be isolated from the solar panel by appropriate power acquisition maximizer module control deduction rules, further reducing the size of capacitor 701a. Based on the discussion of the text, according to the claimed invention, it is known that a power balancer is provided which can be improved by compensating for mismatch between solar panels from a series coupled DC power source such as a solar panel; such a power balancer can be used to balance More than two solar panels; the Mpp-but converter acts as a current source, allowing multiple converters to be connected in parallel to sum their output currents; a highly efficient architecture for DC/AC power converters, compensated in the energy conversion chain Medium-to-single-parameter solar levels and varying grid voltages; and multi-loop control deduction rules to optimize system performance. It will be apparent to those skilled in the art that various modifications and changes can be made in the structure and method of operation of the present invention without departing from the scope and spirit of the invention. The inventions claimed herein are intended to be in a particular embodiment. The scope of the present invention is intended to be defined by the following claims, and the structures and methods and equivalents thereof that fall within the scope of the claims. 15 201208226 [Simplified Schematic] FIG. 1 is a schematic diagram of a power balancer according to an embodiment. Figure 2 shows the operation of the power balancer of Figure 1. Fig. 3 is a diagram showing an example of a signal timing chart for a switching control signal for the power balancer of Fig. 1. Figure 4 is a full and enlarged view of the current-voltage and power-voltage characteristics of a typical solar panel. Figure 5 is a schematic illustration of a specific implementation of a power balancer module having a plurality of series power balancers in accordance with another embodiment. Figure 5a is a schematic illustration of a specific implementation of a power balancer module having a plurality of series power balancers in accordance with another embodiment. Figure 5b is a block diagram of a specific embodiment of the control unit of Figure 5a. Figure 5c is a flow diagram of a specific embodiment of the method performed by the control unit of Figure 5b. Figure 6 is a block diagram of four power balancer modules coupled to provide DC current to be converted to AC current by a DC/AC converter, in accordance with another embodiment. Figure 6a is a block diagram of a decentralized inverter system architecture in accordance with another embodiment. Figure 7 is a schematic illustration of a DC/AC converter for a three-phase grid in accordance with another embodiment. Figure 7a is a schematic diagram of a DC/AC converter for a single phase grid, in accordance with another embodiment. 16 201208226 [Description of main component symbols] 100, 101, 500-503, 601a " 501c-513c... process block solar panel 502a '504a > 505a ' 506a... 102, 103, 508, 701a... Capacitor power balancer circuits 104, 201, 505... inductors 505b... analog to digital converters (ADCs) 105, 106, 200, 203, 506 5〇6b... data memory, 510-516, 704-709...switch 507...diode 107'508a > 509 '509a '711...507b...microprocessor control unit 508b...program memory 108, 109... voltage 50%...switch pulse forming logic 110, 111...current 510b...signal driver 202,205...path 602a...power acquisition maximizer module 204, 504, 507a, 600-603.. 603a, 604a...DC to three-phase AC converter MPPT converter 604...DC/AC converter 206...can 605a...monitor and control gateway interface 300,301...control signal 700...chopping 400... line diagram 701... step-up transformer 401...magnification line diagram 702...rectifier 402, 403...maximum power 703...filter capacitor 501b-504b···transformer 710...filter circuit 17