TW200935526A - Manufacturing method for semiconductor device and underfill dispensing machine thereof - Google Patents

Manufacturing method for semiconductor device and underfill dispensing machine thereof Download PDF

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Publication number
TW200935526A
TW200935526A TW097105273A TW97105273A TW200935526A TW 200935526 A TW200935526 A TW 200935526A TW 097105273 A TW097105273 A TW 097105273A TW 97105273 A TW97105273 A TW 97105273A TW 200935526 A TW200935526 A TW 200935526A
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TW
Taiwan
Prior art keywords
substrate
semiconductor device
primer
vacuum
chamber
Prior art date
Application number
TW097105273A
Other languages
Chinese (zh)
Inventor
Jung-Hua Liang
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW097105273A priority Critical patent/TW200935526A/en
Publication of TW200935526A publication Critical patent/TW200935526A/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L2224/743Apparatus for manufacturing layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector

Landscapes

  • Wire Bonding (AREA)

Abstract

A manufacturing method for semiconductor device and an underfill dispensing machine thereof are provided. The manufacturing method includes the following steps. First, a substrate and a semiconductor element disposed on the substrate are provided. Then, an underfill is provided between the substrate and the semiconductor element in vacuum. Afterwards, the substrate with the semiconductor element is exposed to a normal pressure surrounding, such that the underfill fills in between the substrate and the semiconductor element.

Description

200935526 九、發明說明: 【發明所屬之技術領域】 本發明是有關於一種半導體裝置之製造方法及其底 膠塗佈機台,且特別是有關於一種包含充填底膠之半導體 裝置之製造方法及其底膠塗佈機台。 【先前技術】 近年來,隨著電子產品邁向輕薄短小、多功能、高速 β度之趨勢發展下’高密度與高輸入/輸出之半導體封裝件之 需求漸增,因此封裝件内的半導體元件(例如晶粒)厚度 也日益薄化,以有效縮小整體封裝尺寸。在半導體晶粒的 連接技術中,常見的連接方式包括覆晶接合(flip_chip bonding)、打線接合(wire bonding)以及卷帶自動接合(tape automated bonding)等,用以將晶片與基板電性連接。其 中覆晶接合技術係利用凸塊(bumps )作為晶片與基板間 電性連接之媒介,相較於打線接合以及卷帶自動接合之方200935526 IX. The invention relates to a manufacturing method of a semiconductor device and a primer coating machine thereof, and more particularly to a manufacturing method of a semiconductor device including a filling primer and Its primer coating machine. [Prior Art] In recent years, as electronic products are moving toward a light, short, versatile, high-speed beta degree, the demand for 'high-density and high-input/output semiconductor packages is increasing, so semiconductor components in packages The thickness of (eg, die) is also increasingly thinner to effectively reduce the overall package size. In the connection technology of the semiconductor die, a common connection method includes flip chip bonding, wire bonding, and tape automated bonding to electrically connect the wafer to the substrate. Among them, the flip chip bonding technique utilizes bumps as a medium for electrically connecting the wafer to the substrate, compared to the wire bonding and the automatic bonding of the tape.

G 式’覆晶接合技術具有較短之電性連接路徑,並且具有較 佳之電性連接品質,更可節省基板上接合晶片所需之面 積,使得採用凸塊作為晶片連接之方式,逐漸成為目前業 界重要的研究發展方向之一。 在一般覆晶接合之製程中,係將矽晶片焊接於基板 上。然而’由於矽晶片以及基板材料之熱膨脹係數 (Coefficient of Thermal Expansion,CTE )無法有效匹配’ 在進行有關熱循環之製程步驟時,容易導致焊接點產生熱 5 200935526 機械疲勞的問題’大大降低了石夕晶片與基板之間焊接點的 機械可靠度。 為了解決前述問題’目前業界係普遍應用塗佈底膠於 覆晶封裝件中的方式。係使底膠包覆圍繞於焊接點,促成 矽晶片、基板及底膠之間的熱應力重置,以期降低焊接點 文熱應力作用之應變量,以增加焊接點之耐受性。但是在 塗佈底膠(點膠)的過程中,常會在膠態之底膠材料中產 生氣泡。此外,隨著半導體封裝件尺寸等級的下降,更使 ©得底膠愈來愈難以完整地充填㈣晶片與基板之間。如此 係容易造成底膠於焊接點之間形成空缺的現象,影響了底 膠塗佈的品質,使得底膠改善焊接點熱應力作用的效果受 到影響’整體而言係降低了半導體封褒件的品質。 【發明内容】 ^發明係提供—種半導體裝置之製造方法及其底膠 ❹杜 Ί得底膠在真空環境巾域於純及半導體元 §半導體裝置移送至常壓環境時,底膠中係不會 :泡'空缺等缺陷’係可提高塗佈底膠的品質,進一 步^升元件接合之耐受性以及半導體裝置之品質。 ^據本發明,提出—種半導體裝置之製造方法。首 广贩二供一基板及一半導體元件。接著,於真空中提供一 &amp;杜;半導體70件及基板之間。而後,暴露基板及半導體 5於常壓中’使底膝實質上充滿於基板及半導體元件之 間0 200935526 根據本發明,另提屮— 先,提供-基板,基板 半導體裝置之製造方法。首 一半導體元件,其係具有面具有多個接墊。其次’提供 接墊及銲料凸塊,以將半=銲料凸,。接著,對應接合 者,置入半導體元件及基=件覆晶接合至基板上。再 供-底膠於半導體元件^ ,空令。而後’於真空中提 元件及基板於常壓中,使;二=暴露半導體 元件之間。 焉負上充滿於基板及半導體 Ο 根據本發明’更提出—種 部件、一塗佈腔、—塗佈機 ^口,包括一抽氣 以抽除塗佈腔中之氣體 。抽氣部件用 用以於真空之塗佈腔中塗f塗佈腔為真空。塗佈機構 導俨亓杜》 底耀於一半導體裝置之一丰 及一基板之間。出料腔嗖置 容置塗佈底膠後之半㈣裝置塗佈腔之後,用以 ❹ 僅,上述目的、特徵、和優點能更明顯易 如下:牛較佳實施例’並配合所附圖式,作詳細說明 【實施方式】 =切明較佳實施例之半導體裝置之製造方法及 填&amp;本♦佈機台,係在真空環境下將底膠(underfill)充 、:半導體元件(semiconductor element)以及某板之間。 即使底膠在真空環境中充填時產生氣泡(bubble)或空缺 (_)等_,當基板及半導體元件移至常壓時,底膠 7 200935526 係因受到外界壓力施壓,朝向氣彡包_ + 膠 中不存在氣泡或空缺,進而改善充移動,使得底 穴%修的品暂 提出依照本發明之實施例作為詳細說明,然實施例=以 作為範例說明,並不會限缩本發明欲保護之範圍。再者, 實施例之圖式亦省略不必要之元件,以清楚顯示本發日月之 技術特點。 請同時參照第1圖及第2Α〜2Ε圖,第1圖繪不依戶、’、 m 2Α〜2Ε 本發明實施例之半導體裝置製造方法之流程圖,弟 一 ©圖分別繪示依照第1圖中各步驟之基板及半導體70件之7Γ 意圖。 本實施例之半導體裝置之製造方法’首先進π步驟 Λ ^健2Α圖所示。 S1’提供一基板110及一半導體元件130,如第2八 多個 本實施例中,步驟S1提供之基板110,其表面係f有夕我 接墊(connecting pad) 111,此些接勢Hi例如二 〆 ❹ 板110之一上表面ll〇a。另外’步驟S1提供之β 件130例如是半導體晶粒(die) ’龙且具有多個録;一下 131,此些銲料凸塊131例如是位於半導體元件130 表面130a。 13〇於 接著,如步驟S2所示,電性連接半導體=件2技術 基板110上。本實施例中係利用習用之覆日曰對應 (flip-chip bonding technology )’將此些知料凸 板 11〇 焊接於此些接墊111,以將半導體元件130接合至广13〇 上。本實施例中係將接合後之基板110及車導〜&amp; eh往 m C9袼玎包括塗佈助# 視為一半導體裝置100。此外,步驟s2係 8 200935526 劑及加熱迴焊之動作。在焊接半導體元件130之前’先塗 佈助焊劑於接墊11丨上。接著,加熱半導體元件130及基 板110,使銲料凸塊131迴焊接合於接墊111。迴焊銲料凸 塊131及接墊111之後,係於半導體元件130之下表面130a 以及基板110之上表面ll〇a之間形成多個間隙120’如第 2B圖所示。完成步驟s2之後,較佳地係進行助焊劑清洗 的動作,以去除銲料凸塊131及接墊111之焊接點表面殘 留的助焊劑,以避免助煤劑影響後方底膠塗佈之可靠度(底 ❹膠塗佈之步驟將詳述於後)。清洗助焊劑之後’一般而言均 會殘留水分於基板上。 而後,本實施例之製造方法接著進行步驟S3,於真空 中提供一底膠於半導體元件130及基板110之間。步驟S3 可例如是依照下述方式進行:首先,將焊接有半導體元件 130之基板11〇置入一真空環境V中,如第2C圖所示; 接下來’在真空環境V中塗佈底膠15〇至半導體元件130 及基板110之間,如第20圖所示。此處係可應用傳統利 用毛細作用力帶動底膠150流入間隙120内’或者其他習 用之點膠方式,本發明係不多加以限制。此外,本實施例 中可應用傳統之底膠150材料,例如二氧化矽/環氧樹脂 (silica/epoxy resin),或者其他習知應用於覆晶接合技術 中之底膠材料均可應用於此。再者,本實施例之真空環境 V中,壓力較佳地係小於約0·1大氣壓(atm)。另外,本 實施例之製造方法更可於進行步驟S3之前,在真空中加 熱半導體裝置1〇〇,以去除基板110上殘留之水分,係可 9 200935526 有效將游離水分含量降低至約10%以下。 在步驟S3中,當塗佈底膠150於半導體元件130及 基板110之間時,常發生充填缺陷150a現象。例如,由於 底膠150具有較大黏稠度、流動緩慢,容易在銲料凸塊131 之間隙120中發生未填滿的現象,亦即產生空缺(void); 或者是底膠150本身殘留有微量空氣或水氣而形成氣泡 (bubble ),如第2D圖所示。 當在真空環境V中充填底膠150之後,本實施例之製 ❹造方法接下來進行至步驟S4,將基板110及半導體元件 130移送至常壓中,即大於1大氣壓左右之壓力中。由於 在步驟S3之充填底膠150的步驟中,此些充填缺陷150a 係在相對於常壓下壓力極小(小於約0.1大氣壓)的真空 環境V中生成,當基板110及半導體元件130移送至常壓 環境中時,底膠150所受之外部之壓力係遠大於充填缺陷 150a中之壓力,使得底膠150朝向充填缺陷150a内部聚 合,相對使得此些充填缺陷150a消失於底膠150中。如第 ¥ 2E圖所示,底膠150實質上係充滿於基板110及半導體元 件130之間。更進一步來說,底膠150係實質上充滿於此 些銲料凸塊131之間隙120内。 本實施例之製造方法接著較佳地更進行固化底膠150 之步驟。當底膠150固化之後,半導體裝置100中,底膠 150係完整包覆於焊接點(即銲料凸塊131及接墊111周 圍),係可提升底膠150改善烊接點耐受性之效果,進一步 提升半導體裝置100之品質。 200935526 半導體裝置100係可接續進行後方之製程步驟,例如 封膠(encapsulation )或電性連接至外部電路等步驟。 另外一方面,本實施例之製造方法中係可藉由依照本 發明實施例之底膠塗佈機台進行步驟S3及步驟S4,以形 成真空環境V、進行底膠150之塗佈,並且移送基板110 及半導體元件130至常壓中。請參照第3圖,其繪示依照 本發明實施例之底膠塗佈機台的示意圖。底膠塗佈機台 200主要包括一抽氣部件260、一塗佈腔230、一塗佈機構 © 240以及一出料腔250。塗佈腔230係連通於抽氣部件 260,抽氣部件260用以抽除塗佈腔230中之氣體,以維持 塗佈腔230小於約0.1大氣壓之真空狀態。塗佈機構240 用以於真空之塗佈腔230中塗佈底膠150於半導體元件 130及基板110之間。出料腔250設置於塗佈腔230之後, 用以將塗佈底膠150後之半導體裝置100由真空釋壓至常 壓,藉以可將半導體裝置100移出底膠塗佈機台200,以 便於進行接下來的各項半導體裝置100製程。當半導體裝 ◎ 置100在出料腔250中釋壓至常壓後,底膠150實質上充 滿於基板110及半導體元件130之間,此部分之内容係不 再重複敘述。 除此之外,底膠塗佈機台200更包括一進料腔210、 一預熱腔220及一第一及一第二移送部件271、272。進料 腔210設置於塗佈腔230之前,用以容置待塗佈底膠150 之半導體裝置100。抽氣部件260更用以抽除進料腔210 中之空氣,使得進料腔210形成真空狀態。預熱腔220設 11 200935526 置於進料腔210及塗佈腔230之間,用以接收抽成真空後 之進料腔210中的半導體裝置1〇〇。預熱腔22〇並用以加 熱半導體裝置100’以去除半導體裝置1〇〇中之游離水分。 抽氣部件260更用以抽除預熱腔22〇中之氣體,以維持該 預熱腔220為真空,以提高去除游離水分之效果。第一移 送。卩件271係用以將待塗佈底膠15〇之半導體裝置1 〇〇由 抽成真工後之進料腔21〇移動至真空之預熱腔220,並且 進而將半導體裝置由預熱腔22〇移動至塗佈腔23(^當半 〇導體裝置塗佈底膠150之後,第二移送部件272係用 以將半導體裝置100由真空之塗佈腔23〇移動至抽成真空 後之出料腔250。本實施例中係以不同之第一及第二移送 β件271、272為例進行說明,然而此兩移送部件271、272 亦可為相同之一移送部件,端視底膠塗佈機台之設計 需求。 較佳地是,進料腔210、預熱腔220、塗佈腔230及 出料腔250之間,分別利用一氣密閥門280相互分隔。當 氣选閥門280關閉時,進料腔21 〇、預熱腔220、塗佈腔 230及出料腔250係分別形成獨立之氣密空間。當欲由一 個腔體移動半導體裝置1〇〇至下一個腔體時,才將此兩腔 體間之氣密閥門280開啟,同時維持其他腔體間之氣密閥 門280為關閉狀態。舉例來說,欲將半導體裝置1〇〇移動 進入塗佈腔230中進行底膠150之塗佈時,才將預熱腔22〇 及塗佈腔230間之氣密閥門280開啟,並維持進料腔21〇 與預熱腔220,以及塗佈腔230與出料腔250之間的氣密 200935526 閥門280為關閉狀態。如此一來,係可維持各腔體之真空 狀態,尤其是確保半導體裝置100在塗佈腔230内,係為 真空狀態下進行底膠150之塗佈。 上述依照本發明實施例之半導體裝置之製造方法及 其底膠塗佈機台,係於真空狀態下進行塗佈底膠之動作, 並接著將塗佈底膠後之半導體裝置移至常壓狀態,如此一 來底膠材料係受到外界壓力的擠壓,並朝向底膠於銲料凸 塊之間隙中所產生的空缺移動,使得空缺消失。係可避免 〇 底膠中生成氣泡或空缺所產生的各樣問題,提升半導體元 件及基板間焊接點之耐受性,進而提升半導體裝置之品質。 综上所述,雖然本發明已以較佳之實施例揭露如上, 然其並非用以限定本發明。本發明所屬技術領域中具有通 常知識者,在不脫離本發明之精神和範圍内,當可作各種 之更動與潤飾。因此,本發明之保護範圍當視後附之申請 專利範圍所界定者為準。 〇 13 200935526 【圖式簡單說明】 第1圖繪示依照本發明實施例之半導體裝置製造方法 之流程圖; 第2A〜2E圖分別繪示依照第1圖中各步驟之基板及 半導體元件之示意圖;以及 第3圖繪示依照本發明實施例之底膠塗佈機台的示意 圖。 ❹ 【主要元件符號說明】 100 :半導體裝置 110 :基板 110a :上表面 111 :接墊 120 :間隙 130 :半導體元件 130a :下表面 Ο ¥ 131 :銲料凸塊 150 :底膠 150a :充填缺陷 200 :底膠塗佈機台 210 :進料腔 220 :預熱腔 230 :塗佈腔 240 :塗佈機構 200935526 250 :出料腔 260 :抽氣部件 271 :第一移送部件 272 :第二移送部件 280 :氣密閥門 V:真空環境The G-type flip-chip bonding technology has a shorter electrical connection path and has better electrical connection quality, which saves the area required for bonding the wafer on the substrate, so that the use of bumps as a wafer connection gradually becomes the current One of the important research directions in the industry. In the general flip chip bonding process, the germanium wafer is soldered to the substrate. However, 'Coefficient of Thermal Expansion (CTE) cannot be effectively matched due to the silicon wafer and the substrate material. When the process steps related to thermal cycling are performed, it is easy to cause heat at the solder joints. 5 200935526 The problem of mechanical fatigue is greatly reduced. The mechanical reliability of the solder joint between the wafer and the substrate. In order to solve the aforementioned problems, the current application of a primer in a flip chip package is widely used in the industry. The primer is wrapped around the solder joint to promote the thermal stress reset between the germanium wafer, the substrate and the primer, so as to reduce the strain of the thermal stress of the solder joint to increase the solder joint resistance. However, in the process of applying the primer (dispensing), air bubbles are often generated in the colloidal primer material. In addition, as the size of the semiconductor package is reduced, it is increasingly difficult to completely fill the (iv) between the wafer and the substrate. This is easy to cause the gap between the primers to form a gap between the solder joints, which affects the quality of the primer coating, so that the effect of the primer to improve the thermal stress of the solder joint is affected. Overall, the semiconductor package is reduced. quality. SUMMARY OF THE INVENTION The invention provides a method for fabricating a semiconductor device and a primer thereof. When a vacuum environment is applied to a pure semiconductor device and a semiconductor device is transferred to an atmospheric environment, the primer is not Yes: Bubble 'vacancy and other defects' can improve the quality of the coating primer, further improve the resistance of the component bonding and the quality of the semiconductor device. According to the present invention, a method of manufacturing a semiconductor device is proposed. The first is to supply a substrate and a semiconductor component. Next, a &amp;Du; semiconductor 70 piece and substrate are provided in a vacuum. Then, the substrate and the semiconductor 5 are exposed to normal pressure, so that the bottom knee is substantially filled between the substrate and the semiconductor element. According to the present invention, a method of manufacturing a substrate semiconductor device is provided. The first semiconductor component has a plurality of pads on its face. Secondly, the pads and solder bumps are provided to place the half = solder bumps. Next, the semiconductor element and the base member are flip-chip bonded to the substrate corresponding to the bonder. Re-supply - the bottom layer of the semiconductor component ^, empty. Then, the component and the substrate are lifted in a vacuum in a vacuum, and the second is exposed between the semiconductor components. The present invention is further filled with a substrate and a semiconductor. According to the present invention, a component, a coating chamber, and a coating machine, including a pumping gas, are used to evacuate the gas in the coating chamber. The suction member is used to apply a coating chamber to the vacuum coating chamber as a vacuum. The coating mechanism guides one of the semiconductor devices between a substrate and a substrate. After the discharge chamber is disposed to accommodate the half (iv) device coating cavity after the primer is applied, the above objects, features, and advantages can be more clearly as follows: the preferred embodiment of the cow and the accompanying drawings DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [Embodiment] The manufacturing method of the semiconductor device of the preferred embodiment and the filling machine of the present embodiment are filled with an underfill in a vacuum environment: a semiconductor element (semiconductor element) ) and between a board. Even if the primer is filled in a vacuum environment, bubbles or vacancies (_) are generated. When the substrate and the semiconductor element are moved to normal pressure, the primer 7 200935526 is pressed by the external pressure, facing the air bag _ + There is no air bubble or vacancy in the glue, so as to improve the charging movement, so that the bottom hole % repaired product is temporarily put forward according to the embodiment of the present invention as a detailed description, but the embodiment = as an example, does not limit the invention The scope of protection. Furthermore, the drawings of the embodiments also omit unnecessary elements to clearly show the technical features of the present invention. Please refer to FIG. 1 and FIG. 2 to FIG. 2 at the same time. FIG. 1 is a flow chart showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 1 is a diagram according to FIG. The substrate and the 70 parts of the semiconductor in each step are intended. The method of manufacturing the semiconductor device of the present embodiment is first shown in the step π. S1' provides a substrate 110 and a semiconductor device 130. As in the twenty-eighth embodiment, the substrate 110 provided in step S1 has a surface connection f with a connecting pad 111, and these potentials are Hi. For example, one of the upper surfaces of the two plates 110 is 〇a. Further, the β-element 130 provided in the step S1 is, for example, a semiconductor die </ RTI> and has a plurality of recordings; in the following 131, the solder bumps 131 are, for example, located on the surface 130a of the semiconductor element 130. 13 Next, as shown in step S2, the semiconductor=device 2 is mounted on the technical substrate 110. In the present embodiment, the semiconductor bumps 11 are soldered to the pads 111 by conventional flip-chip bonding technology to bond the semiconductor elements 130 to a wide area. In this embodiment, the bonded substrate 110 and the vehicle guides 〜 ̄ eh to m C9 袼玎 including the coating aid # are regarded as a semiconductor device 100. In addition, step s2 is the action of the 2009 20092626 agent and the heat reflow. The flux is applied to the pads 11A before soldering the semiconductor device 130. Next, the semiconductor element 130 and the substrate 110 are heated, and the solder bumps 131 are soldered back to the pads 111. After reflowing the solder bumps 131 and the pads 111, a plurality of gaps 120' are formed between the lower surface 130a of the semiconductor element 130 and the upper surface 110a of the substrate 110 as shown in Fig. 2B. After the step s2 is completed, the flux cleaning operation is preferably performed to remove the flux remaining on the solder bumps of the solder bumps 131 and the pads 111 to prevent the coal donor from affecting the reliability of the rear primer coating ( The step of coating the undercoat is described in detail later). After cleaning the flux, generally water remains on the substrate. Then, the manufacturing method of this embodiment proceeds to step S3 to provide a primer between the semiconductor device 130 and the substrate 110 in a vacuum. Step S3 can be performed, for example, in the following manner: First, the substrate 11 to which the semiconductor element 130 is soldered is placed in a vacuum environment V as shown in FIG. 2C; then 'coating the primer in the vacuum environment V 15〇 is between the semiconductor element 130 and the substrate 110 as shown in FIG. Here, it is possible to apply the conventional use of capillary force to drive the primer 150 into the gap 120 or other conventional dispensing methods, and the present invention is not limited thereto. In addition, the conventional primer 150 material, such as silica/epoxy resin, or other conventional primer materials used in the flip chip bonding technique can be applied to the present embodiment. . Further, in the vacuum environment V of the present embodiment, the pressure is preferably less than about 0.11 atmosphere (atm). In addition, the manufacturing method of the present embodiment can further heat the semiconductor device 1 in vacuum to remove residual moisture on the substrate 110 before performing step S3, and can effectively reduce the free moisture content to less than about 10%. . In step S3, when the primer 150 is applied between the semiconductor element 130 and the substrate 110, the phenomenon of filling defects 150a often occurs. For example, since the primer 150 has a large viscosity and a slow flow, it is easy to cause an unfilled phenomenon in the gap 120 of the solder bump 131, that is, a void is generated; or the primer 150 itself has a trace amount of air remaining. Or water vapor to form a bubble, as shown in Figure 2D. After the primer 150 is filled in the vacuum environment V, the manufacturing method of the present embodiment is next carried out to step S4, and the substrate 110 and the semiconductor element 130 are transferred to a normal pressure, that is, a pressure of more than about 1 atm. Since the filling defects 150a are formed in the vacuum environment V having a very low pressure (less than about 0.1 atmosphere) under normal pressure in the step of filling the primer 150 in the step S3, when the substrate 110 and the semiconductor element 130 are transferred to the normal When the environment is pressed, the pressure applied to the primer 150 is much greater than the pressure in the filling defect 150a, so that the primer 150 is polymerized toward the inside of the filling defect 150a, so that the filling defects 150a disappear in the primer 150. As shown in FIG. 2E, the primer 150 is substantially filled between the substrate 110 and the semiconductor element 130. Furthermore, the primer 150 is substantially filled within the gap 120 of the solder bumps 131. The manufacturing method of this embodiment is then preferably carried out further by the step of curing the primer 150. After the primer 150 is cured, in the semiconductor device 100, the primer 150 is completely covered on the solder joints (ie, around the solder bumps 131 and the pads 111), thereby improving the effect of the primer 150 to improve the resistance of the solder joints. Further improving the quality of the semiconductor device 100. 200935526 The semiconductor device 100 can be followed by a subsequent process step, such as encapsulation or electrical connection to an external circuit. On the other hand, in the manufacturing method of the embodiment, the step S3 and the step S4 can be performed by the primer coating machine according to the embodiment of the present invention to form the vacuum environment V, the coating of the primer 150 is performed, and the transfer is performed. The substrate 110 and the semiconductor element 130 are in a normal pressure. Referring to Figure 3, there is shown a schematic view of a primer coating machine in accordance with an embodiment of the present invention. The primer coating machine 200 mainly includes a pumping member 260, a coating chamber 230, a coating mechanism © 240, and a discharge chamber 250. The coating chamber 230 is in communication with the pumping member 260. The pumping member 260 is configured to evacuate the gas in the coating chamber 230 to maintain the coating chamber 230 in a vacuum state of less than about 0.1 atmosphere. The coating mechanism 240 is configured to apply a primer 150 between the semiconductor component 130 and the substrate 110 in the vacuum coating chamber 230. The discharge chamber 250 is disposed after the coating chamber 230 to release the semiconductor device 100 after the primer 150 is applied to the atmospheric pressure by vacuum, thereby removing the semiconductor device 100 from the primer coating machine 200, so as to facilitate The subsequent processes of the various semiconductor devices 100 are performed. After the semiconductor device 100 is depressurized to a normal pressure in the discharge chamber 250, the primer 150 is substantially filled between the substrate 110 and the semiconductor device 130, and the contents of this portion will not be repeatedly described. In addition, the primer coating machine 200 further includes a feeding chamber 210, a preheating chamber 220, and a first and a second transfer member 271, 272. The feed chamber 210 is disposed in front of the coating chamber 230 for accommodating the semiconductor device 100 to which the primer 150 is to be applied. The pumping member 260 is further configured to evacuate the air in the feed chamber 210 such that the feed chamber 210 forms a vacuum state. The preheating chamber 220 is disposed between the feed chamber 210 and the coating chamber 230 for receiving the semiconductor device 1 in the feed chamber 210 after being evacuated. The preheating chamber 22 is used to heat the semiconductor device 100' to remove free moisture in the semiconductor device. The pumping member 260 is further configured to remove the gas in the preheating chamber 22 to maintain the preheating chamber 220 as a vacuum to improve the effect of removing free moisture. First transfer. The 271 is used to move the semiconductor device 1 to be coated with the primer 15 〇〇 from the raw material feeding chamber 21 抽 to the preheating chamber 220 of the vacuum, and further to the semiconductor device from the preheating chamber 22〇 moves to the coating chamber 23 (after the semi-tank conductor device is applied with the primer 150, the second transfer member 272 is used to move the semiconductor device 100 from the vacuum coating chamber 23〇 to the evacuated vacuum The material chamber 250. In this embodiment, the first and second transfer β pieces 271 and 272 are differently illustrated. However, the two transfer parts 271 and 272 may also be the same one of the transfer parts. The design requirements of the cloth machine table. Preferably, the feed chamber 210, the preheating chamber 220, the coating chamber 230 and the discharge chamber 250 are separated from each other by a gas tight valve 280. When the gas selection valve 280 is closed The feeding chamber 21 〇, the preheating chamber 220, the coating chamber 230 and the discharge chamber 250 respectively form an independent airtight space. When it is desired to move the semiconductor device 1 to the next cavity by one cavity, The airtight valve 280 between the two chambers is opened while maintaining the airtight valve 28 between the other chambers. 0 is a closed state. For example, when the semiconductor device 1 is moved into the coating chamber 230 to apply the primer 150, the preheating chamber 22 and the airtight valve 280 between the coating chambers 230 are used. Opening, and maintaining the inlet chamber 21〇 and the preheating chamber 220, and the airtightness between the coating chamber 230 and the discharge chamber 250, 200935526, the valve 280 is closed. In this way, the vacuum state of each chamber can be maintained. In particular, it is ensured that the semiconductor device 100 is coated in the coating chamber 230 in a vacuum state. The method for manufacturing the semiconductor device according to the embodiment of the present invention and the primer coating machine are The action of applying the primer is performed under vacuum, and then the semiconductor device after the primer is applied is moved to a normal pressure state, so that the primer material is pressed by the external pressure and is directed toward the solder bump. The vacancy movement generated in the gap makes the vacancy disappear. It can avoid various problems caused by bubbles or vacancies in the primer, improve the resistance of the solder joint between the semiconductor device and the substrate, and improve the quality of the semiconductor device. In the above, the present invention has been disclosed in the above preferred embodiments, and is not intended to limit the invention. It is to be understood by those skilled in the art without departing from the spirit and scope of the invention. The scope of the present invention is defined by the scope of the appended claims. 〇13 200935526 [Simplified Description of the Drawings] FIG. 1 illustrates a semiconductor device in accordance with an embodiment of the present invention. FIG. 2A to FIG. 2E are schematic diagrams showing the substrate and the semiconductor element in accordance with the steps in FIG. 1, and FIG. 3 is a schematic view showing the primer coating machine in accordance with an embodiment of the present invention. ❹ [Main component symbol description] 100: Semiconductor device 110: Substrate 110a: Upper surface 111: Pad 120: Gap 130: Semiconductor component 130a: Lower surface Ο ¥131: Solder bump 150: Primer 150a: Filling defect 200: Primer coating machine 210: Feeding chamber 220: Preheating chamber 230: Coating chamber 240: Coating mechanism 200935526 250: Discharge chamber 260: Exhaust member 271: First transfer member 272: Second transfer member 280 : Airtight valve V: vacuum environment

Claims (1)

200935526 十、申請專利範圍: 1. 一種半導體裝置之製造方法,包括: ⑷提供一基板(substrate )及一半導體元件 (semiconductor element)置於該基板上; (b) 於真空中提供一底膠(underfill)於該半導體元件 及該基板之間;以及 (c) 暴露該基板及該半導體元件於常壓中,使該底膠 實質上充滿於該基板及該半導體元件之間。 ❹ 2.如申請專利範圍第1項所述之製造方法,其中於該 步驟(a)中,該半導體元件係電性連接該基板。 3. 如申請專利範圍第1項所述之製造方法,其中於該 步驟(a)中,該半導體元件係覆晶接合(flip-chip bonding) 於該基板上。 4. 如申請專利範圍第1項所述之製造方法,其中於該 步驟(b)中,真空中之壓力小於約0.1大氣壓(atm)。 5. 如申請專利範圍第1項所述之製造方法,其中於該 ° 步驟(a)之後,該製造方法更包括: (d) 清洗該基板及該半導體元件。 6. 如申請專利範圍第5項所述之製造方法,其中於該 步驟(b)之前,該製造方法更包括: (e) 於真空中加熱該基板及該半導體元件,以去除水 分。 7. 如申請專利範圍第1項所述之製造方法,更包括: (f) 固化該底膠。 16 200935526 8. —種半導體裝置之製造方法,包括: (a) 提供一基板,該基板之表面具有複數個接墊; (b) 提供一半導體元件,具有複數個銲料凸塊; (c) 對應接合該些接墊及該些銲料凸塊,以將該半導 體元件覆晶接合至該基板上; (d) 置入該半導體元件及該基板至真空中; (e) 於真空中提供一底膠於該半導體元件及該基板之 間;以及 ❹ (〇暴露該半導體元件及該基板於常壓中,使該底膠 實質上充滿於該基板及該半導體元件之間。 9. 如申請專利範圍第8項所述之製造方法,其中真空 之壓力小於約0.1大氣壓。 10. 如申請專利範圍第8項所述之製造方法,其中於 進行該步驟(c)之後,該半導體元件及該基板之間係具有複 數個間隙,於該步驟(f)中,該底膠實質上充滿於該些間隙 内。 ® 11.如申請專利範圍第8項所述之製造方法,更包括: (g)固化該底膠。 12. — 種底膠塗佈機台(underfill dispensing machine ),包括: 一抽氣部件; 一塗佈腔,該抽氣部件用以抽除該塗佈腔中之氣體, 以維持該塗佈腔為真空; 一塗佈機構,用以於真空之該塗佈腔中塗佈一底膠於 17 200935526 一半導體裝置之一半導體元件及一基板之間;以及 一出料腔,設置於該塗佈腔之後,用以容置塗佈該底 膠後之該半導體裝置。 13. 如申請專利範圍第12項所述之底膠塗佈機台,其 中該出料腔係可由真空釋壓至常壓,用以使該半導體裝置 暴露於常壓中,藉以使該底膠實質上充滿於該基板及該半 導體元件之間。 14. 如申請專利範圍第12項所述之底膠塗佈機台,更 ❹包括: 一進料腔,設置於該塗佈腔之前,用以容置待塗佈該 底膠之該半導體裝置,其中該抽氣部件更用以抽除該進料 腔中之空氣,以形成真空。 15. 如申請專利範圍第14項所述之底膠塗佈機台,更 包括: 一第一移送部件,用以將待塗佈該底膠之該半導體裝 置由抽成真空後之該進料腔移動至真空之該塗佈腔。 ® 16.如申請專利範圍第14項所述之底膠塗佈機台,更 包括: 一預熱腔,設置於該進料腔及該塗佈腔之間,用以接 收抽成真空後之該進料腔中之該半導體裝置,並且用以加 熱該半導體裝置,其中該抽氣部件更用以抽除該預熱腔中 之氣體,以維持該預熱腔為真空。 17.如申請專利範圍第12項所述之底膠塗佈機台,其 中該抽氣部件更用以抽除該出料腔中之空氣,以形成真空。 200935526 18.如申請專利範圍第17項所述之底膠塗佈機台,更 包括: 一第二移送部件,用以將塗佈該底膠後之該半導體裝 置由真空之塗佈腔移動至抽成真空後之出料腔。200935526 X. Patent application scope: 1. A method for manufacturing a semiconductor device, comprising: (4) providing a substrate and a semiconductor element on the substrate; (b) providing a primer in a vacuum ( Underfilling between the semiconductor device and the substrate; and (c) exposing the substrate and the semiconductor device under normal pressure to substantially fill the underfill between the substrate and the semiconductor device. 2. The manufacturing method according to claim 1, wherein in the step (a), the semiconductor element is electrically connected to the substrate. 3. The manufacturing method according to claim 1, wherein in the step (a), the semiconductor element is flip-chip bonded to the substrate. 4. The method of manufacture of claim 1, wherein in the step (b), the pressure in the vacuum is less than about 0.1 atmospheres (atm). 5. The manufacturing method according to claim 1, wherein after the step (a), the manufacturing method further comprises: (d) cleaning the substrate and the semiconductor element. 6. The manufacturing method of claim 5, wherein prior to the step (b), the manufacturing method further comprises: (e) heating the substrate and the semiconductor element in a vacuum to remove water. 7. The method of manufacturing of claim 1, further comprising: (f) curing the primer. 16 200935526 8. A method of fabricating a semiconductor device, comprising: (a) providing a substrate having a plurality of pads on a surface thereof; (b) providing a semiconductor component having a plurality of solder bumps; (c) corresponding Bonding the pads and the solder bumps to flip-chip the semiconductor device onto the substrate; (d) placing the semiconductor device and the substrate into a vacuum; (e) providing a primer in a vacuum Between the semiconductor device and the substrate; and ❹ (exposing the semiconductor device and the substrate in a normal pressure, the primer is substantially filled between the substrate and the semiconductor device. 9. The manufacturing method according to the item 8, wherein the pressure of the vacuum is less than about 0.1 atm. 10. The manufacturing method of claim 8, wherein after the step (c), between the semiconductor element and the substrate The method has a plurality of gaps, and in the step (f), the primer is substantially filled in the gaps. The manufacturing method according to claim 8, further comprising: (g) curing the bottom 12. An underfill dispensing machine comprising: a pumping component; a coating chamber for extracting gas in the coating chamber to maintain the coating The cavity is a vacuum; a coating mechanism for applying a primer in the coating chamber of the vacuum between 17 200935526 a semiconductor device of a semiconductor device and a substrate; and a discharge chamber disposed on the coating After the cavity, the semiconductor device is coated with the primer. 13. The primer coating machine according to claim 12, wherein the discharge chamber is capable of being released from vacuum to the vacuum. Pressing to expose the semiconductor device to atmospheric pressure, whereby the primer is substantially filled between the substrate and the semiconductor element. 14. A primer coating machine as described in claim 12 And further comprising: a feeding chamber disposed in front of the coating chamber for accommodating the semiconductor device to be coated with the primer, wherein the air extracting member is further configured to extract air in the feeding chamber To form a vacuum. 15. If the scope of patent application is The primer coating machine of claim 14, further comprising: a first transfer member for moving the semiconductor device to be coated with the primer to the vacuum chamber after vacuuming The primer coating machine of the invention of claim 14, further comprising: a preheating chamber disposed between the feeding chamber and the coating chamber for receiving the pumping 17. The semiconductor device in the feed chamber after vacuuming, and for heating the semiconductor device, wherein the pumping member is further configured to evacuate the gas in the preheating chamber to maintain the preheating chamber as a vacuum. The primer coating machine of claim 12, wherein the air suction component is further configured to remove air in the discharge chamber to form a vacuum. The lacquer coating machine of claim 17, further comprising: a second transfer member for moving the semiconductor device coated with the primer from a vacuum coating chamber to The discharge chamber after vacuuming. 1919
TW097105273A 2008-02-15 2008-02-15 Manufacturing method for semiconductor device and underfill dispensing machine thereof TW200935526A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11004696B1 (en) 2020-02-13 2021-05-11 Actron Technology Corporation Method for manufacturing power diode

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11004696B1 (en) 2020-02-13 2021-05-11 Actron Technology Corporation Method for manufacturing power diode

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