TW200923615A - System and method for dynamically selecting clock frequency - Google Patents

System and method for dynamically selecting clock frequency Download PDF

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Publication number
TW200923615A
TW200923615A TW97142625A TW97142625A TW200923615A TW 200923615 A TW200923615 A TW 200923615A TW 97142625 A TW97142625 A TW 97142625A TW 97142625 A TW97142625 A TW 97142625A TW 200923615 A TW200923615 A TW 200923615A
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TW
Taiwan
Prior art keywords
frequency
peripheral interface
clock signal
system
signal
Prior art date
Application number
TW97142625A
Other languages
Chinese (zh)
Inventor
Santosh Kumar
Original Assignee
Mcm Portfolio Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Priority to US11/941,021 priority Critical patent/US20090132837A1/en
Application filed by Mcm Portfolio Llc filed Critical Mcm Portfolio Llc
Publication of TW200923615A publication Critical patent/TW200923615A/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 – G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08Clock generators with changeable or programmable clock frequency

Abstract

A system and method for dynamically changing the clock frequency of a system clock is disclosed. The invention includes selecting a peripheral interface clock signal from a plurality of currently active peripheral interface clock signals, each operating at a particular frequency. The selected peripheral interface clock signal operates at the highest frequency of the plurality of currently active peripheral interfaces clock signals. Once selected, the frequency of the system clock is set equal to the frequency of the selected peripheral interface clock signal.

Description

200923615 IX. Description of the invention: [Technical field of the invention], and the present invention, the clock frequency of the processing system is particularly relevant; for the processing system, a clock frequency is selected from a plurality of peripheral interface clock signals. Method and device. [Prior Art] > Today's processing systems have been able to interface with many different peripheral interfaces such as Ethernet interface, USB interface and SATA interface. The processing system, by means of a mechanism called hot plugging (i.e., whether the processing system can check whether the peripheral device is removed or connected), is to remove or connect the peripheral device without being turned off. However, each of the peripheral devices will use different and different devices, so that the peripheral interface and the processing system need to be operated at different times to transmit and receive data. Unfortunately, traditional processing systems both communicate with multiple peripheral devices using different communication protocols. In 2 cases, a standard USB interface device will operate at 60MHz, and the standard SATA interface device will operate at 150MHz, and the traditional processing system will be required to operate and SOMI. ^z ' to support USB interface and SATA interface device respectively. However, unfortunately, the problem occurs when the processing system is operating at 6 〇 MHz to communicate with the usb device and the other peripheral device at different frequencies is connected to the system. For example, the device is pulled out and the SATA device is connected to the traditional processing system because of the operating frequency.

3019-10131-PF 200923615 = It is not possible to support the operating frequency required by the sm peripheral interface ::, ..., and change the operating frequency to change any peripheral interface. Therefore, although the traditional implementation of hot plugging and unplugging peripheral devices, but the system can be free to connect the clock frequency. As a result, when the processor is operatively connected to such a processing system, it will encounter a problem. The device is passive. In view of the above problems, a system and method for operating the frequency of the kinetic energy system are generated. It is a kind of processing system that can provide - :=' the peripheral device of the system to dynamically adjust the processing to the processing to shut down the processing system. - The frequency is not required. [Inventive content] Generally speaking, the present invention solves the above-mentioned problem by providing a dynamically self-side interface clock frequency in the helmet/pre-" In the system, and the system clock frequency is 1:1, the present invention discloses a dynamic selection of the 4± method. The present invention includes the steps of selecting a -signal from a plurality of currently operating interface interfaces of the :::frequency:. The one: two...' system clock signal is set to be the same as the selected peripheral medium. The selected peripheral interface clock signal is the current #AA, and the highest and lowest in the clock signal of the state interface of the state, the current system is smeared ~ take the lower ^ ^ , , t D again Hey. In general, each peripheral interface clock is rotated by a peripheral interface. So once the system clock

The frequency of 3019-10131-PF 200923615 is set and provided with 仏/ '5 processing system, the unselected peripheral interface 1 can be turned off' so that the processing system can operate on the frequency of the surface clock signal. The system is based on another embodiment of the system of the pulse frequency. This system discloses a dynamic selection system at a specific frequency. m1, 丨田# 刼 刼 T胍h諕 selection circuit Coupling each side, can provide a system clock transmission, the main mother and the surrounding interface, the pulse signal selection: electricity: external machine • interface - take - operation at the highest clock frequency and:: medium = surface The state opportunity selects the clock selection circuit to set the system clock to the second rate: = the selected peripheral interface frequency. The system sighs as the generator, and each one is connected to a peripheral = clock signal generator can provide A specific frequency " face. The mother-one clock signal produces,,, the shoulder pulse signal to a peripheral interface. In this 'X Ming another-additional embodiment ^ method of clock frequency. These 15 kinds The interface of the peripheral interface of the dynamic and evil change system... In the state of 14 彳I _ / then "the tiger's peripheral interface clock signal selects an L, the eye is just moving ii ® fl# ^ ^ a QI. As above, selected The weekly W-Min 遽 is operated at all the highest frequencies. Once selected, the clock signal of the surrounding interface in the middle of the 成 is selected as the disk... The frequency of the pulse signal is set to be the peripheral interface of k. The clock signal of the clock signal interface will be turned off. In the example, the frequency of the clock signal can be dynamically adjusted according to the connection to the processing system (4). 3019-10131-pf 7 200923615 [Embodiment] The above described objects, features, and advantages of the present invention will become more apparent and understood. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The following is a description of the preferred embodiments of the present invention. Specific way, not available To limit the scope of the present invention. / The disclosed invention dynamically selects the clock signal of the (four) system. In general, the embodiment of the present invention may be a processing system from a plurality of preset peripheral interface clocks. The dynamic selection of the one-time pulse frequency in the signal frequency = in the description of the surface 'in order to provide a complete understanding of the invention, and promoted a special detail description of § noon. But drought, ,, for those who know this technology It is obvious that the present invention can be implemented in the specific details of some or all of the present invention. In the present invention

x. In other parts of the brothers, in order to avoid unnecessary confusion to the present invention, the processing steps that are both well-known and not known are not carefully explained. 1 is a block diagram of a process system 103 for dynamically selecting a clock signal frequency ", system, first 1 〇 0" in an embodiment of the present invention. System 100: includes a transit to state machine 1~ Clock signal generation circuit! Wide to mn clock source 1〇1. State machine 1〇2

Processing system 1〇3, one clock signal selection, and multiple peripheral interfaces to 1G5n. Each of the peripheral interfaces is 1G to the same as the processing system, and the system is connected to the clock signal generating circuit 2:

3019-10131-PF 8 200923615 1 04η and clock signal selection circuit 1 〇6. During operation, the clock source 101 provides an external clock signal frequency f clock 1 07 to the state machine 1 〇 2, the clock signal generating circuit 1 〇 4a to 1 〇 4π and (not necessary) directly to one Peripheral interface, such as the peripheral interface l〇5b. The clock signal generating circuit 1 〇 "to 1 〇 4n generates clock signals 1 〇 8 & to 108 η ' to support communication of the peripheral interfaces 1 〇 4 to 1 〇 5 n. The clock signal generating circuits 1 04a to 104n can be any The circuit is designed to become a circuit that generates a clock signal frequency according to an external clock signal frequency fclock 1〇7, such as a phase locked loop circuit. Although the clock signal generating circuit 10" to 1〇4n generally provides a clock. The signals 108a to 108n support communication of the peripheral interfaces 1〇5& to 1〇5n, and some of the peripheral interfaces 1G5a to 1G5n may not require the use of the clock signal generating circuit 104. Depending on the frequency of the external clock signal fcl〇ckl〇7, a specific peripheral interface 1G5 may directly use the external clock signal m. For example, in the example of the figure i, the frequency of the outer boundary clock signal fclGck 1Q7 provided by the clock source (8) matches the frequency of the clock signal required to support the peripheral interface 105b, and the periphery is from i〇 5b is directly connected to the external clock signal felQekm, without the need to use the clock signal generation circuit. Because in the first! In the illustration of the figure, the source of the clock signal...

The clock frequency of the edge signal fclock 107 does not match the frequency of the clock signal supporting the peripheral interface H. Therefore, the clock signal generation circuit is permanently connected to the day 7 pulse k source 1 〇 1 and the peripheral interface 1 〇 5 b between. Each of the peripheral interfaces 105a to 105n is further coupled to the pulse signal selection circuit (10), and the clock signal selection circuit (10) is also the same (4) to the state machine ι〇2 3〇19-10131-Pf 9 200923615 and Processing system 103. Clock signal reception - clock selection signal η;: to one / six is pulled KA b outside '3 inch pulse signal selection circuit 丨 0 6 According to Dinghu & select k from the state machine 102 is connected to # The signal 110 is prepared to the processing system 1〇3. ‘, ^ In more detail, the clock can be broadcasted. (4) The sacred 4 circuit (10) will be selected based on the % pulse selection signal (1) received from the parameter = 〇 2 - the specific peripheral interface _ to the job. The clock selection signal (1) can contain U (one) bits and allows 2η彳in handles, true a, Λ f to have a peripheral interface 1〇5& to ι〇5η pulse signal selection circuit! 〇 6. For example, the following example: the second, the right 4 • pulse selection signal 丨 2 j and 3 bits, there are 8 peripheral interfaces 1 〇 $ 1 ~ r (10) to 105 η can be coupled to the clock signal selection Ray Road] 〇Α. Six + μs. Tower 1 Ub In this example, the clock signal selection circuit 106 receives a value of . Hey. When the clock select signal (1) is selected, the processing system 103 is supplied with the peripheral clock signal 1〇9a as the system clock signal = 11 〇. Similarly, if the clock signal selection circuit i〇6 receives the clock selection signal 111 having a value of 0M, the processing system 1〇3 is supplied with the peripheral clock signal 1 0 9 b as the system clock signal 1J 〇. The state machine 102 monitors and processes the peripheral interfaces l〇5a to l〇5n of the active pass 1 between the processing system 丨03. Upon detecting a change in the state of any of the peripheral interfaces 1〇5a to I 〇5n, the state machine 会2 uses a reset signal 112 to force the processing system 103 to enter a known operational state and indicate the time of shame selection. The circuit 106 changes the system provided to the processing system 1 〇3, and the time will be described in detail later. 13 ; b In an embodiment, the state machine 1 〇 2 can be designed to use the wide 3019-10131-PF 10 200923615 number 118 to select the actuable peripheral interface

Frequency of. For example, in the embodiment/to 1.511, the lowest signal or the lowest signal receives a value of 10 temples. (1) The state machine 102 purchases the peripheral interface from the UI to the most non-clock signal selection circuit (10), UIrn , , ^ Coincidence of the clock signal frequency value, and receiving a value from the in仏唬 118 circuit 1〇6 provides a peripheral interface 105ailM曰 indicating the 4-pulse signal selection value. In addition, "machine iQ2 can know the minimum pulse signal frequency 1nK t ^ know that all peripheral interfaces l〇5a i 1 〇5η and the processing system i 03 are helmeted clock-induced tM-# · η q L . When communicating, turn off ': 113, which will be explained in detail later. Figure 2 is a flow chart showing a method 200 of the present invention, which can dynamically and dynamically change the frequency of the clock signal supplied to the 时 system. In an initial step 202, a _ pre-sound in processing operation is performed. For example, the cuttings & fine work may include gas soil + place / d, system, load boot data and other ... π this technology is read by the present invention.义 ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” ” 1Q5n is monitored. By monitoring the state of the interface ma to (10), the state machine (10) :: decides when the peripheral interface 105u 105n changes state. In this manner, state machine 102 can determine, for example, a certain week: when the device is connected to a particular peripheral interface 1〇5& to remove it. 4, please refer back to FIG. 2 again. In operation step 205, it is determined whether or not 3019-1013!, PF 11 200923615 has any peripheral interface state changed as described above, and the sad machine 102 monitors the parent peripheral interface l〇5a to 〇 5 U5n detects when the state of the peripheral interface 105a to 1 ϋ 5n changes. Right--the state of the peripheral interface has been changed. Mai, this method will enter / v 208. Otherwise, the method 20〇 advances to the next step 2 〇 6. In operation step 206, the processing of the Fengshudu #, Li, and the first operation is performed on the same frequency. Thinking that 'when any peripheral interface can be Βί ^ ^ ^ ^ The heart has not changed, the system clock k will remain unchanged. As a result, η ΑΑ , processing system 103 will continue to operate at the same frequency. The state machine 1 〇2 is connected to another operation step 204. Only the inch, the, and the shell 1 measure the peripheral interface in the operation. If the state changes 'in step 2〇8, it will be determined whether a double or more peripheral interfaces are made to include multiple peripheral interfaces 1 (^ to 1〇5n gates as above - 'this system can be φ ^ , έ, . 3n. Therefore, in operation 208, the sinister decides whether there is a > 柞 沾 沾 ^ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + The method 200 will proceed to the next step as step 210. The method will enter the operation step 21, and the frequency of the #TM / 时 clock signal is set to occur with the state of the peripheral interface ^ x ... in the target operation. When the peripheral interface 105a is moving, the state opportunity indicates that the clock two peripheral interfaces are currently set to have the same frequency as the current operation selection circuit to the system clock signal η + peripheral interface. However, in operation Step 212 When the interface is active, I have a 'If there is more than one encounter, and the peripheral interface of performance will be decided.

3019-10131-PF 12 200923615 Set it out. Referring again to Figure 1, when the measured state changes and more than one of the peripheral interfaces 1 〇 5 a to 1 0 5 η is currently active, the state machine 102 will determine the periphery with the highest clock signal frequency. Interfaces 1〇5a to 105η. As described above, each of the peripheral interfaces i〇5a to ι〇5η may have a different clock signal frequency according to the clock signal provided by the pulse signal source 01 or the clock signal generating circuit 1 〇 4a to 1 〇 4η. . In operation 212, the state machine 102 determines which peripheral interface 1〇5a to 1〇5η is active at the same time and has the highest clock signal frequency among the peripheral interfaces 1〇5& to 1〇5η during the target operation. .

Referring to Figure 2, in operation step 214, the clock t唬 frequency is set to be the same as the frequency of the peripheral interface having the highest clock frequency. I read the new item in the new food, state machine i. 2, by the clock selection signal 111, a series of instructions are sent to the clock signal selection circuit 丄 (10), so that the frequency of the % pulse signal 110 becomes the same as the periphery with the highest clock frequency " faces 105a to l〇5n The frequency (as determined in operation 212) is followed by the frequency of the phase signal 11(), and the processing system 103 begins to use the new frequency. Although the processing flow of selecting the highest clock signal frequency is shown in the example in FIG. 2, it is to be noted that, for example, the shape machine 1 Q 2疋 can be set to select the lowest time according to the UI signal 118. Pulse signal frequency. The ice map does not. In the case of the situation-1, only the peripheral interface Ml and other peripheral interfaces are secretive to _all are not + 彳 in 3& the state machine 102 will indicate the clock signal selection "6 provided The peripheral clock signal 109a to the processing system 1〇3 is used as the 3019-10131-ρρ 200923615 system clock signal 110. Similarly, in the case where the situation ~2 and the peripheral interfaces 105b and 10511 are respectively active, only all of them are inactive. In these cases, "the peripheral interface indicates the clock signal to select the electric material:: the edge state machine and 1 _ to the processing system 1G3 to be divided:: rM; #bl〇9b AU, , 1 show, dead knowing pulse Signal 1 1 〇 In the case of situation -4 'peripheral interface i 〇 5a is active. Here, state machine m will indicate:: "peripheral clock required by face (10) ^; first true 103' because of the surrounding In the example where the peripheral clock signal required for the purchase is higher than the peripheral interface, the peripheral interface coffee and coffee are both in the middle. Here, state machine 102 will indicate that the peripheral clock signal is provided! 09η everywhere 1〇6 face 1nR .. ^ 不汍103, this is because the peripheral η Μ 周边 周边 周边 1 1 1 需要 需要 需要 需要 真 真 真 真 真 真 真 真 9 9 9 9 9 9 9 9 9 9 9 Frequency. Similarly, at the status/interfaces l〇5a and 1〇5, the state machine 102 will indicate that the teacher number is active. The frequency of the peripheral clock signal required by the pulse W 1G9n to the processing system 边, edge % 1〇9n = 疋 because the peripheral clock signal frequency l09a of the peripheral interface is in the peripheral interface _ required in the case of the situation -7, At the same time, they are all active. In this case: interface (10), view and l05n signal selection circuit 106, state machine 102 will indicate clock (10), because the peripheral clock signal; ^ \ pulse signal (four) to the processing system & rate 1 0 9n at the same time Higher than the peripheral clock 3019-10131-pp 14 200923615 Signal frequency 109a and l〇9b. Referring back to Figure 2, in operation 216, the remaining peripheral interfaces are closed. Once the system clock η 〇 is set to the highest active mid-range clock signal frequency, the state machine 1 〇 2 uses the reset signal Π 4 a to 114 η to turn off the remaining modulator 2 .迥 丨; 丨 face. That is, the state machine 会 2 will send the reset signal uu114n to the remaining peripheral interfaces 105ai 105n that are not operating at the highest clock signal frequency. For example, in the case of Fig. 3, the peripheral interfaces 105a, 1〇5u1〇5n are active. In addition to the non-clock signal selection circuit (10) providing the peripheral clock signal frequency to the processing system 103, the state activates the reset signals U4a and 114b' sent to the peripheral interfaces 1〇53 and Yangshuo to respectively close the peripheral interface chest and 105b. State machine 102 can also use low power signals 119 & η% to force more than one peripheral interface 丄〇 5a through 1 (10) into low power mode f. For example, in the case-4, the peripheral interface core and the leg are simultaneously active, and the clock signal frequency + 1 〇 gb is supplied to the processing system 1 〇 3 ° where the 'big picture machine 102 is activated and sent to Low power signal (10) of the peripheral interface 1〇5a. Similarly, in the case of status_7 and status_6, the low-power signals U9aAU9b sent to the peripheral interface and 嶋 are also activated, respectively. " Then in operation step 218, a post-processing operation is performed. For example, the 6-brothers' post-processing operations may include making progress on the peripheral interface state in the active-step two-step change of the system clock signal frequency and other post-processing operations that are well known to those skilled in the art after the present invention. Figure 4 shows the state of the invention - in the embodiment, when the state machine

3019-10131-PF 200923615 More than one peripheral interface contains the flow chart of operation method 4 (10) when the communication is active. The pre-processing operation was performed in the initial operation step. For example, a pre-processing operation may include selecting a particular peripheral interface frequency for subscription support, and other pre-processing operations that are well known to those skilled in the art after reading the present invention. In operation 404, a power-on reset signal is received and the state machine is set to the idle state. Referring again to the figure, upon receiving the power-on reset signal 12〇, state machine 1〇2 can be programmed to operate in the initial power-on mode, and init-Sig(4) is also used to force the state machine. 1 02 enters an idle state. It is worth noting that the InH_Slg signal 115 can be generated using a Lexon or by the state machine in a detailed step 406, which determines whether the actuation is greater than i or equal to W. Here, the state machine 1〇2 monitors the number of active midweeks = '| faces 1〇5& to 1() 5n. If the number of actuation interfaces is greater than one, the flow proceeds to operation 420 where the operation of steps 212, 214, and 216 in method 200 is performed. After that, continue to choose your cattle ° and then continue the operation steps. When the number of 中介 中介 乍 等于 等于 等于 等于 等于 等于 等于 等于 数 数 数 数 数 系统 系统 系统 系统 系统 系统 系统 系统 系统 系统 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬 唬State machine 1 〇 2 match, * 4 days Whether the signal frequency can support the system clock to the processing system. If the peripheral interface:: The frequency of the peripheral interface in the operation. For example, a疋 the only peripheral interface in operation, state machine

3019-10131-PF 16 200923615 102 will confirm the frequency of the surrounding clock signal is the same. If the morning & the frequency of the 疋 疋 舆 舆 舆 舆 舆 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 如果 406 406 406 406 406 406 406 406 406 406 406 406 406 406 406 406 406 406 406 The number of i 〇 5n. This process will continue to operate. In the operation step 4, ’, V % 41 〇. The pulse signal frequency is not equal to, know 7. When the system is in operation, the peripheral device 102 will generate a switching finger frequency, and the state machine will be ordered. In operation 412, ... then the reset signal 112 is turned on for the processing system qnq ψ state machine 102 i 〇 3 to enter a known sag with + 103 to make the processing system awkward. In the known step 4, the clock is also selected as 轳ηι.,, s ± 甲 恶 102 102 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 111 Pulse n1{)< Ensure that the sheep are cut at different frequencies for a period of time after the time is met; the preset delay of the 'pulse interference' will be in the pre-:...to the new clock signal frequency. After the operation step (4) 8 system 1 〇 3 Χ (9), the reset signal 112 will be turned off to enable the 、 and 新 to communicate with the newly actuated peripheral interface. In the operation step y spoon 422, a post-processing operation is performed. For example, post-processing operations may include application processing by the processing system, continuous monitoring of peripheral " faces via state machines, and post-processing operations explicitly inferred by others skilled in the art. FIG. 5 shows a private chart of the operation mode of the state machine 102 when the processing system communicates with any of the peripherals in an embodiment. A pre-processing operation was performed in an initial operation step 5 〇 2. For example, the processing operations may include a power supply to receive a reset signal, a further power-on operation, and other pre-processing operations that are well known to those skilled in the art after reading the present invention at 3019-10131-pp 17 200923615. An abort command is generated in operation 504. Going 1〇^ does not interact with any of the peripheral interfaces (10) to (4) ^:::: electricity: will generate - abort command 116 and force system 1. . Electric type. Further, at operation 5G6 t, the clock signal 113 is turned off. In operation step 5〇8, the user or the main system restores the state 117 ’ and turns on the state machine 1. 2 Perform an action of confirming whether the state of the surrounding media changes from 53 to 1 〇h. In the case of 510, when the state changes of any of the peripheral interfaces 105a to 1〇5 are detected, the makeup device 102n activates the clock enable signal 113 to set t遽112 to force the processing system to operate. One:. In operation 512, a certain length of the segment is waited for. In operation 514, the tongue f is expanded 11〇 and at operation 516; the second is closed to activate the processing system. The post-processing operation may include. For example, in the moving peripheral interface, the state of the interface is determined, and the frequency of all the settings to all the active midweeks = frequency, the system clock signal frequency technique is read, and the frequency of the two is read. Other well-known post-processing operations are well known to the present invention. The scope of the present invention, any two of which are as described above, are not intended to limit the spirit and scope, and may be made:: The changer's modification and retouching of the applicant's scope is not deviated from the scope of protection of the present invention. Therefore, the τ of the present invention is defined by the scope of the patent. BRIEF DESCRIPTION OF THE DRAWINGS 3019-10131-ρρ 18 200923615 FIG. 1 is a block diagram showing a system for dynamically selecting a clock signal frequency for a processing system according to an embodiment of the present invention; FIG. 2 is a view showing an embodiment of the present invention. In an example, a flow chart of a method for dynamically changing the frequency of a clock signal of a system provided to a processing system; FIG. 3 is a diagram showing an exemplary condition and periphery generated according to a peripheral clock signal frequency and a peripheral interface state in an embodiment of the present invention; a relationship table for interface selection; FIG. 4 is a flow chart showing an operation method when the state machine and one or more peripheral interfaces are in communication during operation in an embodiment of the present invention; and FIG. 5 shows the present invention. In one embodiment, a flow chart of a method of operation of the state machine when the processing system is inactive communication with any of the peripheral interfaces. [Main component symbol description] 1 〇0~ system; 103~ processing system; 10 2~ state machine; 104a-104n~ clock signal generating circuit; 101~clock signal source; 106~clock signal selecting circuit; 105a- 105n~ peripheral interface; 1 0 7~ external clock signal; 1 08a~1 0 8η~ clock signal;

3019-10131-PF 200923615 111~clock selection signal; 11 0~ system clock signal; 109a-109n~ peripheral interface clock signal; 118~UI signal; 11 3~clock enable signal; 114a-114η~ heavy Set signal; 11 6~ stop signal; 120~ power on reset signal; 112~ reset signal; 11 7~ resume signal; 115~111丨1; _8丨 signal; and 119a-11 9η~ low power signal. 3019-10131-PF 20

Claims (1)

  1. 200923615 X. Patent application scope: 1. A dynamic change system clock signal includes the following steps: The method of the day-inch pulse frequency Peripheral; | face knowledge pulse signal, each of which - Cheng Fang; the face of the pulse signal operation at a special frequency; and the frequency of a system clock signal is only a thousand - and equal to the selected periphery " Surface clock signals have the same frequency. 2. The method of claim 1, wherein the selected peripheral interface clock signal is operated at F. Mourning the highest frequency of the peripheral interface signal in the current operation. 3. For the method of applying for patent scope 1, 乐贝, 斤逆, wherein the selected peripheral interface clock signal is operated at the lowest frequency of the peripheral signal of the peripheral interface in the 刚目目. 4. The method of claim 1, wherein each peripheral clock signal is output by a peripheral device. 5. As described in the patent application section 4, the method further includes the steps of: closing the unselected peripheral interface. 6. The method of claim 4, wherein the method further comprises the steps of: generating a clock signal supplied to a plurality of peripheral interfaces, wherein each of the pulse signals is generated according to an external clock source . 7. The method of claim 3, wherein the system is 3019-10131-PF 21 200923615 pulse "is 5 tiger system provided to _processing preparation ^ ^ ^ ^ ^, 糸 system, and the processing system Operating on the frequency of the selected peripheral interface clock signal. 8 · a kind of dynamic change system", the system of the clock frequency of the first pulse signal, the peripheral interface of the complex and the peripheral, the upper side of the parent and the surface operate on a specific frequency, a clock signal selection circuit, and signal selection The circuit provides - the Li mother-peripheral interface 'the clock signal of the clock system; and a state machine, coupled to each of the side of the 'side' and the δ Xuan time pulse for the lack of Φ road, wherein the state machine one / Red and red selects the peripheral interface of the electric motor, and refers to the frequency of the eight visits ±, the frequency of the signal of the Ai Shou pulse signal is set to the same frequency as the peripheral clock of the system clock. Declaring the pulsation signal generator described in Item 8 of the patent circumference, each Β*# > , ,, '4, and including the plural π pulse k number produces a cry. Each clock signal produces f °〇到—peripheral interface, the clock signal to the peripheral interface circuit is operated at each of the specific frequencies. The pulse signal generating circuit according to claim 9 is the system of the patent application. Said in the δ term : Clock is supplied to the processing system very ',' 12. The patentable scope of application of the item 11 "machine capable of providing a reset signal to the first state ,, the Mi enters a known state 1. y^Forcing the edge processing system 13. As in the scope of patent application No. 8 糸, where the state 3019-10131-PF 22 200923615 will close the unselected peripheral interface. 14. The system of claim 13 wherein the state machine further places the unselected peripheral interfaces in a power saving state. 15. A method of dynamically changing a clock frequency of a system clock signal, comprising the steps of: monitoring a peripheral interface in a plurality of active and inactive phases of a peripheral interface clock signal to detect the periphery of the actuation and non-actuation The state signal of the peripheral interface of the interface changes by 1 in each peripheral interface clock signal operates at a specific frequency; when a state change is detected, the self-reset 曰2, + slave number 周边 actuation peripheral interface In the clock signal, a peripheral interface clock signal is selected, and the selected peripheral signal of the peripheral interface operates on the most two frequencies of the clock signal of the 坰τ avoiding interface in the actuation, and The selected neighboring medium sets the frequency of a system clock signal to be the same as the frequency of the surface clock signal; and V closes the unselected peripheral interface clock signal. 16. The method described in claim 15 of the patent application, wherein Each peripheral interface is circumscribed by a peripheral interface. § If the patent application scope is 16, the kinetic energy of the system can change the system clock signal. The method of clock frequency, whiter & ambiguous ambiguity, 卞 卞 括 括 括 · · · · · · · · · · · 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. 18. The method further includes generating a supply to the plurality of neighboring day signals, wherein each time 3019-10131-PF 23 200923615 pulse signal is generated according to an external clock source. 1 9. The method as described in claim 15 of the patent application is provided to a processing system whereby the processing is performed on one of the peripheral interface clock signals. 20. The method of claim 15, wherein the processing system is set when the frequency of the system clock is set to be the same as the frequency of the clocked signal. :, wherein the system operates on the -, and further includes the following: selecting the peripheral interface to define a known shape 3019-10131-PF 24
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