TW200921403A - Method and procedure for detecting cable length in a storage subsystem with wide ports - Google Patents

Abstract

A mechanism detects cable length in a storage subsystem with wide ports. The mechanism uses in-situ bidirectional cable wrapping for determining different cable lengths. The mechanism under-margins transmitter output to failure for each external port and even for each PHY within a wide port. Based on the transition point from "good" wrap to "bad" wrap, the cable length may be determined. The transition point identifies if the cable is long or short, at which point the optimum tuning parameters can accordingly be set. A calibration mechanism calibrates the high speed transmitter/receiver pair characteristics, and, thus, optimizes the transmission performance between subsystems. The calibration mechanism mitigates the need for frequent error correction and does not incur the performance degradation associated with error correction techniques.

Description

200921403 VI. Description of the Invention: [Technical Field of the Invention] This application relates to an improved data processing system and method. In particular, the present application is directed to a method and program for detecting cable length in a storage subsystem having a wide volume. [Prior Art] In a storage network system, a high speed serial differential interface is used to connect a plurality of storage components. For example, in the BUdeCenter® product from ΙβΜ, a serial connected SCSI (serialattachedscsi, SAs) switch can be connected to an external storage device by a poetry blade server, such as a typical storage package. The SAS switch can be connected via an internal high speed configuration. The SAS switch is connected to the external storage device via an external (four) line. , in general, multiple cable lengths are required to connect to storage devices at different distances from the SAS switch. The first release of the first BladeCenter® storage product may require a “short” cable (eg 3 Λ ^ and a “long” material (eg 11 m long). After that, the storage may require a longer cable. For example, the length of the high-speed interface is increased. As the transmission rate is increased, it is necessary to adjust the transmitter/receiver selectively, for example, to pre-emphasize and reduce the strength: it is difficult to simultaneously optimize the cable length. Huachang, 4 200921403 The fast interface of the new cable. Therefore, it is necessary to determine the length of the cable connected to each of the sas exchangers. In addition, some scenarios may occur in which unintentional or It is possible to intentionally replace the short cable with a long cable.

These different cable lengths may be due to static pre-planned cable routing procedures or may be due to dynamic cable exchange at the user's location. To accommodate these different cable lengths, it is necessary to dynamically determine a SAS switch. And the cable length between the external storage devices. Several methods have been proposed and implemented in the prior art. For example, some Fibre Channel rules apply a built-in VPD ( vital product data) circuit that contains cable length information. This approach is only implemented by cables that are connected using small form factor pluggable (SFP). Whether the cables are fiber optic or copper, it is always necessary to use some kind of cable VPD to achieve cable length information. The cable vpD can only be used via some out-of-band interface embedded inside the high-speed cable. access. In addition, the latest SAS cable layout technology adopts the concept of “wide”. A wide 组成 consists of multiple lanes or physical transceiver components (phy). Now the 'SFP is designed for a single flaw. Providing a wide SFp for fiber optic 难以 is difficult to achieve. For example, a four-width 珲 may require four laser emitters and four receivers. It is more feasible to use a wide SFP for copper cables, but it will require a lot of cost. It should be noted that whether it is optical fiber or copper wire, SFP needs a foreign interface 'so far' such interface has not been standardized 200921403 Or not implemented. An idling serial interface - such as / can also be connected to the bit error rate (BER) is ΐχΐ〇-ΐ 2 ( _ ▲ (<# lose 1 (> 2 bit ' appears - times error The sound of this shirt is still speeding up. The production is G. The impedance caused by accidental electrical discontinuity in the transmission path is sturdy, the same speed drive/receive circuit defects, due to the connector pins Bending or inferring the mismatched connection caused by the knowledge of the fault, due to mechanical or installation problems, the connection is not matched, and the signal coupling between adjacent signal paths. After testing, individual components can reach a performance range. However, the accumulation of tolerances may result in a double sorrow reduction beyond the nominal design goal. Usually, the performance parameters are guaranteed by the manufacturing process, and not 1%% of the tests are accepted. Therefore, there may be specific defects. Under the circumstances, all the above problems are tested and verified by the interconnect and subsystem manufacturers. However, this is usually not the case, and these defects are introduced into the final system integration process. Electricity can be carried out Sub-testing. High-speed circuits must be carefully verified. A common technique is to cover the high-speed interface with a cable or a wrap path external to the subsystem; however, this technique does not cover the actual interface connection when the system is integrated. When subsystem components are integrated into a system, changes in the nominal value of the parameters may cause communication failure on the south speed interface. Deterioration factors may include user profile, printed circuit variations and parasitic parameters, connector parasitics, cables The length or cable is not continuous and the system environment. When it detects the failure of 200921403 4, u can try to retransmit the data, or ΓΡ it-ιί tl ^ ^ Wo error correction mechanism. The cost of transmission recovery may be effective -W Ten A Low Political Degradation can be measured by bit error rate (BER). [Disclosed] The illustrative embodiments recognize the shortcomings of the prior art and provide for storage in a wide range Mechanisms and procedures for detecting cable lengths in subsystems. This mechanism can be covered with in-situ bidirectional cables to determine different cable lengths. The mechanism determines the lower limit of the transmitter output that may fail for each external 埠, even for each PHY in a wide range. The length of the line can be determined based on the transition point from the "good" coverage to the "bad" coverage. It assumes that there is a fixed number of predetermined I-line lengths, for example, "long" and "short". The transition point identifies whether the cable is long or short, at which point the optimal tuning parameter can be set accordingly. Particular embodiments further provide a mechanism for calibrating the high speed transmitter/receiver pair features and thereby optimizing transmission performance between subsystems. This mechanism reduces the need for frequent error corrections and does not Error correction techniques result in associated performance degradation. In an illustrative embodiment, a method for detecting a cable length in a computing device includes the steps of: setting at least one transmitter parameter in the computing device and At least one receiver parameter, and recording an error rate; adjusting the at least one transmitter parameter and the at least one receiver parameter, and recording the error rate according to 200921403 until the And said at least one transmitter or receiver parameters from the parameter reaches the minimum at least up to the maximum limit; the error rate will be recorded for comparison with the known length of the line buffer error rate; and the cable length is determined based on the comparison result. In an exemplary embodiment, the method further includes configuring a transmitter/receiver pair in the terminal device for a loopback.

In another exemplary embodiment, the computing device is a serially connected SCSI switch module. In an exemplary embodiment, the tandem connection ScSI switch module includes a parent converter processor. In another exemplary embodiment, the 3 GHz serial connection S c SI switch module includes one. In an exemplary embodiment, the data processor includes at least one of the following models: a cyclic redundancy check module. Group, pattern generator/inspection module, data: punch zone, packet controller or protocol controller. In still another exemplary embodiment, the serial connection s C s! switch module includes a -_ column connection SCSI switch. In an exemplary embodiment, the forks are connected in series to a SCSI terminal device. In the alternative __ 拖 拖 example, the error rate is based on the error rate. A 7 | —.. an H ^ specific concrete ^ t conveyance state parameters including transmitter amplitude ^ 不 不 具体 具体 具体 具体 ' ' ' ' ' ' ' ' ' ' 该 该 该 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收 接收The method for measuring the length of the cable of 200921403 in the computing device includes the following steps. In the computing device, setting at least one transmitter parameter and sigh ^ ^ ^ >, a receiver parameter, and recording the error rate; adjusting the At least ~ you, , ^ ^ the transmitter parameters and the at least one and record the error rate, Ji w receive benefit parameters, the receiver parameters from the lowest limit, f county one and the first rate and the highest limit; Comparing the recorded error sheep with the known cable length „ , ^ S error rate, and confirming the cable length according to the comparison result, the dragon by & _ ', the leaf computing device includes a plurality of transmitters / receiver pair 'and via - tracing tour, 阜 mirror line is connected to a terminal device. In an exemplary implementation (7) A 疋 疋 the at least one transmitter parameter and the at least one receiving sinister slave receiving parameters And the steps to record the error rate to take a step Step: establishing a - command transport_receiver pair in the plurality of transmitter/receiver pairs for communicating on the wide I line. In yet another exemplary implementation, the terminal device includes a plurality of Transmitter/receiver pair. The method further includes the following steps: using the command transmitter/receiver to configure the transmission-receiver in the plurality of transmitter/receiver sub-terminals a receiver/receiver pair for use in a diagnostic loop. In still another exemplary embodiment, the step of adjusting the at least one transmitter parameter and the at least-receiver parameter includes the following steps: for the next transmitter/receiver Repeatingly adjusting the at least-transmitter parameter and the at least-receiving n-parameter until the at least-transmitter parameter and the at least-receiver of all of the plurality of transmitter/receiver pairs The parameters are all varied from a minimum value to a maximum value. 200921403 In yet another exemplary embodiment, the step of repeatedly adjusting the at least one transmitter parameter and the at least-receiver parameter comprises the steps of: Reference Set to - minimum; set a receiver parameter to a nominal value; calculate - error rate, record the calculated error rate; and repeat incrementing the transmitter parameters, calculate the error rate, and record the calculated error Rate, until the transmitter parameter reaches a maximum value. In another exemplary embodiment, the step of repeatedly adjusting the at least one transmission parameter and the at least one receiver parameter further includes the following steps: The parameter is set to - nominal value; the - receiver parameter is to the minimum value, an error rate is calculated; the calculated error rate is recorded; = the number of times is increased, the amount is wrong, and the error is recorded. Rate until the receiver parameter reaches a maximum value. In the exemplary embodiment, the method further includes the following steps: averaging the average of the error rates of the plurality of transmitter/receiver pairs. In the specific implementation of the shot, the at least - pass parameters include pass = amplitude. In a re-exemplary embodiment, the at least one benefit parameter comprises a transmitter equalization. - In an illustrative embodiment, a computer program product includes a computer usable medium having a " When the computer readable program is executed in a computing device, it causes the computing device to perform the following steps. Setting at least one transmitter parameter and at least one receiver parameter 'and recording an error rate; adjusting the at least one transmitter parameter 10 200921403 and the at least one receiver parameter, and recording the error rate until the at least Comparing a transmitter parameter and the at least one receiver parameter from a minimum limit to a maximum limit, comparing the error rate recorded by the § with the error rate of the known 长度 line length, and determining the cable length according to the comparison result . In an exemplary embodiment, the computing device is a switch module that is coupled to a terminal device via an external cable. In another exemplary embodiment, the transmitter/receiver pair at the terminal device is configured for use in a diagnostic loop. In still another exemplary embodiment, the computing device includes a plurality of transmitter/receiver pairs and is a switch module that is coupled to the terminal device via a wide cable. In still another exemplary embodiment, the step of setting the at least one transmitter parameter and the at least one receiver parameter and the recording error rate includes the steps of: establishing a command in the plurality of transmitter/receiver pairs A transmitter/receiver pair for communicating via the wide cable. In still another exemplary embodiment, the terminal device includes a plurality of transmitter/receiver pairs. When the computer readable program is executed on the computing device, the computing device is further caused to perform the step of using the command transmitter/receiver pair to group the plurality of transmitter/receiver pairs in the terminal device The next transmitter/receiver pair is used for the diagnostic loop. In still another exemplary embodiment, the step of adjusting the at least one transmitter parameter and the at least one receiver parameter includes the steps of: repeatedly adjusting the at least transport state parameter for the next 200921403 - transmitter/receiver pair and The one-to-one receiver parameter, until the plurality of transmitter/receiver pairs, the at least-transmit n-parameter and the to-to-J-receiving parameter of all transmitter/receiver pairs vary from a minimum value Until the maximum value. In still another exemplary embodiment, the step of repeatedly adjusting the at least-transmitter parameter and the at least one of the receiving parameters includes the following steps: setting a transmitter parameter to - County | &; the number is reduced to the minimum value; a receiver parameter is set to the - nominal value; an error rate is calculated; the calculated error rate is recorded; and the transmission n parameter is repeatedly incremented, the error rate is calculated, and the calculation is calculated. The error rate 'until the transfer! ! The parameter phase is the maximum value. In still another exemplary embodiment, the step of adjusting the at least one transmitter parameter and the at least one receiver parameter further includes the following steps: setting a transmitter parameter to a nominal value; a receiver parameter Set to - minimum; calculate an error rate; record the calculated error rate 丨 and repeat the incrementing of the transmitter parameters, calculate the error rate, and record the calculated error rate until the receiver parameter reaches a maximum value . In another exemplary embodiment, when the computer readable program is executed on the computing device, the computing device is further caused to perform the step of calculating an error rate of the plurality of transmitter/receiver pairs Average In another illustrative embodiment, a computing device includes at least a transmitter/receiver pair and a processor. The processor is configured for 12 200921403 to set at least a transmission parameter such as a receiver, a number, and an error rate in the computing device; adjusting the at least - transmitter parameter and the to = receiver parameter, and Recording the error rate until the at least benefit parameter and the at least-receiver parameter reach the highest limit from the lowest limit; comparing the recorded error rate with the error rate of the known cable length; and according to the comparison The result determines the cable length. In an exemplary embodiment, the computing farm-exchanger module is connected to the "terminal device" via an external I line. In another exemplary embodiment, the transmitter/receiver pair at the terminal device is configured for use in a diagnostic loop. In a further exemplary embodiment, the at least one transmitter/receiver pair includes a plurality of transmitter/receiver pairs and is a switch module that is connected to the terminal device via a - wide I line. In another exemplary embodiment, the step of 'setting the at least one transmitter parameter and the at least one receiver parameter and recording the error rate includes the steps of: establishing a command in the plurality of transmitter/receiver pairs A transmitter/receiver pair for communicating via the wide cable. In accordance with a specific embodiment, the terminal device includes a plurality of transmitter/receiver pairs. The processor is configured to: use the command to receive a pair of transmitter/receiver pairs at the terminal to configure the transmitter-receiver pair for the diagnostic loop. In a further embodiment, the step of adjusting the at least one transmitter parameter 13 200921403 and the at least-receiver parameter comprises the steps of: repeating the adjustment for the next transmitter/receiver pair - Transmitter parameters and the at least-receiver parameter 'until all of the transmitter/receiver pairs of the plurality of transmitter/receiver materials are at least - the transmitter parameters and the at least one receiver parameter are varied from a minimum value to a minimum value Until the maximum value. In still another exemplary embodiment, the step of repeatedly adjusting the at least one transmitter parameter and the at least-receiver parameter comprises the steps of: setting a transmitter parameter; t being a - minimum value; Set to a nominal value; calculate a wrong disk · — T "" wrong sheep, record the error rate calculated; and repeat the increase of the transmitter parameters, calculate the error rate, and record the calculated error Rate until the transfer parameter reaches the maximum value. In another exemplary embodiment, the step of adjusting the at least one transmitter parameter and the at least one receiver parameter is repeated, and further includes the following step 1: the transmitter parameter is assumed to be a nominal value; the receiver parameter is sighed疋 to - minimum; calculate an error rate; record the calculated error rate; and repeat incrementing the transmission time, calculate the error rate, and record the error rate calculated until the receiver parameter reaches - maximum until. In a re-exemplified embodiment, the step of comparing the recorded error rate to the error rate of a known I-line length includes the steps of: calculating a recorded error rate for a plurality of transmitter/receiver pairs average value. These and other features and advantages of the present invention will be described in the following detailed description of the exemplary embodiments of the invention. [Embodiment] Referring to the drawings, Figs. 1A to 1C are block diagrams of narrow spaces in a storage network according to an exemplary embodiment. More specifically, with reference to flA®, the switch module 11A has a processor ι2 and a switch-specific integrated circuit (ASIC) 114. Switch ASIC i 14 has a physical transceiver component (PHY) 116. - The physical transceiver component comprises a transmitter and a receiver pair. The terminal device 120 has a processor 122 and a terminal device ASIC 124. The terminal device ASIC 124 has a physical transceiver component (3). The physical transceiver t1 is connected to the physical transceiver element m via the external cable for normal data transmission. In an exemplary embodiment, the switch module 11G may be a serial-to-serial switch module, and the terminal device 120 may be a -SAS terminal device. V. Referring now to Figure 1B, the physical transceiver component of the switch ASICU4+ and the physical transceiver component 126 of the terminal-mounted ASIC 124 are - through the diagnostic internal loop at each terminal. According to the illustrative device, the physical transceiver component 116 and the physical transceiver component 1 26 are capable of connecting the transfer port to the interface (4) for forming an internal loop. Figure 1 illustrates how the SAS device execution-inner-cover coverage at each end of the Α-纟5 连 连 interface is configured to test the narrowness of each individual device during diagnostic verification of the external interface. 15 200921403 > Referring to Figure 1C, the physical transceiver component 126 in the terminal device ASIC 124 is configured for use in the diagnostic loop of the terminal device. The physical transceiver component 126 can connect the transmitter to the receiver to form an external loop. The f 1C diagram illustrates a configuration that provides a basis for narrow cable length detection mechanisms and procedures, which are described in more detail below. 2A through 2C are block diagrams of a wide range of storage networks in accordance with one illustrative embodiment. More specifically, referring to Figure 2a, the switch module 210 includes a switch ASIC 22{) having a switch processor 222, a data processor 224, a switch 226, and physical transceiver elements 0-N 212-216. Each physical transceiver component includes a transmitter and a receiver pair. The data processor 224 includes at least one of the following modules: a cyclic redundancy check module, a pattern generator/check module, a data buffer, a packet controller, or a protocol controller. The terminal device 23A includes a terminal device ASIC 24A having a target processor 242, a data processor 244, a switch 246, and a physical transceiver component 〇_N 232_236. The physical transceiver component 2 12-2 16 is connected to each of the physical transceiver components 232-236 via a wide external cable for normal data transfer. In an exemplary embodiment, the switch module 2 can be a tandem connection SCSI (SAS) switch module. The terminal device 23 can be a SAS terminal device. Referring now to Figure 2B, the physical transceiver elements 212-216 in the switch ASIC 220 and the physical transceiver elements 16 in the terminal device ASIC 240 are used for the diagnostic internal loop at the parent terminal. In accordance with the illustrative embodiment, physical transceiver components 2i2_2i6 and physical transceiver components 232-236 can connect the transmitter to the receiver to form an internal σ loop. Figure 2B illustrates how the wide SAS network is configured during diagnostic verification of the external interface. The SAS device at each end of the connection interface performs an internal overlay to test each of the narrow bees. Referring to Figure 2C, the physical transceiver component 212 in the switch ASIC 22 and the physical transceiver component 232 in the terminal device ASIC 240 are configured for normal data transfer. In the illustrated example, the physical transceiving component 212 is a command entity transceiving component. The entity in the terminal device asic24〇 receives 70 pieces of 1·Ν 234-236 series and is configured for the diagnostic loop at the terminal device. Figure 2C illustrates a configuration that provides a basis for the wide cable length detection mechanism and procedure of the illustrative embodiment, which will be described in greater detail below. One of ordinary skill in the relevant art will appreciate that the hardware described in Figures 1 through ic and Figures 2 through 2C can vary. For example, the switch module 11A in Figures 1A through ic may include more than - narrow iterations. The switch modules 21A in Figures 2A through 2C may include more than a width. Other modifications to the storage area network configuration are possible within the spirit and scope of the present invention. The examples are not intended to describe or represent any structural limitations of the invention. In accordance with an illustrative embodiment, a mechanism and program for detecting cable length in a storage subsystem having a width of 17 200921403 is provided. This mechanism can be covered with in-situ bidirectional cable to determine different cable lengths. Note that these still-speed differential interfaces typically implement transmitter and receiver circuits, also known as "serrister/deserializer" (SERDES) circuits, which allow adjustment of the transmitter amplitude and receiver equalization. The mechanisms and procedures for adjusting transmitter amplitude and receiver equalization will be described in detail below with reference to Figures 4 through 8, and it is desirable to be able to optimally adjust these parameters during operation to provide the most robust system electrical efficacy. In order to determine the length of any connection cable, a diagnostic routine is defined that adjusts the lower limit of the transmitter output for each-external 埠, even for each entity in a wide ,, and the receiver input is tuned All (in the case of job) to the state of the interface failure. The length of the mirror can be determined based on the transition point from the "successful" coverage to the "failure" coverage. It is assumed that there are a fixed number of predetermined cable lengths, such as "long" and "short" I lines. The transition point determines the I line as long or M, at which point the optimal tuning parameters can be set and programmed accordingly during normal operation. Figure 3 is a flow diagram illustrating the operation of a mechanism for weighing cable lengths in a storage subsystem having a wide volume, in accordance with an illustrative embodiment. It should be understood that each block in the description of the flowcharts, 1, the combination of the blocks in the description of the flowcharts, may be referred to by the computer program. The computer program instructions can be provided to the processor: the program data processing device to generate a machine such that the instructions executed on the processing device 18 200921403 or other π data processing device can be used to implement the social/# How to I, the brain program refers to the function specified in the flowchart box. The second system can be stored in a computer-readable memory or a storage device, or a programmable device or other programmable data processing, and the soldier works in a specific mode to make it stored in the continuous storage medium. The instructions of the $ 电 电 readable memory or , - - produce a product, which includes the functions specified in the machine block for the purpose of searching. Correspondingly, the sound of the face "L block supports the combination of the 功能# for performing the specified function, and the member of the 妖 虹 虹 又 又 Μ Μ Μ Μ Μ Μ 执行 执行 执行 执行 执行 执行 执行 执行 执行 田 田 田 田 田 田 田It should also be understood that the parent block of the flowcharts, and the special functions or steps of the ^(4) are implemented by the system of the specific body and system, or by a combination of special hardware and computer instructions. In addition, the flowcharts are provided, and (4) are not specifically intended to be illustrative. The flowcharts are not intended to limit the order of the 刼^寺特疋# Without the spirit of the present invention and Fan Laojiao.. ^ ^, the flow chart can be modified to suit the specific implementation. Now refer to the 3 ® , , . When connected to - wide tan < ^ ,, the operation begins. 亀 " ",, see the line length is unknown, the mother-end configuration is such (4)). Subsequently, the second is used for the length of the mirror line (the z-mechanism establishes a command entity transceiver component for communication via the wide 19 19 200921403 (block 3 04 ). The mechanism configures the physical transceiver component to transmit the Connected to the receiver to form an external loop to cover a physical transceiver component (block 3G6) in the width. The mechanism (4) transmitter and receiver parameters to minimize the error rate and perform Record (block 3〇8). The mechanism then adjusts the transmitter and receiver parameters to the next step and records the error rate (block 31 (〇. The mechanism determines if all adjustments have been completed (block 312). If not yet Upon completion of all adjustments, operation returns to block 31A to adjust the transmitter and receiver parameters to the next step and the error rate is recorded. If all adjustments have been completed for the physical transceiver component in block 312, then the mechanism Determining if the last physical transceiving element has been tested (block 3M). If the last physical transceiving element has not been tested, then operation returns to block 306' to overwrite the The lower one is a physical transceiver component. However, if the last physical transceiver component has been tested in block 314, then the tH mechanism compares the data recorded by each physical transceiver component with the average of the component data. The mechanism =: is equal to the average value of the covered body transceiver to determine the length of the I line (block 320). After that, the operation ends. During the product test, a plurality of I line lengths can be connected, by the 20 200921403 盍 is tuned to fail to collect a set of data points to describe the characteristics of each specific 'cable length. Figure 3 shows how these characterizations reflect the optimization of the performance and the failure of the # point range During the coverage test, a table of these characteristic eigenvalues can be used to determine whether to connect a long cable or a connection-short cable, or to connect other predetermined lengths. In other words, a known length error can be recorded. The mechanism can then compare the recorded values from blocks 308 and 310, or the average from block 318, to the recorded error rate of the known length I line. When there are features, there are multiple links to be tested [so provided: data points] for more finely determining the length of the connected I lines. Note that the flowchart of Figure 3 can be used for the m-line single-transceiver components. According to the illustrative embodiment, the high speed serial interface used in high frequency applications can dynamically set the range beyond the normal limit to determine the optimal release b» and the obtained settings represent each instance. System calibration point of the path. Each system can store calibration data for each point-to-point node connected to the serial interface. A high-speed f-motion interface can be composed of four lines. The two lines are used differentially: |丁| βί1 Say 'for example, a transmission signal. Similarly, the two lines are differentially used to indicate a 篦 - but lack,,, the first signal, such as a reception signal. In this way, the % transmission and reception signals are compacted. In accordance with an illustrative embodiment, a mechanism is provided for optimizing the performance of data transfer between the sub- 21 2009 21403 systems via the high speed interface. The mechanism can change the parameters of the incentive and response mechanisms to take full advantage of the transfer function of the transport interface. The mechanism then determines the design/protection band tolerance for that particular, hardware. The resulting information can then be used as a calibration factor for that particular hardware configuration. For high speed SAS switches, this is to test tolerance. In this case, the point-to-point slot from the transmitter to the receiver, the internal adjustment configuration, and the exterior are in the past, a limited set of single calibration factor line lengths. The mechanism of the specific embodiment covers (variable width cable). Note that it can also be applied to the internalized high-speed construction of a set of nominal parameters, which can be applied to each case due to the difference between the parasitic length and the physical length between the connections, which may be for the physical and electrical length. A set of consistent subsystems that are connected together is applied to one of the subsystems. The addition or subtraction mechanism of the connected subsystems of the diversity set can use pre-emphasis/input compensation to focus on communication across a communication interface. For example, it can cover the blade line. Can be used in the system or used to view the results of point-to-point calibration, which is an unlimited number of cable lengths and paths. It is illustrative of the specific mechanism of the application, rather than the cabled interface. Replace the path to optimize the system. The enthusiasm parameter, the slow line or the path of the electrical is not very close. This calibration mechanism can be 'valued' to optimize the system. Point-to-point connections, such as cable connections. In another example, the calibration may be combined, such as system reconfiguration, lack of environment, or subsystem degradation due to time or environment. , power-on reset, related hardware changes, tongue and tongue, can start the performance calibration.尥° and 疋4 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图 图The high-speed subsystem is connected to the fan system 430 via the external wiring of the subsystem. The high speed subsystem 4 1 〇 includes a physical receive and link layer 412 that is coupled to the transmitter/receiver pair via a serialization/deserialization (SERDe) circuit 416. The high speed subsystem 41 70 收发 收发 收发 收发 收发 收发 收发 收发 收发 收发 收发 , , , , , , , , , , , , , , , , , 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The transmitter/receiver pair is connected to the subsystem external wiring via connector 420. The high speed sub-system 430 includes a physical transceiving element and a link layer 432 that is coupled to the transmitter/receiver pair via serialization/deserialization (SERDES). The high speed subsystem 430 also includes a physical transceiver component and link layer 434 that is coupled to the transmitter/receiver pair via a Strike Sequence/Deserialization (SERDES) circuit 438. The transmitter/receiver pair in the high speed subsystem 430 is connected to the external wiring of the shai subsystem via the connector 44A. In the example depicted in FIG. 4, the physical transceiver components and link layers 412, 414 and SERDES circuits 416, 418 in the high speed subsystem 410 represent an excitation (transmitter) 452. The physical transceiver components and link layers 432, 434 and SERDES circuits 436, 438 in the high speed subsystem 430 represent 23 200921403 responses (receivers) 456. The transceiver pair, connectors 420, 440, and sub-interface external wiring represent a complex interface transfer function 454. According to the specific example of the month, the mechanism can change the incentive and response parameters. The power month t» ranges from an established set of one of the externally connected vehicles to the established set of subsystems to determine a performance tolerance. Figure 5 is a block diagram of the subsystem interface environment, which will be implemented in the context of the illustrative embodiments. The host system includes (4) an application processor 512_516 that is coupled to the SAS converter 518 at the internal port. The storage subsystem 522_526 is connected to the SAS switch 5丄8 via a 込AS cable at the external port. This illustrative, specific implementation mechanism adjusts the per-point-to-point connection to find the best performance setting. The mechanism can then be calibrated to store the information stored for each point-to-point connection. Figure 6 is a block diagram according to an illustrative embodiment, which illustrates a high speed point-to-point calibration procedure. Subsystem 61 includes a physical transceiver component and link layer 612' which is coupled to the transmitter/receiver pair via (4) 616. Subsystem 630 includes a physical transceiver component and a link layer (1) that is coupled to a transmitter/receiver pair via SERDES 636. The sub-system, wash 610 transmitter/receiver pair is connected to the transmitter/receiver pair of sub-system 630 via external cable 65〇. The Guangyi node-to-node connection includes an output transmitter, a printed circuit board path, a connection H, an internal high-speed configuration, an external line, and a wheel receiver. 24 200921403 The calibration mechanism of this illustrative embodiment sets the transmitter and receiver parameters to nominal design values. The mechanism is then one end of the point-to-point external connection (the node determines the transmission set point. The mechanism generates a self-test pattern at the source switch and at the receiving switch at the other end (node B) of the external connection The expected data is monitored. The parameter measured by the mechanism is the bit error rate (BER). In the exemplary embodiment, the unit of BER occurs every time a million bits of data are received. The calibration mechanism then The transfer settings are adjusted from a minimum (nun) to a maximum (max) range. The transfer set point of node a corresponds to the highest transfer transfer set point at the receive node B).

The calibration mechanism is then the other end of the point-to-point external connection (the node determines the receiver set point. The mechanism generates a self-test pattern at the source switch and monitors min at the receiving switch at node B of the external connection Adjusting the expected data to the range of max. The calibration mechanism is in the process of receiving the spoofing from the sneak peek. The receiving of the node B is 朴 轶 轶 轶 轶 6 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应The point D repeats the calibration mechanism for the external cable node c and the calibration sequence. The flowchart illustrates the 'and the calibration mechanism in the calibration mechanism. The seventh diagram is based on an illustrative embodiment. Operation of the point-to-point calibration mechanism. Operation begins with the transmitter setting the self-test pattern (block 702). 25 200921403 The transmit SAS parameter is set to a minimum value (block 704) and the receive SAS parameter is set to a nominal value (block 706). The calibration mechanism calculates a bit error rate (BER) (block 708). The mechanism then determines if the transfer parameter is equal to the maximum value (block 71 〇). If the transfer parameters are not equal The maximum value, the calibration mechanism increments the transmit SAS parameter (block 712), and the operation returns to block 7〇8 to calculate the BER of the incremental transmit parameter. The calibration mechanism adjusts the transfer between minimum and maximum values. In the case of the SAS parameter, the mechanism records the BER for each parameter value, as shown in block 714. In block 71, if the transmission parameter is equal to the maximum value, the calibration mechanism calculates the transmission calculation value (block 71 6). Next, the calibration mechanism sets the receive SAS parameter to a minimum value (block 7-8) and sets the transmit SAS parameter to a nominal value (block 720). The calibration mechanism calculates the BER (block 722). A determination is then made as to whether the received parameter is equal to the maximum value (block 724). If the received parameter is not equal to the maximum value, the calibration mechanism increments the receiving SAs parameter (block 726)' and operation returns to block 722 to calculate incremental reception. BER of the parameter. When the calibration mechanism adjusts the beta receive SAS parameter from minimum to maximum, the mechanism records for each parameter value, as shown in block 728. At block 724 If the receiving parameter is equal to the maximum value, the calibration mechanism calculates the received calibration calculation value (block 730). Thereafter, operation 26 200921403 ends. Figure 8 is a flow diagram illustrating system calibration in accordance with an illustrative embodiment The operation begins by responding to one of a plurality of starting conditions, including: power-on reset (block 802), system reconfiguration (block 804), adding or subtracting subsystems connected by cables (block 8 〇6), or the SAS bit error rate interface is degraded (block 8〇8). A start condition is responded to, and the calibration mechanism performs a point-to-point calibration for the affected high speed interface (block 8 1 0). Thereafter, the calibration mechanism updates the calibration parameters in the firmware of the system (block 812). Thereafter, system calibration is complete (block 814) and the operation ends. Accordingly, the illustrative embodiments address the shortcomings of the pre-crack technique by providing a mechanism and procedure for detecting cable length in a storage subsystem having a wide stack. This mechanism can be covered with in-situ bidirectional cables to determine different cable lengths. This mechanism determines the lower limit of the transmitter rotation that may fail for each external 埠, or even for each PHY in the 埠 。. The length of the cable can be determined based on the transition point from the "good" t-cover to the "poor" coverage. It assumes that there are a fixed number of predetermined cable lengths 'e.g., 'long' and 'short'. The transition point determines whether the slow line is long or short, at which point the optimum tuning parameter can be set accordingly. The illustrative embodiments further provide a mechanism for calibrating the high speed transmitter/receiver pair features and thereby optimizing the transfer performance between the subsystems. This mechanism reduces the need for frequent error corrections, 27 200921403 and does not result in related performance degradation due to bug fix techniques. It should be understood that the illustrative embodiments may be embodied in the form of a full hardware embodiment, a full software embodiment, or a specific embodiment of a hardware and software component. In the exemplary embodiment, the mechanisms of the illustrative embodiments are implemented in software including, but not limited to, firmware, resident software, microcode, and the like. In addition, the illustrative embodiments may take the form of a computer program product that can be accessed by a computer-usable or computer-readable medium, providing code for execution of the system by or in conjunction with any instruction. For purposes of illustration, a computer-usable, computer-readable medium can be any device that is capable of containing, storing, communicating, transmitting, or transmitting the program in any combination or in combination with an instruction execution system, apparatus, or device. The medium can be an electronic, magnetic, optical, electromagnetic, infrared or semi-conductive system: (or device or device) or a propagation medium. - Examples of computer readable media include a semiconductor or solid state memory, magnetic tape, removable computer disk, - random access memory (RAM), _ read only memory, - hard disk and - CD. Current examples of optical discs include read-only discs, readable/writable discs (CD_R/w) and a variety of digital light management systems that will be included in the execution of the memory components for storing and/or executing programs. There is less data in the code—directly or indirectly coupled to the processor via a system bus. The memory elements can be included in the actual 28 200921403 device, and the cache memory is used to reduce the local memory used during the execution period, and the temporary storage used to provide at least a certain code, a large amount of storage撷The number of times the code was taken. Input / output or 1 / 〇 ( (including but not limited to the resident station ^ display device, only 曰 装置 device #, etc.) can be directly or via the connection "quote into the 'output controller coupling'". The network adapter can also be tapped to the system so that the data processing system can be switched to other data processing systems, or: coupled to a remote printer or storage via a dedicated or public network The data modem, the cable modem, and the Ethernet are currently part of the type of network adapter available. The description of the present invention has been provided for purposes of illustration and description, and the basin is not intended to be exclusive or The invention is to be construed as being limited by the scope of the present invention. It will be understood by those of ordinary skill in the art. The present invention may be applied to a variety of specific embodiments and variations of the specific design desired to be employed by those skilled in the relevant art. ' [Simple Description] When combined with reading, borrow The present invention, as well as a preferred embodiment, other objects and advantages, will be best understood from the following detailed description of the embodiments of the invention. One of the specific embodiments of the invention is a block diagram of a narrow network in the storage network according to the first aspect of FIG. 1A to FIG. 2C; a block diagram of the width of the storage channel in the second and second embodiments; 3 is based on - for operation with wide ;; a flow chart of an illustrative embodiment illustrating a mechanism for detecting cable length in a storage subsystem - a block diagram of an example system environment, The illustrative embodiments will be implemented in the context of the loop; the brother: diagram illustrates a block diagram of a subsystem interface environment in which the illustrative embodiments will be applied Figure 6 is a block diagram of an illustrative embodiment illustrating a high speed point-to-point calibration procedure; Figure 7 is a flow diagram illustrating an operation of a point-to-point calibration mechanism in accordance with an illustrative embodiment; And Fig. 8 is a flow chart illustrating system calibration according to an illustrative embodiment. [Main component symbol description] 110 112 Switch module processor switch dedicated integrated circuit 30 114 200921403 116 Physical transceiver component 120 terminal Device 122 Processor 124 Terminal Device ASIC '126 Physical Transceiver Element • 210 Switch Module 212 '214, 216 Physical Transceiver Element f 220 Switch ASIC 222 Switch Processor 224 Data Processor 226 Switch 230 Terminal Device 232, 234 236 physical transceiver component 240 terminal device ASIC [242 target processor 244 data processor 246 switch - 410 high speed subsystem - 412 physical transceiver component and link layer 414 physical transceiver component and link layer 416 serialization / deserialization Columnarization circuit 418 serialization/deserialization circuit 31 200921403 420 430 432 434 436 438 440 452 454 456 510 512 518 522 610 612 616 630 632 636 650 Connector high speed subsystem physical transceiver component and link layer entity transceiver Component and Link Layer SERDES Circuit SERDES Circuit Connector Excitation (Transmitter) Complex Response transmission function interface (receiver) host system 514 '516 application processor inside the storage subsystem 524, 526 SAS switch element and a transceiver subsystem link layer entity

SERDES subsystem

Physical Transceiver and Link Layer SERDES External Cable 32

Claims (1)

200921403 VII. Patent Application Range 1. A method for measuring cable length in a computing device, the method comprising the steps of: 纟 setting at least - transmitter parameters and at least - receiver parameters in the computing device, and Recording an error rate; adjusting the at least one transmitter parameter and the at least one receiver parameter, and recording the error rate until the at least one transmitter parameter and the at least one receiver parameter are changed from a multiplicative small value to a maximum value Comparing the recorded error rate with the error rate of the known cable length; and determining a cable length based on the comparison result. 2. The method of claim 1, further comprising the step of: configuring a transmitter/receiver pair in the computing device for diagnosing the loop. 3. The method of claim 1, wherein the computing device is a serially connected SCSI switch module. 4. The method of claim 3, wherein the contiguous S C SI switch module comprises a switch processor. 33 200921403 5. As described in claim 3, wherein the serial connection scSI switch module includes a data processor. 6. If the application is in the fifth paragraph of the patent scope, if cry A, where the data is connected to the *. 楯裱 redundant check module, type 'live 7 check module, data slow | H, μ 1 &gt; μ Controller. A packet controller or protocol control. The method of claim 3, wherein the serial SCSI switch module comprises a serially connected milk thistle switch. 8. The method of claim i, wherein the computing device is a serial connection 8 (: 81 terminal device), the error rate of 9. The method of claim 1, wherein The method of claim 1 , wherein the at least the transmitter parameter comprises a transmitter amplitude, wherein the method of claim 2, wherein the method is at least 34 200921403 Receiver parameters include receiver equalization 12. A method of detecting cable length in a computing device, the method comprising the steps of: setting at least one transmitter parameter and at least one receiver parameter in the computing device 'and recording the error rate; adjusting the at least one transmitter parameter and the at least one & parameter, and recording the error rate ' until the at least - the transmitter parameter and the at least one receiving state parameter are changed by a minimum value Up to a maximum value; 's special office. The recorded error rate is compared with the error rate of the known rule line length; and a cable length is determined based on the comparison result, wherein the calculation A plurality of transmitting n/receiver pairs are connected to and connected to a terminal device via a wide-twisted winding. 1 3 · at least one transmitter parameter as claimed in claim 12 and the at least one of the methods In the step of setting the receiver parameter and recording the error rate, establishing a line of communication. The method includes the following steps: at the plurality of transmitter/receiver pairs of the command transmitter/receiver pair, for the wide cable The method of claim 13 is as follows: wherein the terminal 35 200921403 device comprises a plurality of transmitters/joints: using the command transmitter/receiving transmitter/receiver alignment to configure the circuit The receiver pair further includes the following steps as a pair to the transmitter/receiver pair in the plural of the terminal device for the diagnosis, wherein the step of adjusting the step includes: 15. The method includes at least one transmitter parameter and 哒$, 丨, 夂忑 to J a receiver parameter. The following steps: repeatedly adjusting the at least one transmission number and the current to the lower-transmitter/receiver pair Less-receiving hours until the at least one transmitter number and the at least one receiver parameter of all transmitter/receiver pairs in the plurality of feeder/receiver pairs change from a minimum value to a maximum value The method of repeating the parameters of the receiver, wherein the at least one transmitter parameter and the at least one of the steps of claim 15 include the following steps: setting a transmitter parameter to a minimum value; Setting a receiver parameter to a nominal value; calculating an error rate; recording the calculated error rate; and 36 200921403 repeatedly incrementing the transmitter parameter to calculate the error rate of the error calculation until the transmitter parameter reaches 17 The method of claim 16, wherein the at least one transmitter parameter and the at least-receiving further comprises the steps of: setting a transmitter parameter to a nominal value; Γ setting a receiver parameter to a a minimum value; calculating an error rate; recording the calculated error rate; and repeatedly incrementing the receiver parameter to calculate an error rate of the error calculation until the Parameter reaches the receiver 18. The application of paragraph 12 side G patentable scope the steps of: calculating a plurality of such transmitter / receiver pair of the mean. 19. The transmitter parameters as recited in claim 12, wherein the transmitter parameters comprise transmitter amplitudes. 20. If the rate is as stated in item I2 of the patent application, and the maximum value is recorded. The method of repeating the parameters of the modulator parameter, and recording the maximum value. The method further includes the following method of equal error rates, wherein the at least method, wherein the at least 37 200921403 a receiver parameter comprises a receiver equalization. 21. A computer program product comprising a computer usable medium having a computer readable program, wherein the computer readable program, when executed on an I juice device, causes the metering device to perform the following steps: Setting at least a transmitter parameter and at least a receiver parameter in the computing device, and recording an error rate; adjusting the at least one transmitter parameter and the at least one receiver parameter, and recording the error rate until the at least the transmitter parameter and The at least one receiver parameter is changed from a minimum value to a maximum value; the recorded error rate is compared with an error rate of a known cable length; and a cable is determined based on the comparison result length. 22. The computer program product of claim 21, wherein the computer is configured as a switch module, which is connected to a terminal device via an external cable. The computer program product of claim 21, wherein one of the transmitter/receiver pairs at the terminal device is configured for use in a diagnostic loop. 38. The computer program product of claim 2, wherein the computing device comprises a plurality of transmitter/receivers, and the system is connected to a terminal device via a wide-wire winding. Module. 25. The computer program product of claim 24, wherein the step of setting the at least one transmitter parameter and the at least one receiver parameter and recording an error rate comprises the steps of: at the plurality of transmitters/ A command transmitter/receiver pair is established in the receiver pair for communication via the wide cable. 26. The computer program product of claim 25, wherein the terminal device comprises a plurality of transmitter/receiver pairs, wherein the computer readable program is executed on the computing device, causing the calculation The apparatus performs the following steps: Use the command transmitter/receiver to configure the next transmitter/receiver pair in the plurality of transmitter/receiver pairs of the terminal device for the loop. 27. The computer program product of claim 26, wherein the step of adjusting the at least one transmitter parameter and the at least one receiver parameter is less than one transmitter parameter' includes the following steps: for the next transmitter/ Receiving 39 200921403 and the at least-receiver parameters until all of the transmitter/receiver pairs of the plurality of transmitter/receiver pairs are at least - the transmitter parameters and the Sz to y receiver parameters are from one The minimum value changes to a maximum value. </ RTI> 28. The computer program product of claim 2, wherein the step of adjusting the at least-transmitter parameter and the at least-receiver parameter f comprises the following steps: setting a transmitter parameter to a minimum value; setting a receiver parameter to a nominal value; calculating an error rate; recording the calculated error rate; and repeatedly incrementing the transmitter parameter 'calculating the error rate, and recording the calculated error rate Until the transmitter parameter reaches a maximum value. 29. The computer program product of claim 28, wherein the step of repeatedly adjusting the at least one transmitter parameter and the at least one receiver parameter - further comprises the steps of: setting a transmitter parameter to a Nominal value; set a receiver parameter to a minimum value; calculate an error rate; record the calculated error rate; and 40 200921403 repeatedly increment the receiver parameter, the external volume of this collection is different And record the calculated error rate until the number of sneak peeks reaches the maximum value. 30. The computer program product of claim 24, wherein when the computer readable program is executed on the computing device, the computing device further causes the computing device to perform the following steps: calculating the plurality of transmitters/ The price of the material is + the average value of the recorded error rate of the 砰k device/receiving benefit pair. 31. A computing device comprising: at least one transmitter/receiver pair; and a processor, the medium processor, configured to perform the following steps: setting at least one transmitter parameter in the computing device And at least one receiver parameter 'and recording an error rate; adjusting the at least-transmitter parameter and the at least one receiver parameter, and § recording the error rate until the at least one transmitter parameter and the at least one receiver parameter system Changing from a minimum value to a maximum value; comparing the recorded error rate with an error rate of a known cable length; and determining a cable length based on the comparison result. 32. The computing device of claim 31, wherein the 41 200921403° device system is connected to a terminal device via an external cable. 33. The computing device of claim 31, wherein the transmitter/receiver pair at the terminal device is configured for a diagnostic loop. The computing device of claim 3, wherein the transmitter/receiver pair comprises a plurality of transmitter/receiver pairs, and the system is connected to the cable via a broadband cable. A switch module of a terminal device. 35. The computing device of claim 34, wherein the step of at least the transmitter parameter and the at least one receiver parameter and the recording error rate comprises the steps of: i in the plurality of transmitters A command transmitter/receive pair is established in the receiver pair to communicate via the wide cable. The computing device of claim 35, wherein the terminal device comprises a plurality of transmitter/receiver pairs, wherein the processor is configured to use the command transmitter/receiver pair, To configure the next transmitter/receiver pair within the plurality of transmitter/receiver pairs at the terminal device for the diagnostic loop. 42. The computing device of claim 36, wherein the step of adjusting the at least one receiver parameter, the seventh embodiment of the at least one transmitter parameter and the following steps are as follows: for the lower-transmitter/receiver pair 'Repetitively adjusting the at least-transmitter parameters and the to-> receiver parameters until the at least one transmitter parameter and the sum of all of the transmitter/receiver pairs in the plurality of transmitter/receive pairs The receiver parameters are all changed from a minimum value to a maximum value. The computing device of claim 37, wherein the step of repeatedly adjusting the at least one transmitter parameter and the at least one receiver parameter comprises the steps of: setting a transmitter parameter to a minimum value Setting a receiver parameter to a nominal value; calculating an error rate; recording the calculated error rate; and repeatedly incrementing the transmitter parameter, calculating the error rate, and recording the calculated error rate 'until the The transmitter parameters reach a maximum value. The computing device of claim 38, wherein repeatedly adjusting the at least one transmitter parameter and the at least one receiver parameter step 43 200921403 further includes the following steps: setting a transmitter parameter To a nominal value; set a receiver parameter to a minimum value; calculate an error rate; record the calculated error rate; and repeatedly increment the receiver parameter, calculate the error rate, and record the calculated error Rate until the receiver parameter reaches the maximum value. After the calculation of the agricultural plant as described in claim 34, wherein the recorded error rate is compared with the error rate of the known material length, the following steps are included: recording the error calculation of the plurality of transmissions平均值 The average of these recorded rates. 44