TW200908373A - Quantum well intermixing method - Google Patents

Quantum well intermixing method Download PDF

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TW200908373A
TW200908373A TW96128964A TW96128964A TW200908373A TW 200908373 A TW200908373 A TW 200908373A TW 96128964 A TW96128964 A TW 96128964A TW 96128964 A TW96128964 A TW 96128964A TW 200908373 A TW200908373 A TW 200908373A
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quantum well
layer
semiconductor layer
mixing method
defects
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TW96128964A
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Chinese (zh)
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TWI347688B (en
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Tsong-Sheng Lay
Tao-Yuan Chang
Chien-Liang Chiu
Heng-Jui Chang
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Univ Nat Sun Yat Sen
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Abstract

A quantum well intermixing method comprising the following steps: providing a semiconductor substrate, right upon the substrate a first semiconductor layer, a lighting layer having a quantum well layer, and a second semiconductor layer being stacked up one another sequentially to fabricate a chip device; further, a surface of the second semiconductor layer being resulted in a plurality of defects, and afterward a thin SiO2 layer thereupon with a plurality of defects, performing the inter-diffusion between the defects above and atoms resided in the quantum well layer. Through the inter-diffusion, band gap of the quantum wells is modified and a PL blueshift is achieved.

Description

200908373 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種量子井(quantum wen, QW〇混合方 法,特別是關於將缺陷與原子交互擴散,以便調整量子丼 層之能階結構’錯此使發光波長大幅度藍移之量子井混合 方法。 【先前技術】 請爹照笫1A圖至弟1B圖所示,習用量子井混合方法 ,其包含下列步驟:提供一半導體基板91,於該半導體 基板91上依序以磊晶堆疊方式形成一第一半導體層92, c 一發光層93及一第二半導體層94,其中該發光層93内設 」有一量子井層’且該量子井層具有至少一缺陷932。該缺 陷932係於製作該量子井層時,運用離子佈植技術以約為 360keV之加速電壓將加速離子931植入量子井層中,藉此 達到光積體元件波長藍移之目的。其中,該加速離子931 可選擇為鋅〔Zn〕、石夕〔Si〕、硼〔b〕及磷〔P〕等之 離子。 近幾年來,由於光積體元件不斷的發展與需求,將 不同發光波長兀件整合在同一晶片上已成為業界須迫切解 決之關鍵技術〔即如上所述將發光波長藍移之技術〕。上 述習用量子井混合方法乃係運用離子佈植技術。 一般而言,上述習用具有下列缺點,例如:在量子 井的構造上,由於其製造方法係藉由加速電壓直接在該量 子井中加入欲植入之原子,故將容易對該晶月造成不必要 PK10344 2007/8/7 — ^ 200908373 之破壞。為避免不必要之破壞,因此在製程之參數設定及 製程中參數之穩定度控制要求較高,以致實際操作較為困 難。再者,習用量子井混合方法,在量子井的應用上,調 整量子井能階結構之方法乃於量子井中植入原子,被植二 之原子將造成缺陷,該些缺陷形成非輻射複合中心,進而 減低該晶片之發光效率。 此外,在成本考量上,其進行此習用量子井混合方 法之花費昂貝,而在產品製程上,此方法之技術較為複雜 且操作不易。倘若長期使用該光積體元件,甚至影響其功 能穩定性及使用壽命。基於上述原因,有必要進—步改良 上述習用量子井混合方法,以將波導工作區的波長藍移至 短波長。 【發明内容】 有鑑於此,本發明改良上述之缺點,其由量子井層 之複數個原子、第一半導體層表面之缺陷、及絕緣層之缺 陷交互擴散並混合,以便調整量子井層之能階結構。藉此 ^發㈣實可姆提升光積體元叙發光波長藍移量, 提高發光效率’進*相對延長光積體元件之使用壽命。 本發明主要目的係提供—種量子井昆合方法,其係 由一置子井層之數個原子、—第二半導體層之缺陷及一絕 緣層之顧交互擴散並混合,使雜與原子交互擴散,以 便5周整1子井層之能階結構,使得本發 體元件之發紐射產生較㈣藍移^ 本發明次要目的係提供量子井混合方法,其係提供 PK10344 2007/8/7 200908373 -,-半導體層、—量子井層及—第二半導體層,並藉由 a里子井層之數個原子、該第二半導體層之數個缺陷及該 、、’巴數個缺^父互擴散並混合,使得本發明具有降低 製造ft、簡化製料蚊簡成品結構之功效。 ^本& $之里子井混合方法,其包含下列步驟: 提仏半導體基板’辭導雌板上依序堆疊侃一第一 半導rt—發光層及—第二半導體層以形成—蟲晶片, 其中杯光層具有至少—量子井層;於外露該第二半導體 層之-表面形成數個缺陷;於該表面上形成—絕緣層,且 該ϊΐί具有數個缺陷;使該量子·之數悔'子、該第 一、層之缺陷及該絕緣層之缺陷交互擴散並混合,以 達成鲞光波長藍移之目標。 【實施方式】 s§Jt2°表:叙明之上述及其他目的、特徵、優點能更明 ,文特舉本發明之難實施例,並配合所附圖4 ,作詳細說明如下: ft圖式 第2A圖所示,本發明較佳實施例之第— 基板1 ’並於該半導體基板1上依序二 _成-體層2一發光層3及一第二半導體層且4 請參照第2B圖所示,本發明較佳實施例 係於該第二半導體# 4之— 乐一步驟 第二半導體層4之厂;产4=成數個缺陷41,且減少 該第二半導體層4之二側7表面相對該發光層3位於 之另側。该缺陷41較佳選擇以乾式蝕 PK10344 2007/8/7 200908373 刼用感應式耦合電漿 粒子42碰撞該表面 刻方式形成,且此一乾式飾刻方式係 性独刻,亦即加速一電漿之數個帶電 以進行蝕刻。 請參照第2C圖所不,本發明較佳實施例 係於該第二半導㈣4之表面场錢散之-崎^ 5 ’且該絕緣層5具減個缺陷5卜該絕緣層5較佳選擇 以舰方式於該第二半導體層4之表面形成。在本實施例 中’該絕緣層5之材料選自二氧切卿2),濺鍍方法較佳 將功率控制在200瓦,過程中通入流量為22 5氣體質量流 量單位(Standard Cubic Centimeter per Minute,以下簡稱 seem)的氬氣(Ar)和2.5sccm的氧氣(〇2),濺鍍過程中腔體 壓力維持在6毫托(mTorr) ’濺鍍時間為30分鐘’可沉積 厚度為300奈米(ηπι)的二氧化矽絕緣層。 請參照第2D圖所示’其係繪示本實施例形成缺陷前 之光積元件剖視圖。該發光層3具有至少一量子井層31, 其中分布有即將向外擴散之數個原子311。該發光層3另 具有二能障層32 ’分別設置於該量子井層31之二侧表面 ’其一接近該第一半導體層2,另一接近該第二半導體層4 。該量子井層31較佳係應用為一波導工作區,另外,該 置子井層31之材料係選自InxGakAsyPi-y及InxGal-xAs之 一’其中該x、y、1-x及Ι-y均大於0 ;而該能障層32之 之材料係選自InxGa^AsyP】-y及InxGai-x-yA〗yAs之一,其中 口亥x y、1-χ、l_y及〗_x_y均大於〇。 。亥星子井層31將形成之空洞其來源係為係為該量子 PK10344 2007/8/7 200908373 井層31之數個原子311將向外擴散至該第二半導體層4 之該表面後所產生之空洞(容後詳述),向外擴散之該原子 311 —般為三族原子,例如,姻原子或録原子;該缺陷來 源將於本實施例量子井混合方法實施時,於該量子井層 31内外交互擴散,以便調整量子井層之能階結構,藉此 達成發光波長藍移量增加。 請參照第2E圖所示,本發明較佳實施例之第四步驟 係於該量子井層31内形成數個空洞312。更詳言之,當該 磊晶片進行快速的高溫回火時,原子311將向外擴散至該 第二半導體層4之該表面,而原子311原本所在的位置即 形成空洞312。 藉此,該量子井層31之數個原子、該第二半導體層4 表面之缺陷41及該絕緣層5之缺陷51交互擴散並混合, 以於該量子井層31形成空洞312。另外,加熱該磊晶片交 互擴散並混合之步驟係以高溫回火方式達成,而高溫回火 之溫度範圍為攝氏650〜800度。 請再次參照第2D及2E圖所示,由於原子311需與缺 陷41及51互相擴散交換,故本發明之第二半導體層4必 須具有一較薄之厚度,此一厚度可以使得該數個原子311 、缺陷41及缺陷51進行交互擴散及混合。當利用本發明 之量子井混合方法進行磊晶片製造,且該第二半導體層4 之材料選擇為huGa^AsylVy時,該第二半導體層4之厚度 較佳為1800至2000奈米;而當該第二半導體層4之材料 選擇為InxGai-x-yAlyAs時,該第二半導體層4之厚度較佳 PK10344 2007/8/7 —9 — 200908373 =奈其中In代表銦、Ga代表鎵、As代表坤、p n A1代表鋁。此外,於實際應用上,可、隹. 二女楚-0_ · 」遲—步將 〜弗—半導體層4表面之該缺陷及該絕緣層5 一步進行後續製程。 去除’以進 _ 請參照第3 _示,其騎示實驗所採用之本發明較 二^例之樣品剖面圖。該半導體基板i材料成分採㈣ 化姻(InP)。—半導㈣2為_ N型半導體層,並採用 InGaAsP材料。該發光層3係由三層相同結構之單一發光 層結構堆疊而成,共包含三層量子井層31及四層能障層 32,且各該單一量子井層31之二側,其皆分別結合一該能 障層32 ’以形成單一發光層結構,換言之,各單一發^ 層結構係由一層該量子井層31及二層該能障層32組成, 其中該量子井層31之材料為^lmGamAso.79?。.2!,其厚度 為8.4奈米;而該能障層32之之材料係為 In〇.57Ga(K43As〇.64P〇.36 ’其厚度為4.2奈米。最後,該第二半 導體層4係為一 P型半導體層,其包含有保護層 46(protecting cap)、侷限層 45 (cladding layer)、濕式蝕刻 保護層 44 (stop-etch layer)、及空乏層 43(depletion layer) 。同時該第一半導體層2、該發光層3及該第二半導體層4 之形成方式,係應用M0CVD化學氣相沉積方式 (metal-organic chemical vapor deposition)依序將其堆叠形 成於該半導體基板1上。 請參照第4圖所示,其係繪示由實驗所得之本發明較 佳實施例之藍移光譜圖。其中該發光層3具有至少一量子 PK10344 2007/8/7 —10 200908373 井層31,該量子井層31之材料為In〇.77GaQ.23ASQ.79P().21 ’其 所產生之發光波長係由1566奈米藍移至短波長1474奈米 ,總藍移量為92奈米。藉此,本案光積體元件之發光波 長可產生較大的藍移量。 雖然本發明已利用上述較佳實施例揭示,然其並非 用以限定本發明,任何熟習此技藝者,在不脫離本發明之 精神和範圍之内,當可作各種更動與修改,因此本發明之 保護範圍當視後附之申請專利範圍所界定者為準。200908373 IX. INSTRUCTIONS: [Technical field of the invention] The present invention relates to a quantum well (QW〇 hybrid method, in particular to interdiffusion of defects with atoms in order to adjust the energy level structure of the quantum layer) The quantum well mixing method for greatly shifting the wavelength of light emission. [Prior Art] Please refer to the conventional quantum well mixing method as shown in FIG. 1A to FIG. 1B, which includes the following steps: providing a semiconductor substrate 91, A first semiconductor layer 92, a light emitting layer 93 and a second semiconductor layer 94 are formed on the semiconductor substrate 91 in an epitaxial stacking manner, wherein the light emitting layer 93 has a quantum well layer and the quantum well layer Having at least one defect 932. The defect 932 is used in the fabrication of the quantum well layer, and the accelerated ion 931 is implanted into the quantum well layer by an ion implantation technique at an acceleration voltage of about 360 keV, thereby achieving the wavelength blue of the illuminating element. For the purpose of shifting, the accelerating ions 931 may be selected from ions such as zinc [Zn], shixi [Si], boron [b], and phosphorus [P]. Continuous development and demand, the integration of different light-emitting wavelength components on the same wafer has become a key technology that the industry must urgently solve (that is, the technology of blue-shifting the emission wavelength as described above). The above-mentioned conventional quantum well mixing method uses ions. In general, the above-mentioned drawbacks have the following disadvantages, for example, in the construction of a quantum well, since the manufacturing method is to directly add atoms to be implanted in the quantum well by accelerating voltage, the crystal will be easily The month caused unnecessary damage to PK10344 2007/8/7 — ^ 200908373. In order to avoid unnecessary damage, the stability control requirements of parameters in the parameter setting and process of the process are high, so that the actual operation is more difficult. Conventional quantum well mixing method, in the application of quantum wells, the method of adjusting the energy level structure of quantum wells is to implant atoms in quantum wells, and the atoms implanted by the two will cause defects, and these defects form a non-radiative recombination center, thereby reducing the The luminous efficiency of the wafer. In addition, in terms of cost considerations, the cost of this conventional quantum well mixing method is high. In the product process, the technology of this method is more complicated and difficult to operate. If the illuminating element is used for a long time, it may even affect its functional stability and service life. For the above reasons, it is necessary to further improve the above-mentioned conventional quantum well mixing. The method is to blue shift the wavelength of the waveguide working region to a short wavelength. SUMMARY OF THE INVENTION In view of the above, the present invention improves the above disadvantages by a plurality of atoms of a quantum well layer, defects of the surface of the first semiconductor layer, and insulation. The defects of the layer are mutually diffused and mixed, so as to adjust the energy level structure of the quantum well layer. Thereby, the (4) Shikomu enhances the blue shift of the illuminating wavelength of the illuminating body element, and improves the luminous efficiency. The main purpose of the present invention is to provide a quantum well bonding method in which a plurality of atoms of a well layer, a defect of a second semiconductor layer, and an insulating layer are mutually diffused and mixed. The interaction between the impurity and the atom, so that the energy level structure of the whole sub-well layer is 5 weeks, so that the hair-emitting of the hair-generating component is more than (4) blue-shifting. A quantum well mixing method for providing a PK10344 2007/8/7 200908373 -, a semiconductor layer, a quantum well layer, and a second semiconductor layer, and by a plurality of atoms of a sub-well layer, the second semiconductor layer The several defects and the fact that the 'bar number is missing' and the other are mutually diffused and mixed, so that the invention has the effects of reducing the manufacturing ft and simplifying the structure of the finished product of the mosquito. The present & $ lining method of mixing, comprising the following steps: splicing a semiconductor substrate 'speaking female board sequentially stacking a first semi-conductive rt-luminescent layer and a second semiconductor layer to form a worm wafer Wherein the cup light layer has at least a quantum well layer; on the surface on which the second semiconductor layer is exposed, a plurality of defects are formed; an insulating layer is formed on the surface, and the ϊΐ 具有 has a plurality of defects; The defects of the first, the first layer, and the defects of the insulating layer are mutually diffused and mixed to achieve the goal of blue shifting of the wavelength of the illuminating light. [Embodiment] s§Jt2° Table: The above and other objects, features and advantages of the present invention will be more apparent, and the difficult embodiments of the present invention will be described in detail with reference to FIG. 4 as follows: ft pattern As shown in FIG. 2A, the first substrate 1' of the preferred embodiment of the present invention is sequentially formed on the semiconductor substrate 1 by a light-emitting layer 3 and a second semiconductor layer, and 4 is referred to in FIG. 2B. The preferred embodiment of the present invention is based on the second semiconductor layer 4 of the second semiconductor #4; the production of 4 = a plurality of defects 41, and reducing the surface of the second side of the second semiconductor layer 4 The light-emitting layer 3 is located on the other side. The defect 41 is preferably formed by dry etching PK10344 2007/8/7 200908373, in which the inductively coupled plasma particles 42 are collided with the surface, and the dry etching method is unique, that is, accelerating a plasma. Several of them are charged for etching. Referring to FIG. 2C, the preferred embodiment of the present invention is based on the surface of the second semiconductor (4) 4, and the insulating layer 5 has a reduced defect. It is selected to be formed on the surface of the second semiconductor layer 4 in a ship manner. In the present embodiment, the material of the insulating layer 5 is selected from the group consisting of dioxin 2, and the sputtering method preferably controls the power at 200 watts, and the flow rate in the process is 22 5 gas mass flow units (Standard Cubic Centimeter per Minute (hereinafter referred to as seem) argon (Ar) and 2.5 sccm of oxygen (〇2), the chamber pressure during sputtering is maintained at 6 mTorr (mTorr) 'sputter time is 30 minutes' deposit thickness is 300 Nano (ηπι) cerium oxide insulating layer. Referring to Fig. 2D, there is shown a cross-sectional view of the optical element before the defect is formed in the present embodiment. The luminescent layer 3 has at least one quantum well layer 31 in which is distributed a plurality of atoms 311 which are to be outwardly diffused. The light-emitting layer 3 further has two barrier layers 32' disposed on the two side surfaces of the quantum well layer 31, one adjacent to the first semiconductor layer 2 and the other adjacent to the second semiconductor layer 4. The quantum well layer 31 is preferably applied as a waveguide working area. In addition, the material of the set of well layers 31 is selected from one of InxGakAsyPi-y and InxGal-xAs where x, y, 1-x and Ι- y is greater than 0; and the material of the barrier layer 32 is selected from one of InxGa^AsyP]-y and InxGai-x-yA yAs, wherein the mouth xy, 1-χ, l_y and 〗 〖x_y are greater than 〇 . . The cavity formed by the Haixingzi well layer 31 is derived from the quantum PK10344 2007/8/7 200908373. The plurality of atoms 311 of the well layer 31 will be outwardly diffused to the surface of the second semiconductor layer 4. The void (detailed later), the atom 311 which is outwardly diffused is generally a triad atom, for example, an atom or a recorded atom; the source of the defect will be in the quantum well layer when the quantum well mixing method of the embodiment is implemented. 31 internal and external diffusion, in order to adjust the energy level structure of the quantum well layer, thereby achieving an increase in the blue shift of the emission wavelength. Referring to Figure 2E, the fourth step of the preferred embodiment of the present invention is to form a plurality of voids 312 in the quantum well layer 31. More specifically, when the epitaxial wafer is subjected to rapid high temperature tempering, the atoms 311 will diffuse outward to the surface of the second semiconductor layer 4, and the atoms 311 originally form a cavity 312. Thereby, the plurality of atoms of the quantum well layer 31, the defects 41 on the surface of the second semiconductor layer 4, and the defects 51 of the insulating layer 5 are mutually diffused and mixed to form a cavity 312 in the quantum well layer 31. In addition, the step of heating the epitaxial wafer to diffuse and mix is achieved by high temperature tempering, and the high temperature tempering temperature is in the range of 650 to 800 degrees Celsius. Referring again to FIGS. 2D and 2E, since the atoms 311 need to be diffusion-exchanged with the defects 41 and 51, the second semiconductor layer 4 of the present invention must have a thin thickness which allows the number of atoms to be 311, defect 41 and defect 51 are interactively diffused and mixed. When the epitaxial wafer fabrication is performed by the quantum well mixing method of the present invention, and the material of the second semiconductor layer 4 is selected to be huGa^AsylVy, the thickness of the second semiconductor layer 4 is preferably 1800 to 2000 nm; When the material of the second semiconductor layer 4 is selected as InxGai-x-yAlyAs, the thickness of the second semiconductor layer 4 is preferably PK10344 2007/8/7 - 9 - 200908373 = where In represents Indium, Ga represents gallium, and As represents Kun. Pn A1 represents aluminum. In addition, in practical applications, it is possible to carry out the subsequent process of the defect on the surface of the semiconductor layer 4 and the insulating layer 5 in a step-by-step manner. Remove 'to enter' _ Please refer to the third _, which is a cross-sectional view of a sample of the present invention used in the riding experiment. The material composition of the semiconductor substrate i is (4) aging (InP). - Semiconducting (4) 2 is an _N type semiconductor layer and is made of InGaAsP material. The light-emitting layer 3 is formed by stacking three single-layer light-emitting layer structures of the same structure, and comprises three layers of quantum well layers 31 and four layers of energy barrier layers 32, and two sides of each of the single quantum well layers 31 are respectively Combining an energy barrier layer 32' to form a single light-emitting layer structure, in other words, each single-layer structure is composed of a layer of the quantum well layer 31 and two layers of the barrier layer 32, wherein the material of the quantum well layer 31 is ^lmGamAso.79?. .2!, the thickness of which is 8.4 nm; and the material of the barrier layer 32 is In〇.57Ga (K43As〇.64P〇.36' having a thickness of 4.2 nm. Finally, the second semiconductor layer 4 It is a P-type semiconductor layer comprising a protective cap 46, a cladding layer, a stop-etch layer 44, and a depletion layer 43. The first semiconductor layer 2, the light-emitting layer 3, and the second semiconductor layer 4 are formed by sequentially stacking metal-organic chemical vapor deposition on the semiconductor substrate 1 by using a metal-organic chemical vapor deposition method. Please refer to FIG. 4, which is a blue-shifted spectrum of the preferred embodiment of the present invention obtained by experiments. The light-emitting layer 3 has at least one quantum PK10344 2007/8/7 - 10 200908373 well layer 31. The material of the quantum well layer 31 is In〇.77GaQ.23ASQ.79P().21', and the emitted wavelength of the light is shifted from 1566 nm to a short wavelength of 1474 nm, and the total blue shift is 92 nm. Thereby, the illuminating wavelength of the illuminating element of the present invention can generate a large amount of blue shift. The present invention has been disclosed by the above-described preferred embodiments, and it is not intended to limit the invention, and the invention can be modified and modified without departing from the spirit and scope of the invention. The scope is subject to the definition of the scope of the patent application attached.

PK10344 2007/8/7 ——11—— 200908373 【圖式簡單說明】 第1A圖至第1B圖:習用量子井混合方法之示意圖。 第2A圖至第2E圖:本發明較佳實施例之量子井混合 方法之示意圖。 第3圖:本發明較佳實施例之樣品剖面圖。 第4圖:本發明較佳實施例之藍移光譜圖。 【主要元件符號說明】 1 半導體基板 2 第一半導體層 3 發光層 31 量子井層 311 原子 312 空洞 32 能障層 4 第二半導體層 41 缺陷 42 帶電粒子 43 空乏層 44 濕式蝕刻保護 45 侷限層 46 保護層 5 絕緣層 . 51 缺陷 91 半導體基板 92 第一半導體層 93 發光層 931 加速離子 932 缺陷 94 第二半導體層 PK10344 2007/8/7 12PK10344 2007/8/7 ——11—— 200908373 [Simple description of the diagram] Figure 1A to Figure 1B: Schematic diagram of the conventional quantum well mixing method. 2A to 2E are schematic views of a quantum well mixing method in accordance with a preferred embodiment of the present invention. Figure 3 is a cross-sectional view of a sample of a preferred embodiment of the invention. Figure 4: Blue shift spectrum of a preferred embodiment of the invention. [Main component symbol description] 1 Semiconductor substrate 2 First semiconductor layer 3 Light-emitting layer 31 Quantum well layer 311 Atomic 312 Cavity 32 Energy barrier layer 4 Second semiconductor layer 41 Defect 42 Charged particles 43 Depletion layer 44 Wet etching protection 45 Localized layer 46 protective layer 5 insulating layer. 51 defect 91 semiconductor substrate 92 first semiconductor layer 93 light-emitting layer 931 accelerated ion 932 defect 94 second semiconductor layer PK10344 2007/8/7 12

Claims (1)

200908373 十、申請專利範圍: 1、 一種量子井混合方法,其包含下列步驟: 提供一半導體基板; 於該半導體基板上依序堆疊形成一第一半導體層、一 發光層及一第二半導體層,以形成一磊晶片,其中該 發光層具有至少一量子井層; 於該第二半導體層之一表面形成數個缺陷; 於該表面上形成一絕緣層,且該絕緣層具有數個缺陷 ;使該量子井層之數個原子、該第二半導體層之缺陷 及該絕緣層之缺陷交互擴散並混合,使該些缺陷與該 些原子交互擴散,以便調整量子井層之能階結構'藉 __________ 此提高發光波長藍移量。 -.i, '.V J二'、> , 2、 依申請專利範圍第1項所述之量子井混合方法,其中 使該量子井層之數個原子、該第二半導體層之缺陷及 該絕緣層之缺陷交互擴散並混合之步驟係利用高溫回 火方式達成。 3、 依申請專利範圍第2項所述之量子井混合方法,其中 該高溫回火之溫度為攝氏650〜800度。 4、 依申請專利範圍第1項所述之量子井混合方法,其中 該第二半導體層之表面係利用乾式蝕刻方式形成該缺 陷。 5、 依申請專利範圍第4項所述之量子井混合方法,其中 該乾式姓刻方式係為感應式_合電漿性#刻。 6、 依申請專利範圍第1項所述之量子井混合方法,其中 PK10344 2007/8/7 13 — 200908373 該第二半導體層之表面係利用濺鍍方式形成該絕緣層 〇 7、 依申請專利範圍第6項所述之量子井混合方法,其中該 濺鍍方式較佳係設定為功率200瓦,通入流量為22.5 氣體質量流量單位的氬氣和2.5氣體質量流量單位的 氧氣,濺鍍過程中腔體壓力維持在6毫托,濺鍍時間為 30分鐘,沉積厚度為300奈米的二氧化石夕絕緣層。 8、 依申請專利範圍第1項所述之量子井混合方法,其中 該發光層另具有二能障層,該二能障層分別位於該發 光層鄰近該第一半導體層及一第二半導體層之處。 9、 依申請專利範圍第1項所述之量子井混合方法,其中 該量子井層之材料係選自IrixGai-xAsyPi-y及InxGai-xAs 之一,且該X、y、1-x及1-y均大於0。 10、 依申請專利範圍第1項所述之量子井混合方法,其中 該些能障層之之材料係選自InxGai-xAsyPi-y及 IruGai-x-yAlyAs 之一,且該 X、y、1-X、1-y、1-x-y 均大 於0。 11、 依申請專利範圍第1項所述之量子井混合方法,另包 含將該第二半導體層表面之該缺陷及該絕緣層去除之 步驟,以進一步進行後續製程。 12、 依申請專利範圍第1項所述之量子井混合方法,其中 該絕緣層之材料係為二氧化石夕。 13、 依申請專利範圍第1項所述之量子井混合方法,其中 該絕緣層之厚度為300nm。 PK10344 2007/8/7 14 200908373 - 14、 依申請專利範圍第1項所述之量子井混合方法,其中 該第二半導體層之材料為IllxGai-xASyPl—y ’其厚度為 • 1800至2000奈米,且該X、y、1-X及Ι-y均大於0。 15、 依申請專利範圍第1項所述之量子井混合方法,其中 該第二半導體層之材料為InxGai-x-yAlyAs,其厚度為 1000奈米,且該X、y、Ι-χ-y均大於0。 PK10344 2007/8/7 15200908373 X. Patent application scope: 1. A quantum well mixing method, comprising the steps of: providing a semiconductor substrate; sequentially forming a first semiconductor layer, a light emitting layer and a second semiconductor layer on the semiconductor substrate; Forming an epitaxial wafer, wherein the luminescent layer has at least one quantum well layer; forming a plurality of defects on a surface of the second semiconductor layer; forming an insulating layer on the surface, and the insulating layer has a plurality of defects; The plurality of atoms of the quantum well layer, the defects of the second semiconductor layer, and the defects of the insulating layer are mutually diffused and mixed, and the defects are mutually diffused with the atoms to adjust the energy level structure of the quantum well layer. _________ This increases the blue shift of the illuminating wavelength. -.i, '.VJ二', >, 2. The quantum well mixing method according to claim 1, wherein a plurality of atoms of the quantum well layer, defects of the second semiconductor layer, and the The steps of mutually diffusing and mixing the defects of the insulating layer are achieved by high temperature tempering. 3. The quantum well mixing method according to item 2 of the patent application scope, wherein the high temperature tempering temperature is 650 to 800 degrees Celsius. 4. The quantum well mixing method according to claim 1, wherein the surface of the second semiconductor layer is formed by dry etching. 5. The quantum well mixing method according to item 4 of the patent application scope, wherein the dry type engraving method is an inductive type. 6. The quantum well mixing method according to claim 1, wherein the surface of the second semiconductor layer is formed by sputtering to form the insulating layer 、7, according to the patent application scope. The quantum well mixing method according to Item 6, wherein the sputtering method is preferably set to a power of 200 watts, and an argon gas having a flow rate of 22.5 gas mass flow units and an oxygen gas of 2.5 gas mass flow units are introduced during the sputtering process. The chamber pressure was maintained at 6 mTorr, the sputtering time was 30 minutes, and a 300 nm thickness of a dioxide insulating layer was deposited. 8. The quantum well mixing method according to claim 1, wherein the light emitting layer further has a dual energy barrier layer, wherein the two energy barrier layers are respectively located adjacent to the first semiconductor layer and a second semiconductor layer. Where. 9. The quantum well mixing method according to claim 1, wherein the material of the quantum well layer is selected from one of IrixGai-xAsyPi-y and InxGai-xAs, and the X, y, 1-x and 1 -y is greater than 0. 10. The quantum well mixing method according to claim 1, wherein the material of the barrier layer is selected from one of InxGai-xAsyPi-y and IruGai-x-yAlyAs, and the X, y, 1 -X, 1-y, 1-xy are all greater than zero. 11. The quantum well mixing method according to claim 1, further comprising the step of removing the defect on the surface of the second semiconductor layer and the insulating layer to further perform a subsequent process. 12. The method of mixing quantum wells according to claim 1, wherein the material of the insulating layer is sulphur dioxide. 13. The quantum well mixing method according to claim 1, wherein the insulating layer has a thickness of 300 nm. PK10344 2007/8/7 14 200908373 - 14. The quantum well mixing method according to claim 1, wherein the material of the second semiconductor layer is IllxGai-xASyPl-y 'the thickness is 1800 to 2000 nm. And X, y, 1-X and Ι-y are all greater than zero. 15. The quantum well mixing method according to claim 1, wherein the material of the second semiconductor layer is InxGai-x-yAlyAs, the thickness of which is 1000 nm, and the X, y, Ι-χ-y Both are greater than zero. PK10344 2007/8/7 15
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI818580B (en) * 2022-06-09 2023-10-11 國立清華大學 Manufacturing method of semiconductor device

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