200820596 九、發明說明： • 【發明所屬之技術領域】 本案係關於一種儀表放大器，尤其是關於一種用於處理 神經訊號之儀表放大器。 【先前技術】 在神經訊號的量測應用上，常見的問題包括，一是來自 環境的雜訊，二是神經訊號本身的強度太過微弱，三是設 Φ 計本身產生的雜訊干擾，最後是用以連結神經之電極產生 的直流電壓準位漂移。因此，必須先解決上述問題後，才 能感測與擷取較為可靠的神經訊號。 首先，從各種醫學文獻中得知神經訊號的頻帶在100 Hz〜7 KHz之間，在此頻帶之外的訊號，都可視為環境雜 訊’可用渡波器渡除。在先前的技術中，最典型的便是利 用主動式電阻-電容濾波技術，可參考習知技術[1](R. R· Harrison, ffA low power, low noise CMOS amplifier for _ neural recording application5f, 2003 IEEE J. of Solid-State Circuits, vol. 385 no. 6, pp. 958-965, June. 2003.) ^ it# 6¾ 技術是最簡單的儀表放大器實施方式。 另一先前技術係利用gm-C架構，將大電阻利用適當電 路轉導方式來替代，並將電阻值適度降低至適合積體化的 大小，可參考習知技術[2](A. Uranga，N. Lago, X· Navarro, and N. Barniol, ffA low noise CMOS amplifier for ENG signals/1 in Proc. The 2004 IEEE International Symposium . on Circuits and Systems (ISCAS 2004), vol. 4, pp. 21 -24, 113768.doc 200820596200820596 IX. Description of the invention: • [Technical field to which the invention pertains] This case relates to an instrumentation amplifier, and more particularly to an instrumentation amplifier for processing a neural signal. [Prior Art] In the measurement of neural signals, common problems include, first, noise from the environment, second, the intensity of the neural signal itself is too weak, and third, the noise interference generated by the Φ meter itself, and finally It is used to connect the nerve electrode to generate DC voltage level drift. Therefore, it is necessary to solve the above problems before sensing and capturing more reliable neural signals. First, it is known from various medical literature that the frequency band of the neural signal is between 100 Hz and 7 KHz, and signals outside the frequency band can be regarded as environmental noises. In the prior art, the most typical one is to use active resistance-capacitance filtering technology, and can refer to the prior art [1] (R. R. Harrison, ffA low power, low noise CMOS amplifier for _ neural recording application 5f, 2003 IEEE J. of Solid-State Circuits, vol. 385 no. 6, pp. 958-965, June. 2003.) ^ it# 63⁄4 Technology is the simplest instrumentation amplifier implementation. Another prior art uses the gm-C architecture to replace large resistors with appropriate circuit transduction methods and moderately reduce the resistance values to fit the size of the integrated system. Reference can be made to the prior art [2] (A. Uranga, N. Lago, X. Navarro, and N. Barniol, ffA low noise CMOS amplifier for ENG signals/1 in Proc. The 2004 IEEE International Symposium. on Circuits and Systems (ISCAS 2004), vol. 4, pp. 21 -24 , 113768.doc 200820596
May 2004.)。但是這樣的技術缺點是在設計時無法將多個 極點自由的調整至適當的頻率，造成單一濾波級頻寬狹窄 的問題。 其他先前技術請參考習知技術[3](美國專利第6,556,077 號，"Instrumentation amplifier with improved AC common mode rejection performance"，April 29，2003)、習知技術 [4](美國專利第 5,654,669號，nProgrammable instrumentation amplifier”，August 5，1997)及習知技術[5](美國專利第 4,833,422號，"Programmable gain instrumentation amplifier’’， May 23, 1989)，上述習知技術[1][2][3][4][5]皆未考慮神經 電極產生的直流電壓準位漂移，當產生大幅直流準位變化 時，將使得電路無法正常操作。 因此，實有必要提供一種創新且富進步性用於處理神經 訊號之儀表放大器，以解決上述問題。 【發明内容】 本發明之目的在於提供一種用於處理神經訊號之儀表放 大器，其包括：一前端放大器、一帶通濾波暨差動至單端 轉換器、一直流準位控制輸出級電路及一參考電流源電 路。該前端放大器用以接收以差動訊號方式輸入之神經訊 號，並將該神經訊號做第一次放大處理，以產生一第一級 輸出神經訊號。該帶通濾波暨差動至單端轉換器用以將該 第一級輸出神經訊號濾波處理，以濾除該神經訊號頻帶以 外之雜訊，並將該經濾波之神經訊號做第二次放大處理， 以及將該差動訊號方式之神經訊號轉換為單端方式之神經 113768.doc 200820596 訊號，以產生一第二級輸出神經訊號。該直流準位控制輸 出級電路用以調整該第二級輸出神經訊號之直流準位至一 設定範圍。該參考電流源電路用以依據—參考電壓源，產 生複數個參考電流源至該前端放大器及該直流準位控制輸 出級電路。 因此，本發明用於處理神經訊號之儀表放大器可將神經 汛唬頻帶以外的其他頻率之訊號予以濾除與隔絕，並將神 經訊號在雜訊極低的環境之下放大到可以被量測、紀錄、 及分析的訊號振幅，以便於做後級之訊號處理。再者，可 預先將神經訊號之直流電壓準位濾除，以預防神經電極產 生的直流電壓準位漂移。並且，將神經訊號轉換為一電氣 可記錄與分析之信號，亦即將差動輸入訊號轉為單端訊 號，及可控制輸出準位。 【實施方式】 參考圖1 ’其顯示本發明用於處理神經訊號之儀表袜大 器之方塊示意圖。本發明用於處理神經訊號之儀表放大器 10包括一前端放大器101、——帶通濾波暨差動至單端轉換 器102、一直流準位控制輸出級電路1〇3及一參考電流源電 路104。該前端放大器101用以接收以差動訊號方式輸入之 神經訊號（Vin+、Vin-)，並將該神經訊號做第一次放大處 理。 該帶通濾波暨差動至單端轉換器1〇2用以將該經第一次 放大處理之神經訊號濾波處理，以濾除該神經訊號頻帶以 外之雜訊，並將該經濾波之神經訊號做第二次放大處理， 113768.doc 200820596 以及將該差動訊號方式之神經訊號轉換為單端方式之神經 訊號。在本實施例中該神經訊號頻帶為1〇〇Ηζ〜7κΗζ。 該直流準位控制輸出級電路103用以調整該單端方式之 神經訊號之直流準位至一設定範圍，以適合被後級電路量 測 '紀錄、及分析。該參考電流源電路1〇4用以依據一參 考電壓源（Vref)，產生複數個參考電流源（Irefl、Iref2)至 該岫端放大器1 〇 1及該直流準位控制輸出級電路丨〇3。在本 實施例中，第一參考電流源Irefl提供至該前端放大器 1 〇1，第二參考電流源1ref2提供至該直流準位控制輸出級 電路103。參考電壓源（Vref)提供至該帶通濾波暨差動至單 ^轉換為102及該直流準位控制輸出級電路丨〇3。參考電流 源之目的在於補償前兩級隨溫度飄移的誤差，此誤差是造 成通帶增益隨溫度飄移的原因。參考電壓源之目的是可以 用不同的參考電壓，決定帶通濾波器的低通轉折（3dB) 點、帶通增益、以及最後輸出的電壓範圍。 參考圖2，其顯示本發明之前端放大器1〇丨之電路示意 圖。該前端放大器101包括：一對直流準位濾波電路2〇 1、 一對輸入級傳導電路202、一對輸出級轉導電路203及一對 壓控電阻M205、M206、M207、M208。該對直流準位濾 波電路201用以接收以差動訊號方式輸入之神經訊號 (Vin+、Vin-)，並濾除該神經訊號之直流電壓準位，以濾 除因神經電極產生的電壓偏移（electrode-offset voltage)影 響。 該對輸入級傳導電路202及該對輸出級轉導電路203用以 113768.doc 200820596 產生一增益，以放大經濾除直流電壓準位之該神經訊號， 以產生一第一級輸出神經訊號（V2+、V2-)。在本實施例 中，係利用低雜訊的電路轉導放大器電路，其增益正比於 該對輸入級傳導電路202及該對輸出級傳導電路203之比 例。其中由於熱雜訊的產生反比於該對輪入級傳導電路 202 ’因此，在本實施例中於設計上加大輸入級的寬度以 增加其傳導能力，如此便能降低電路產生之熱雜訊，又可 提高增益。 壓控電阻（voltage-controlled resistor)M205、M206在於 提升增益，壓控電阻M207、M208則提供回授路徑將該第 一級輸出神經訊號回授至該輸入級傳導電路2〇2，以避免 因增益太大產生的訊號失真影響（dist〇rti〇ll effects)。 參考圖3，其顯示本發明之帶通濾波暨差動至單端轉換 器1〇2之電路示意圖。該帶通濾波暨差動至單端轉換器102 G括 對輸入電谷C301、0303、一對回授電容C302、 C304、一對回授電阻R3〇1、R3〇2、一輸出電容c3〇5及一 低雜訊低功率轉導放大器A3〇1。其中，輪入電容c3〇i及 回授電容C302用以決定一帶通增益。該對回授電阻 R301、R302用以決定一帶通之高通濾波點。該對回授電 P R301们02因電阻值相當大，因此在本實施例中可採 用晶片外掛SMD電阻之方式。此方式有兩個好處，一為可 以減少晶片内之熱雜訊產生，二則為即使產生雜訊，當其 要進二晶以部時也舍因晶只接腳的大電容效應而將影響 減到取小。該輪出電容C3〇5用以決定一通帶之低通轉折 113768.doc 200820596 該低雜訊低功率轉導放大器A301用以將該差動訊號方式 之神k訊就轉換為單端方式之神經訊號，並降低雜訊。該 低雜訊低功率轉導放大器A301具有一正回授端、一負回授 端及輸出端。該對輸入電容C301、C303分別具有一第 端及—第二端，該對輸入電容C301、C303之第一端分 別連接至該前端放大器之該第一級輸出神經訊號（V2+、 V2-)，該對輸入電容C301、C3〇3之第二端分別連接至該低 雜汛低功率轉導放大器A3〇1之該正‘回授端及該負回授端。 該低雜訊低功率轉導放大器A301之該負迴授端與該輸出 端之間並聯一回授電容C3〇2和一回授電阻R3〇i，該低雜 efl低力率轉導放大器A3〇i之該正回授端與該參考電壓源 (Vref)之間並聯另一回授電容C3〇4及另一回授電阻幻μ， 該低雜訊低功率轉導放大器㈣丨之該輸出端連接該輸出電 谷C305至一接地，該輸出端輸出一第二級輸出神經訊號 (Vo2) 〇 多考圖4，其顯示本發明之低雜訊低功率轉導放大器 A301之電路示意圖。該低雜訊低功率操作轉導放大器 A301之雜訊和該帶通濾波暨差動至單端轉換器ι〇2之關係 X V niJhemal ^y2 niJlicker C301 + C302 + Cin C301 v: _ thermalMay 2004.). However, such a technical disadvantage is that it is not possible to adjust a plurality of poles to an appropriate frequency freely at the time of design, resulting in a problem of narrow bandwidth of a single filter stage. For other prior art, please refer to the prior art [3] (U.S. Patent No. 6,556,077, "Instrumentation amplifier with improved AC common mode rejection performance", April 29, 2003), and the prior art [4] (U.S. Patent No. 5,654,669, nProgrammable instrumentation amplifier", August 5, 1997) and conventional techniques [5] (U.S. Patent No. 4,833,422, "Programmable gain instrumentation amplifier'', May 23, 1989), the above-mentioned prior art [1][2][ 3][4][5] do not consider the DC voltage level shift generated by the nerve electrode. When a large DC level change occurs, the circuit will not operate normally. Therefore, it is necessary to provide an innovative and progressive use. The present invention aims to provide an instrumentation amplifier for processing a neural signal, comprising: a front-end amplifier, a band-pass filter, and differential to single-ended conversion. a constant current level control output stage circuit and a reference current source circuit. The front end amplifier is configured to receive differential Signaling the input neural signal and performing the first amplification process to generate a first-level output neural signal. The band-pass filter and the differential to single-ended converter are used to output the first-level output neural signal. Filtering to filter out noise outside the neural signal band, and to perform the second amplification process on the filtered neural signal, and to convert the neural signal of the differential signal mode into a single-ended mode of nerve 113768.doc The signal is generated to generate a second-level output neural signal. The DC level control output stage circuit is configured to adjust the DC level of the second-level output neural signal to a set range. The reference current source circuit is used for reference. a voltage source generates a plurality of reference current sources to the front end amplifier and the DC level control output stage circuit. Therefore, the instrumentation amplifier for processing a neural signal of the present invention can filter signals of frequencies other than the neural crest band And isolation, and the nerve signal is amplified in the extremely low noise environment to the signal that can be measured, recorded, and analyzed. In order to facilitate the signal processing of the latter stage, in addition, the DC voltage level of the neural signal can be filtered out in advance to prevent the DC voltage level shift generated by the nerve electrode, and the neural signal is converted into an electrical recordable The signal of the analysis, that is, the differential input signal is converted into a single-ended signal, and the output level can be controlled. [Embodiment] Referring to FIG. 1 ' is a block diagram showing the instrument for processing a nerve signal of the present invention. The instrumentation amplifier 10 for processing a neural signal of the present invention includes a front end amplifier 101, a band pass filtering and differential to single-ended converter 102, a current level control output stage circuit 1〇3, and a reference current source circuit 104. . The front-end amplifier 101 is configured to receive a neural signal (Vin+, Vin-) input by a differential signal, and perform the first amplification process on the neural signal. The band pass filtering and differential to single-ended converter 1〇2 is configured to filter the first amplified signal of the neural signal to filter out noise outside the neural signal band, and filter the filtered nerve The signal is amplified a second time, 113768.doc 200820596 and the neural signal of the differential signal mode is converted into a single-ended neural signal. In this embodiment, the neural signal band is 1〇〇Ηζ~7κΗζ. The DC level control output stage circuit 103 is configured to adjust the DC level of the single-ended mode of the neural signal to a set range to be suitable for measurement, recording, and analysis by the subsequent stage circuit. The reference current source circuit 1〇4 is configured to generate a plurality of reference current sources (Iref1, Iref2) to the terminal amplifier 1 〇1 and the DC level control output stage circuit 依据3 according to a reference voltage source (Vref). . In the present embodiment, the first reference current source Iref1 is supplied to the front end amplifier 1 〇1, and the second reference current source 1ref2 is supplied to the DC level control output stage circuit 103. A reference voltage source (Vref) is provided to the band pass filter and differential to single conversion to 102 and the DC level control output stage circuit 丨〇3. The purpose of the reference current source is to compensate for the error of the first two stages with temperature drift, which is the cause of the passband gain drifting with temperature. The purpose of the reference voltage source is to determine the low-pass corner (3dB) point of the bandpass filter, the bandpass gain, and the voltage range of the final output with different reference voltages. Referring to Figure 2, there is shown a schematic circuit diagram of a front-end amplifier 1〇丨 of the present invention. The front-end amplifier 101 includes a pair of DC level filter circuits 2A1, a pair of input stage conduction circuits 202, a pair of output stage transfer circuits 203, and a pair of voltage control resistors M205, M206, M207, M208. The pair of DC level filter circuit 201 is configured to receive a neural signal (Vin+, Vin-) input by a differential signal, and filter the DC voltage level of the nerve signal to filter out the voltage offset generated by the nerve electrode. (electrode-offset voltage) effect. The pair of input stage conduction circuits 202 and the pair of output stage transduction circuits 203 generate a gain for 113768.doc 200820596 to amplify the neural signal filtered by the DC voltage level to generate a first level output neural signal ( V2+, V2-). In this embodiment, a low noise circuit transconductance amplifier circuit is utilized, the gain of which is proportional to the ratio of the pair of input stage conduction circuits 202 and the pair of output stage conduction circuits 203. Wherein, the generation of the thermal noise is inversely proportional to the pair of the wheeled conduction circuit 202'. Therefore, in the embodiment, the width of the input stage is increased in design to increase the conduction capability, thereby reducing the thermal noise generated by the circuit. , can increase the gain. The voltage-controlled resistors M205 and M206 are used to increase the gain, and the voltage-control resistors M207 and M208 provide a feedback path to feedback the first-stage output neural signals to the input-stage conduction circuit 2〇2 to avoid The signal distortion caused by the gain is too large (dist〇rti〇ll effects). Referring to Figure 3, there is shown a circuit diagram of the bandpass filtering and differential to single-ended converter 1A2 of the present invention. The band pass filter and differential to single-ended converter 102 G includes input power valleys C301 and 0303, a pair of feedback capacitors C302 and C304, a pair of feedback resistors R3〇1, R3〇2, and an output capacitor c3〇. 5 and a low noise low power transconductance amplifier A3〇1. The rounding capacitor c3〇i and the feedback capacitor C302 are used to determine a bandpass gain. The pair of feedback resistors R301 and R302 are used to determine a high pass filter point of a band pass. Since the resistance values of the pair of feedback powers P R 301 are relatively large, in the present embodiment, the method of external SMD resistors can be employed. This method has two advantages, one is to reduce the generation of thermal noise in the wafer, and the other is to affect the large capacitance effect of the crystal-only pin when it is to enter the second crystal even if noise is generated. Reduce to take small. The round-out capacitor C3〇5 is used to determine the low-pass transition of a passband. 113768.doc 200820596 The low-noise low-power transconductance amplifier A301 is used to convert the differential signal mode into a single-ended mode. Signal and reduce noise. The low noise low power transconductance amplifier A301 has a positive feedback terminal, a negative feedback terminal and an output terminal. The pair of input capacitors C301 and C303 respectively have a first end and a second end, and the first ends of the pair of input capacitors C301 and C303 are respectively connected to the first-stage output neural signals (V2+, V2-) of the front-end amplifier. The second ends of the pair of input capacitors C301, C3〇3 are respectively connected to the positive 'return terminal' and the negative feedback end of the low-noise low-power transconductance amplifier A3〇1. The negative feedback end of the low noise low power transconductance amplifier A301 and the output end are connected in parallel with a feedback capacitor C3〇2 and a feedback resistor R3〇i, the low impurity efl low force rate transconductance amplifier A3 Between the positive feedback terminal and the reference voltage source (Vref), another feedback capacitor C3 〇 4 and another feedback resistor μ μ, the low noise low power transconductance amplifier (4) 该 the output The terminal is connected to the output power valley C305 to a ground, and the output terminal outputs a second-stage output neural signal (Vo2). The multi-pattern 4 shows a circuit diagram of the low-noise low-power transconductance amplifier A301 of the present invention. The noise of the low noise low power operation transduction amplifier A301 and the bandpass filtering and differential to single-ended converter ι〇2 X V niJhemal ^y2 niJlicker C301 + C302 + Cin C301 v: _thermal
\6kT 3gm4\6kT 3gm4
l gmm J χΔ/ 113768.doc -11 - 200820596 其中Vni — thermal、Vni_fHcker為該低雜訊低功率轉導放大器 A301之輸入等效雜訊，Cin為該低雜訊低功率轉導放大器 A301之輸入等效電容，Vni_amp為該帶通濾波暨差動至單端 轉換器10 2之輸入等效雜訊。因此為降低雜訊產生，使 gm401>>gm403、gni4〇7以減少Vni thernal。該低雜訊低功率轉 導放大器A301之輸入級使用PMOS差動輸入對，且加大寬 度以減少Vni_fHeker，達到降低雜訊影響的目的。但是增加 輸入級寬度亦增加了 cin，所以選擇適當的輸入級寬度以讓 輸入等效雜訊降至最低（事實上C301»cin)。 參考圖5，其顯示本發明之直流準位控制輸出級電路ι〇3 之電路示意圖。該直流準位控制輸出級電路103具有一 PMOS源級隨耦器501，用以作為一缓衝器，用以調整該第 二級輸出神經訊號（Vo2)之直流電壓準位，並產生一輸出 神k訊號（Vout)。以將輸出神經訊號（v〇ut)之直流準位提 升以適合被後級電路量測、紀錄、及分析。該源級隨耦器 5〇1的輸出範圍亦相當足夠，若因為不同應用而使輸出需 要調整準位，可在輸出神經訊號（v〇ut)加上適當的電阻 值。 參考圖6，其顯示本發明之參考電流源電路1〇4之電路示 意圖。該參考電流源電路1〇4包括：一電壓轉換電流電路 602及一電流鏡電路6〇3。該電壓轉換電流電路6〇2用以將 «玄參考電壓源（Vref)轉換為一穩定電流，以抵抗電源偏移 變化之影響，適當調整尺寸以抗溫度與製程模型的變化。 該電流鏡電路603用以將該穩定電流以電流鏡產生複數個 113768.doc -12- 200820596 -參考電流源（Irefl、Iref2)。 ’ 參考圖7及圖8，其顯示本發明之儀表放大器以台灣積體 電路公司之0.35 um 2P4M CMOS製程佈局後所作的模擬。 其中’圖7為本發明之實施例的頻率響應在各種不同的 PVT(製程、電壓、溫度）角落的表現，其顯示在不同的環 3兄之下’足以濾出所需之100 Hz〜7 KHz之神經訊號頻帶。 圖8為本發明之實施例的共模拒斥比（c〇mm〇n_m〇de ratio，CMRR )在三十種不同的pVT(製程、電壓、溫度）角 落的表現，可見其不受環境變化之千擾，仍能維持高共模 拒斥比。在橫座標中，例如：2·97/25，其表示2 97為電 壓，25為溫度。ΤΤ表示：典型（Typical)之電晶體、；pF表 示··快速（Fast)之電晶體及SS表示：慢速（sl〇w)之電晶 體。 因此，本發明用於處理神經訊號之儀表放大器可將神經 訊號頻帶以外的其他頻率之訊號予以濾除與隔絕，並將神 經訊號在雜訊極低的環境之下放大到可以被量測、紀錄、 及分析的訊號振幅，以便於做後級之訊號處理。再者，可 預先將神經訊號之直流電壓準位濾除，以預防神經電極產 生的直流電壓準位漂移。並且，將神經訊號轉換為一電氣 可記錄與分析之信號，亦即將差動輪入訊號轉為單端訊 號’及可控制輸出準位。 惟上述實施例僅為說明本發明之原理及其功效，而非用 以限制本發明因此，習於此技術之人士可在不違背本發 月之精神對上述實施例進行修改及變化。本發明之權利範 113768.doc • 13 · 200820596 圍應如後述之申請專利範圍所列。 【圖式簡單說明】 圖1係本發明用於處理神經訊號之儀表放大器之方塊示 意圖； 圖2係本發明之前端放大器之電路示意圖； 圖3係本發明之帶通濾波暨差動至單端轉換器之電路示 意圖；l gmm J χΔ/ 113768.doc -11 - 200820596 where Vni — thermal, Vni_fHcker is the input equivalent noise of the low noise low power transconductance amplifier A301, and Cin is the input of the low noise low power transconductance amplifier A301 The equivalent capacitance, Vni_amp, is the input equivalent noise of the bandpass filter and the differential to single-ended converter 102. Therefore, in order to reduce noise generation, let gm401>>gm403, gni4〇7 reduce Vni thernal. The input stage of the low noise low power transduction amplifier A301 uses a PMOS differential input pair and increases the width to reduce Vni_fHeker to reduce the effects of noise. However, increasing the input stage width also increases cin, so choose the appropriate input stage width to minimize input equivalent noise (actually C301»cin). Referring to Figure 5, there is shown a circuit diagram of the DC level control output stage circuit ι〇3 of the present invention. The DC level control output stage circuit 103 has a PMOS source level follower 501 for use as a buffer for adjusting the DC voltage level of the second stage output neural signal (Vo2) and generating an output. God k signal (Vout). The DC level of the output neural signal (v〇ut) is increased to be suitable for measurement, recording, and analysis by the subsequent stage circuit. The output range of the source-level follower 5〇1 is also quite sufficient. If the output needs to be adjusted for different applications, an appropriate resistance value can be added to the output neural signal (v〇ut). Referring to Figure 6, there is shown a circuit schematic of a reference current source circuit 1〇4 of the present invention. The reference current source circuit 1〇4 includes a voltage conversion current circuit 602 and a current mirror circuit 6〇3. The voltage-converting current circuit 6〇2 is used to convert the “Xref reference voltage source (Vref) into a stable current to resist the influence of the power supply offset variation, and is appropriately sized to withstand changes in temperature and process models. The current mirror circuit 603 is configured to generate a plurality of 113768.doc -12-200820596 - reference current sources (Iref1, Iref2) by using the current mirror. Referring to Figures 7 and 8, there is shown a simulation of the instrumentation amplifier of the present invention after the layout of a 0.35 um 2P4M CMOS process from Taiwan Integrated Circuits Corporation. Wherein Figure 7 is a representation of the frequency response of various embodiments of the present invention in various PVT (process, voltage, temperature) corners, which are shown below the different ring 3 brothers 'sufficient to filter out the required 100 Hz~7 KHz neural signal band. 8 is a representation of a common mode rejection ratio (c〇mm〇n_m〇de ratio, CMRR) in thirty different pVT (process, voltage, temperature) corners of an embodiment of the present invention, showing that it is not subject to environmental changes. The interference can still maintain a high common mode rejection ratio. In the abscissa, for example, 2·97/25, it means that 2 97 is the voltage and 25 is the temperature. ΤΤ indicates: a typical (Typical) transistor; pF means · Fast (Fast) transistor and SS means: slow (sl〇w) electro-crystal. Therefore, the instrumentation amplifier for processing a neural signal of the present invention can filter and isolate signals of frequencies other than the neural signal band, and amplify the neural signal in a very low noise environment to be measured and recorded. And the amplitude of the analyzed signal, in order to do the signal processing of the latter stage. Furthermore, the DC voltage level of the neural signal can be filtered out in advance to prevent the DC voltage level shift generated by the nerve electrode. Moreover, the neural signal is converted into an electrical recordable and analyzable signal, that is, the differential turn-in signal is converted to a single-ended signal and the controllable output level is controlled. However, the above embodiments are merely illustrative of the principles of the present invention and the advantages thereof, and are not intended to limit the present invention, and those skilled in the art can modify and change the above embodiments without departing from the spirit of the present invention. The scope of the invention is set forth in the scope of the patent application as described below. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an instrumentation amplifier for processing a neural signal according to the present invention; FIG. 2 is a schematic diagram of a circuit of a front-end amplifier of the present invention; FIG. 3 is a band-pass filter of the present invention and differential to single-ended Circuit diagram of the converter;
圖4係本發明之低雜訊低功率轉導放大器之電路示意 圖； 圖5係本發明之直流準位控制輸出級之電路示意圖； 圖6係本發明之參考電流源電路之電路示意圖； 圖7係本發明實施例的頻率響應在不同環境之下的模擬 圖；及 圖8係本發明實施例的共模拒斥比在不同環境之下的模 擬圖。 【主要元件符號說明】 10 本發明用於處理神經訊號之儀表放大 101 前端放大器 102 帶通濾波暨差動至單端轉換器 103 直流準位控制輸出級電路 104 麥考電流源電路 201 直流準位濾波電路 202 輪入级傳導電路 203 輸出級傳導電路 器 113768.doc -14· 200820596 A301 低雜訊低功率轉導放大器 501 源級隨柄裔 602 電壓轉換電流電路 603 電流鏡電路 113768.doc -15-4 is a schematic circuit diagram of a low noise low power transconductance amplifier of the present invention; FIG. 5 is a circuit diagram of a DC level control output stage of the present invention; FIG. 6 is a circuit diagram of a reference current source circuit of the present invention; A simulation diagram of the frequency response of the embodiment of the present invention under different environments; and FIG. 8 is a simulation diagram of the common mode rejection ratio of the embodiment of the present invention under different environments. [Main component symbol description] 10 The invention is used for processing the signal amplification of the neural signal 101 Front-end amplifier 102 Band-pass filtering and differential to single-ended converter 103 DC level control output stage circuit 104 McCaw current source circuit 201 DC level Filter circuit 202 wheeled stage conduction circuit 203 output stage conduction circuit device 113768.doc -14· 200820596 A301 low noise low power transconductance amplifier 501 source level with handle 602 voltage conversion current circuit 603 current mirror circuit 113768.doc -15 -