TW200818410A - Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology - Google Patents

Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology Download PDF

Info

Publication number
TW200818410A
TW200818410A TW096129941A TW96129941A TW200818410A TW 200818410 A TW200818410 A TW 200818410A TW 096129941 A TW096129941 A TW 096129941A TW 96129941 A TW96129941 A TW 96129941A TW 200818410 A TW200818410 A TW 200818410A
Authority
TW
Taiwan
Prior art keywords
floating gate
region
well region
floating
regions
Prior art date
Application number
TW096129941A
Other languages
English (en)
Chinese (zh)
Inventor
Alexander Kalnitsky
John M Caruso
Original Assignee
Intersil Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intersil Inc filed Critical Intersil Inc
Publication of TW200818410A publication Critical patent/TW200818410A/zh

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C27/00Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/005Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/60Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the control gate being a doped region, e.g. single-poly memory cell
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • H10D30/683Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418Disturbance prevention or evaluation; Refreshing of disturbed memory data

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW096129941A 2006-08-21 2007-08-14 Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology TW200818410A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US83926206P 2006-08-21 2006-08-21
US11/639,658 US7759727B2 (en) 2006-08-21 2006-12-14 Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology

Publications (1)

Publication Number Publication Date
TW200818410A true TW200818410A (en) 2008-04-16

Family

ID=38776179

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096129941A TW200818410A (en) 2006-08-21 2007-08-14 Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology

Country Status (6)

Country Link
US (1) US7759727B2 (https=)
EP (1) EP2067169A1 (https=)
JP (1) JP2010502013A (https=)
CN (1) CN101506968B (https=)
TW (1) TW200818410A (https=)
WO (1) WO2008024322A1 (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7785952B2 (en) * 2007-10-16 2010-08-31 International Business Machines Corporation Partially and fully silicided gate stacks
GB2466777B (en) * 2008-12-30 2011-05-04 Wolfson Microelectronics Plc Apparatus and method for testing a transducer and/or electronic circuitry associated with a transducer
US9087587B2 (en) * 2013-03-15 2015-07-21 GlobalFoundries, Inc. Integrated circuits and methods for operating integrated circuits with non-volatile memory
US9312015B1 (en) * 2014-10-25 2016-04-12 Sandisk Technologies Inc. Methods for reducing body effect and increasing junction breakdown voltage
US9450052B1 (en) * 2015-07-01 2016-09-20 Chengdu Monolithic Power Systems Co., Ltd. EEPROM memory cell with a coupler region and method of making the same
CN109037225B (zh) * 2018-09-19 2023-09-12 长江存储科技有限责任公司 存储器结构
US10741611B1 (en) 2019-02-11 2020-08-11 International Business Machines Corporation Resistive processing units with complementary metal-oxide-semiconductor non-volatile analog memory
US11450677B2 (en) * 2020-11-09 2022-09-20 Globalfoundries Singapore Pte. Ltd. Partially silicided nonvolatile memory devices and integration schemes
CN115472699B (zh) * 2022-09-29 2025-12-23 西安电子科技大学 一种系pn结的复合结构mos抗辐照器件及制备方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3059442B2 (ja) * 1988-11-09 2000-07-04 株式会社日立製作所 半導体記憶装置
US4970565A (en) * 1988-09-01 1990-11-13 Atmel Corporation Sealed charge storage structure
JPH0357280A (ja) 1989-07-25 1991-03-12 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US5576568A (en) * 1995-01-18 1996-11-19 Actel Corporation Single-transistor electrically-alterable switch employing fowler nordheim tunneling for program and erase
US6740573B2 (en) * 1995-02-17 2004-05-25 Micron Technology, Inc. Method for forming an integrated circuit interconnect using a dual poly process
DE69734278D1 (de) * 1997-07-03 2006-02-09 St Microelectronics Srl Herstellungsverfahren eines nichtflüchtigen Halbleiterspeicherbauelementes mit abgeschirmtem Einpolysiliziumgate-Speicherabschnitt
US6157574A (en) * 1998-04-01 2000-12-05 National Semiconductor Corporation Erasable frohmann-bentchkowsky memory transistor that stores multiple bits of data
US6137723A (en) * 1998-04-01 2000-10-24 National Semiconductor Corporation Memory device having erasable Frohmann-Bentchkowsky EPROM cells that use a well-to-floating gate coupled voltage during erasure
US6055185A (en) * 1998-04-01 2000-04-25 National Semiconductor Corporation Single-poly EPROM cell with CMOS compatible programming voltages
US6172392B1 (en) 1999-03-29 2001-01-09 Vantis Corporation Boron doped silicon capacitor plate
US6500750B1 (en) * 1999-04-05 2002-12-31 Motorola, Inc. Semiconductor device and method of formation
US6238979B1 (en) * 2000-06-21 2001-05-29 National Semiconductor Corporation Process for fabricating EEPROM memory cell array embedded on core CMOS
US6631087B2 (en) * 2000-06-23 2003-10-07 Gennum Corporation Low voltage single poly deep sub-micron flash eeprom
US6512700B1 (en) * 2001-09-20 2003-01-28 Agere Systems Inc. Non-volatile memory cell having channel initiated secondary electron injection programming mechanism
US6788574B1 (en) * 2001-12-06 2004-09-07 Virage Logic Corporation Electrically-alterable non-volatile memory cell
FR2838554B1 (fr) * 2002-04-15 2004-07-09 St Microelectronics Sa Dispositif semiconducteur de memoire, non volatile, programmable et effacable electriquement, a une seule couche de materiau de grille, et plan memoire correspondant
US6794236B1 (en) * 2002-06-03 2004-09-21 Lattice Semiconductor Corporation Eeprom device with improved capacitive coupling and fabrication process
DE10257870B4 (de) * 2002-12-11 2007-10-04 Infineon Technologies Ag Halbleiterstruktur mit einer integrierten Abschirmung
US6847551B2 (en) * 2003-01-28 2005-01-25 Xicor, Inc. Apparatus for feedback using a tunnel device
JP2004296479A (ja) 2003-03-25 2004-10-21 Denso Corp 半導体装置及びその製造方法
US7190018B2 (en) * 2003-04-07 2007-03-13 Silicon Storage Technology, Inc. Bi-directional read/program non-volatile floating gate memory cell with independent controllable control gates, and array thereof, and method of formation
US20060081910A1 (en) * 2004-03-16 2006-04-20 Andy Yu Non-volatile electrically alterable memory cell for storing multiple data and an array thereof
US7099192B2 (en) * 2004-06-07 2006-08-29 Yield Microelectronics Corp. Nonvolatile flash memory and method of operating the same
US7375393B1 (en) * 2005-01-27 2008-05-20 National Semiconductor Corporation Non-volatile memory (NVM) retention improvement utilizing protective electrical shield

Also Published As

Publication number Publication date
CN101506968B (zh) 2012-08-22
CN101506968A (zh) 2009-08-12
WO2008024322A9 (en) 2008-04-10
JP2010502013A (ja) 2010-01-21
US7759727B2 (en) 2010-07-20
US20080044973A1 (en) 2008-02-21
WO2008024322A1 (en) 2008-02-28
EP2067169A1 (en) 2009-06-10

Similar Documents

Publication Publication Date Title
JP7241901B2 (ja) メモリデバイス及び方法
US11594552B2 (en) Three-dimensional memory device with corrosion-resistant composite spacer
TW200818410A (en) Method and apparatus for shielding tunneling circuit and floating gate for integration of a floating gate voltage reference in a general purpose CMOS technology
CN111900164B (zh) 半导体结构及制备方法
CN101051652B (zh) 半导体器件及其制造方法
KR100723993B1 (ko) 반도체 메모리 장치와 그 제조 방법
TWI277199B (en) Semiconductor device and manufacturing method therefor
CN113540111B (zh) 一种三维存储器件及其制造方法
US8692309B2 (en) Semiconductor device
JP2003203999A (ja) 不揮発性半導体記憶装置およびその製造方法
TW201631670A (zh) 半導體裝置及其製造方法
CN104428895A (zh) 具有数据保持浮栅电容器的硅化集成电路
CN110021594B (zh) 集成填料电容器单元器件以及对应的制造方法
CN114400225A (zh) 半导体器件及其操作方法和制备方法、存储器和存储系统
CN101621037B (zh) Tft sas存储单元结构
JP2021106298A (ja) 半導体メモリの製造方法
JP2001077219A (ja) 不揮発性半導体記憶装置及びその製造方法
CN116782658B (zh) 半导体结构及其形成方法
JP2008305819A (ja) 不揮発性半導体記憶装置およびその製造方法
CN117012837A (zh) 一种半浮栅晶体管及其制备方法
US7579239B2 (en) Method for the manufacture of a non-volatile memory device and memory device thus obtained
US20030109117A1 (en) Semiconductor device and manufacturing method thereof
TW201125107A (en) Memory device and method for fabricating the same
CN114551470A (zh) 三维存储器及其制备方法
KR20110079113A (ko) 단일 폴리 이이피롬의 제조방법