TW200634901A - A method for fabricating a low dielectric layer - Google Patents

A method for fabricating a low dielectric layer

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Publication number
TW200634901A
TW200634901A TW094120860A TW94120860A TW200634901A TW 200634901 A TW200634901 A TW 200634901A TW 094120860 A TW094120860 A TW 094120860A TW 94120860 A TW94120860 A TW 94120860A TW 200634901 A TW200634901 A TW 200634901A
Authority
TW
Taiwan
Prior art keywords
low dielectric
dielectric layer
fabricating
precursor
depositing
Prior art date
Application number
TW094120860A
Other languages
English (en)
Other versions
TWI356442B (en
Inventor
Chung-Chi Ko
Shou-Yi Chang
Tien-I Bao
Syun-Ming Jang
Original Assignee
Taiwan Semiconductor Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg Co Ltd filed Critical Taiwan Semiconductor Mfg Co Ltd
Publication of TW200634901A publication Critical patent/TW200634901A/zh
Application granted granted Critical
Publication of TWI356442B publication Critical patent/TWI356442B/zh

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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
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    • H01L21/76835—Combinations of two or more different dielectric layers having a low dielectric constant
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TW094120860A 2005-03-18 2005-06-22 A method for fabricating a low dielectric layer TWI356442B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/084,494 US20060211240A1 (en) 2005-03-18 2005-03-18 Method of enhancing adhesion between dielectric layers

Publications (2)

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TW200634901A true TW200634901A (en) 2006-10-01
TWI356442B TWI356442B (en) 2012-01-11

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US (1) US20060211240A1 (zh)
TW (1) TWI356442B (zh)

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CN109714889A (zh) * 2017-10-25 2019-05-03 欣兴电子股份有限公司 电路板及其制造方法
US10813231B2 (en) 2017-10-25 2020-10-20 Unimicron Technology Corp. Method for manufacturing circuit board

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US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
CN103165520A (zh) * 2011-12-13 2013-06-19 中芯国际集成电路制造(上海)有限公司 半导体器件的制造方法
AT513747B1 (de) * 2013-02-28 2014-07-15 Mikroelektronik Ges Mit Beschränkter Haftung Ab Bestückungsverfahren für Schaltungsträger und Schaltungsträger
US9666516B2 (en) 2014-12-01 2017-05-30 General Electric Company Electronic packages and methods of making and using the same
TWI642334B (zh) 2017-10-25 2018-11-21 欣興電子股份有限公司 電路板及其製造方法
CN109714888B (zh) * 2017-10-25 2020-08-18 欣兴电子股份有限公司 电路板及其制造方法
US11500290B2 (en) * 2018-11-13 2022-11-15 International Business Machines Corporation Adhesion promoters

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US6660656B2 (en) * 1998-02-11 2003-12-09 Applied Materials Inc. Plasma processes for depositing low dielectric constant films
US6846515B2 (en) * 2002-04-17 2005-01-25 Air Products And Chemicals, Inc. Methods for using porogens and/or porogenated precursors to provide porous organosilica glass films with low dielectric constants
WO2004038783A2 (en) * 2002-10-21 2004-05-06 Massachusetts Institute Of Technology Pecvd of organosilicate thin films

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109714889A (zh) * 2017-10-25 2019-05-03 欣兴电子股份有限公司 电路板及其制造方法
US10813231B2 (en) 2017-10-25 2020-10-20 Unimicron Technology Corp. Method for manufacturing circuit board
CN109714889B (zh) * 2017-10-25 2020-11-27 欣兴电子股份有限公司 电路板及其制造方法

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