TW200531215A - Vertical gate cmos with lithography-independent gate length - Google Patents
Vertical gate cmos with lithography-independent gate length Download PDFInfo
- Publication number
- TW200531215A TW200531215A TW94101806A TW94101806A TW200531215A TW 200531215 A TW200531215 A TW 200531215A TW 94101806 A TW94101806 A TW 94101806A TW 94101806 A TW94101806 A TW 94101806A TW 200531215 A TW200531215 A TW 200531215A
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- dielectric
- polycrystalline silicon
- region
- spacer
- Prior art date
Links
- 238000001459 lithography Methods 0.000 title description 19
- 238000000034 method Methods 0.000 claims abstract description 40
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 46
- 125000006850 spacer group Chemical group 0.000 claims description 40
- 238000005530 etching Methods 0.000 claims description 24
- 238000004519 manufacturing process Methods 0.000 claims description 22
- 238000000151 deposition Methods 0.000 claims description 16
- 238000002955 isolation Methods 0.000 claims description 16
- 239000013589 supplement Substances 0.000 claims description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 13
- 229910052710 silicon Inorganic materials 0.000 claims description 13
- 239000010703 silicon Substances 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 12
- 150000004767 nitrides Chemical class 0.000 claims description 9
- 239000004575 stone Substances 0.000 claims description 4
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 239000002019 doping agent Substances 0.000 claims 3
- 229910000449 hafnium oxide Inorganic materials 0.000 claims 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 abstract description 6
- 238000000206 photolithography Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 75
- 229920002120 photoresistant polymer Polymers 0.000 description 20
- 238000005516 engineering process Methods 0.000 description 19
- 239000010408 film Substances 0.000 description 13
- 230000008021 deposition Effects 0.000 description 7
- 230000003647 oxidation Effects 0.000 description 7
- 238000007254 oxidation reaction Methods 0.000 description 7
- 230000008569 process Effects 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 101100269850 Caenorhabditis elegans mask-1 gene Proteins 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000005121 nitriding Methods 0.000 description 2
- 230000010363 phase shift Effects 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 229910021480 group 4 element Inorganic materials 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 235000011007 phosphoric acid Nutrition 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78642—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823885—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
- H01L29/66287—Silicon vertical transistors with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/761,876 US6846709B1 (en) | 2003-10-06 | 2004-01-21 | Vertical gate CMOS with lithography-independent gate length |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200531215A true TW200531215A (en) | 2005-09-16 |
Family
ID=34826456
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW94101806A TW200531215A (en) | 2004-01-21 | 2005-01-21 | Vertical gate cmos with lithography-independent gate length |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1709680A4 (fr) |
CN (1) | CN100442477C (fr) |
TW (1) | TW200531215A (fr) |
WO (1) | WO2005072154A2 (fr) |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE58909837D1 (de) * | 1989-09-22 | 1998-09-17 | Siemens Ag | Verfahren zur Herstellung eines Bipolartransistors mit verminderter Basis/Kollektor-Kapazität |
JP3229012B2 (ja) * | 1992-05-21 | 2001-11-12 | 株式会社東芝 | 半導体装置の製造方法 |
US5689127A (en) * | 1996-03-05 | 1997-11-18 | International Business Machines Corporation | Vertical double-gate field effect transistor |
US5786256A (en) * | 1996-07-19 | 1998-07-28 | Advanced Micro Devices, Inc. | Method of reducing MOS transistor gate beyond photolithographically patterned dimension |
US20010017392A1 (en) * | 1997-05-19 | 2001-08-30 | International Business Machines Corporation. | Vertical transport MOSFETs and method for making the same |
US6040214A (en) * | 1998-02-19 | 2000-03-21 | International Business Machines Corporation | Method for making field effect transistors having sub-lithographic gates with vertical side walls |
US6392271B1 (en) * | 1999-06-28 | 2002-05-21 | Intel Corporation | Structure and process flow for fabrication of dual gate floating body integrated MOS transistors |
US6518616B2 (en) * | 2001-04-18 | 2003-02-11 | International Business Machines Corporation | Vertical gate top engineering for improved GC and CB process windows |
US20030008515A1 (en) * | 2001-07-03 | 2003-01-09 | Tai-Ju Chen | Method of fabricating a vertical MOS transistor |
-
2005
- 2005-01-18 WO PCT/US2005/001313 patent/WO2005072154A2/fr not_active Application Discontinuation
- 2005-01-18 EP EP05705754A patent/EP1709680A4/fr not_active Withdrawn
- 2005-01-18 CN CNB2005800029189A patent/CN100442477C/zh not_active Expired - Fee Related
- 2005-01-21 TW TW94101806A patent/TW200531215A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
WO2005072154A2 (fr) | 2005-08-11 |
CN1910748A (zh) | 2007-02-07 |
EP1709680A2 (fr) | 2006-10-11 |
EP1709680A4 (fr) | 2008-07-02 |
WO2005072154A3 (fr) | 2005-12-08 |
CN100442477C (zh) | 2008-12-10 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101952958B (zh) | 包括鳍式晶体管的系统及装置以及其使用、制作及操作方法 | |
US7232732B2 (en) | Semiconductor device with a toroidal-like junction | |
TWI302029B (en) | Self-aligned conductive spacer process for sidewall control gate of high-speed random access memory | |
TWI248650B (en) | Silicon-on-nothing fabrication process | |
TWI396252B (zh) | 提供電性隔離之方法及包含該方法之半導體結構 | |
TWI304247B (en) | Method for fabricating semiconductor device | |
JPH04192564A (ja) | トランジスタの製造方法 | |
KR20110071084A (ko) | 자가-정렬 트렌치 형성 | |
US8399315B2 (en) | Semiconductor structure and method for manufacturing the same | |
JPH0677487A (ja) | 薄膜トランジスター及びその製造方法 | |
US20150325692A1 (en) | Fin field effect transistor (finfet) device including a set of merged fins formed adjacent a set of unmerged fins | |
US10720509B1 (en) | Method for preparing a semiconductor device structure with an annular semiconductor fin | |
US7229928B2 (en) | Method for processing a layered stack in the production of a semiconductor device | |
TW200828515A (en) | Transistor surround gate structure with silicon-on-insulator isolation for memory cells, memory arrays, memory devices and systems and methods of forming same | |
WO2006049707A1 (fr) | Fabrication de petites ouvertures independante de la lithographie | |
US11961740B2 (en) | Manufacturing method for integrating gate dielectric layers of different thicknesses | |
US20070128823A1 (en) | Method of fabricating semiconductor integrated circuit device | |
US7632736B2 (en) | Self-aligned contact formation utilizing sacrificial polysilicon | |
TWI291741B (en) | Method fabricating a memory device having a self-aligned contact | |
TW200531215A (en) | Vertical gate cmos with lithography-independent gate length | |
US20050009250A1 (en) | Ultra short channel field effect transistor and method of fabricating the same | |
TW211081B (fr) | ||
TW449876B (en) | Method for simultaneously manufacturing landing pad and bit line | |
KR100641495B1 (ko) | 반도체 소자 제조방법 | |
KR100342290B1 (ko) | 전계 효과 트랜지스터 및 그 제조 방법 |