TW200512833A - Compositions for the electroless deposition of ternary materials for the semiconductor industry - Google Patents

Compositions for the electroless deposition of ternary materials for the semiconductor industry

Info

Publication number
TW200512833A
TW200512833A TW093112665A TW93112665A TW200512833A TW 200512833 A TW200512833 A TW 200512833A TW 093112665 A TW093112665 A TW 093112665A TW 93112665 A TW93112665 A TW 93112665A TW 200512833 A TW200512833 A TW 200512833A
Authority
TW
Taiwan
Prior art keywords
compositions
semiconductor industry
electroless deposition
ternary materials
deposited
Prior art date
Application number
TW093112665A
Other languages
Chinese (zh)
Other versions
TWI342591B (en
Inventor
Alexandra Wirth
Original Assignee
Merck Patent Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Merck Patent Gmbh filed Critical Merck Patent Gmbh
Publication of TW200512833A publication Critical patent/TW200512833A/en
Application granted granted Critical
Publication of TWI342591B publication Critical patent/TWI342591B/en

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/48—Coating with alloys
    • C23C18/50—Coating with alloys with alloys based on iron, cobalt or nickel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemically Coating (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The present invention relates to the use of ternary nickel-containing metal alloys of the NiMR type (where M = Mo, W, Re or Cr, and R = B or P) deposited by an electroless process in semiconductor technology. In particular, the present invention relates to the use of these deposited ternary nickel-containing metal alloys as barrier material or as selective encapsulation material for preventing the diffusion and electromigration of copper in semiconductor components.
TW93112665A 2003-05-09 2004-05-05 Compositions for the electroless deposition of ternary materials for the semiconductor industry TWI342591B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10321113 2003-05-09
DE10347809A DE10347809A1 (en) 2003-05-09 2003-10-10 Compositions for electroless deposition of ternary materials for the semiconductor industry

Publications (2)

Publication Number Publication Date
TW200512833A true TW200512833A (en) 2005-04-01
TWI342591B TWI342591B (en) 2011-05-21

Family

ID=33394463

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93112665A TWI342591B (en) 2003-05-09 2004-05-05 Compositions for the electroless deposition of ternary materials for the semiconductor industry

Country Status (4)

Country Link
CN (1) CN1784507B (en)
DE (1) DE10347809A1 (en)
MY (1) MY141022A (en)
TW (1) TWI342591B (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5268159B2 (en) * 2007-12-17 2013-08-21 Ｊｘ日鉱日石金属株式会社 Substrate and manufacturing method thereof
US20100310775A1 (en) 2009-06-09 2010-12-09 International Business Machines Corporation Spalling for a Semiconductor Substrate
TWI550643B (en) * 2012-03-30 2016-09-21 Taiyo Holdings Co Ltd Conductive paste and conductive circuit
CN102925861A (en) * 2012-11-20 2013-02-13 大连理工大学 Cu-Ni-Sn alloy film with high conductibility and high thermal stability and preparation technology thereof
EP3172761B1 (en) 2014-07-25 2021-09-22 Intel Corporation Tungsten alloys in semiconductor devices
CN104328392A (en) * 2014-10-30 2015-02-04 广东电网有限责任公司电力科学研究院 Coating type chemical plating method based on low-temperature plating liquid
CN107104076B (en) * 2016-09-18 2019-02-05 云南大学 A kind of method that chemically plating is routed diffusion barrier layer NiCoB film for ULSI-Cu
CN113026005B (en) * 2021-03-04 2022-02-01 珠海市创智成功科技有限公司 Chemical plating solution and process applied to chemical nickel-palladium-gold plating layer of flexible circuit board

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001355074A (en) * 2000-04-10 2001-12-25 Sony Corp Electroless plating method, and apparatus thereof
US6528409B1 (en) * 2002-04-29 2003-03-04 Advanced Micro Devices, Inc. Interconnect structure formed in porous dielectric material with minimized degradation and electromigration

Also Published As

Publication number Publication date
CN1784507A (en) 2006-06-07
DE10347809A1 (en) 2004-11-25
CN1784507B (en) 2010-04-28
MY141022A (en) 2010-02-25
TWI342591B (en) 2011-05-21

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees