SU951683A1 - Pulse burst to square pulse converter - Google Patents

Description

one

The invention relates to a pulse technique and can be used in telemechanics systems, electrical measuring systems and in systems for collecting and processing information.

A known converter comprising a pulse counter, an RS flip-flop, a reference pulse generator, a pulse shaper, an inhibit unit, an AND element, an OR element, and a delay element.

However, such a device is characterized by an insufficiently high conversion accuracy and a limited frequency range of pulses in a burst.

The closest to the proposed technical entity is a converter containing four triggers, two reversible counters, two decoders, four AND elements, a reference pulse generator, and OR and NK 2 elements.

This converter has an extended frequency range of pulses in the sequence, but it does not allow to form a square pulse, the duration of which is equal to the duration of the sequence (pack) of pulses, which limits its functionality.

The purpose of the invention is to expand the functionality due to the formation of a rectangular impulse delayed by the value of the pulse repetition period, the duration of which is equal to the duration of the impulse burst.

The goal is achieved by the fact that in the converter of a batch of pulses into a rectangular pulse, containing a generator of reference pulses, the output of which is connected to the first input of the first element I, the second element I, the first input of which is connected to the first output of the first trigger, the first input of which is connected to 95 by the first input of the second trigger and with the input bus, the third trigger, the element OR NOT, two reversible counters, the first input of the first of which is connected to the output of the first element AND, two impulse drivers are introduced, and the element OR is NOT connected to the second inputs of the first and second triggers and to the first input of the third trigger, the second input of which is connected to the first output of the second trigger via the first pulse shaper, the second output of which is connected to the first input of the second reversible counter, the second input of which is connected to the output of the reference pulse generator, and the third input is connected to the first output of the first trigger, the first input of the first trigger is connected through the second pulse shaper connected to the second input of the second element, And the output which is connected to the input of the reference pulse generator, the first output of the third trigger is connected to the second input of the first element And and the second input of the first reversible counter, the third input of which is connected to the first output of the second trigger, the outputs of the first and second reversible counters are connected to the inputs of the element OR- NOT.

FIG. 1 is a functional block diagram of a converter; in fig. 2 - time diagram of the converter operation.

The converter (Fig. 1) contains the generator 1 reference pulses, triggers 2, 3 and k, elements 5 and 6, the element OR-NOT 7, shapers 8 and 9 pulses, reversible counters 10 and 11, in FIG. 1 also shows the input bus 12.

This converter uses RST type 2 trigger and RS 3 type triggers 3 and 4.

The pulse train to square pulse converter works in the following way.

In the initial state, the reversible counters 10 and 11 are set to one, the output potential of the counters 10 and 11 is low, the output element OR-NOT 7 has a high potential (see Fig. 2m), triggers 2, 3 and are set to zero a state in which a low potential is present at their single output, and a high output at the zero output, at the output of the driver 8

The intensity of the negative pulse of the 9-pulse generator is selected somewhat (longer transient times in the converter and a shorter period of the reference frequency pulses.

When trigger 2 is set to a single state, a high potential appears at its single output, and a low potential appears at its zero output. In addition, in the counter 10, the addition mode is set, and in the counter 11, the subtraction mode is set.

When a trigger 3 is set to a single state, a high (permitting) potential appears at its single output (Fig. 2, c), and a low potential appears at the zero output (Fig. 2, c). Consequently, at the first output of the transducer, the front edge of the rectangular pulse appears, which coincides with the moment of arrival of the first pulse of the stack.

Claims (2)

The trigger continues to remain in the zero state (Fig. 2, k, o), and the low potential of its single output (Fig. 2, k) keeps element 1 in the closed state (Fig. 2, l). After the end of the impulse of the imaging unit 9, the generator 1 begins to generate pulses of the reference frequency (Fig. 2e). The counter 10 continues to remain in the initial state, since the pulses of the reference frequency to its input are not 3 and 9 pulses 2 - high potential, at the output of elements And 5 and 6 - low potential, on the input bus 12 high potential, generator 1 reference pulses is in a hindered state when there is a low potential at its control input. Suppose that the reversible counters 10 and P work on subtraction in the presence of low potential at their control inputs and on addition in the presence of high potential, and the formers 8 and 9 pulses are triggered when the potential at their inputs changes from high to low. the burst pulse (Fig. 2) on the input bus 12 trigger 2 (Fig. 2, e, g) and the trigger 3 (Fig. 2, c, n) are set to one and the pulse shaper 9 is started (Fig. 2, 6), the output of which produces a negative impulse, is returned ivayuschy low potential to the AND 6 (FIG. 2d). Longer, a counter And works on the subtraction before the arrival of the second pulse of the pack. When the second pulse of the packet arrives, the trigger 2 is set to the zero state, a low potential (subtraction mode) appears on the control input of the counter 10, and a high potential (addition mode) appears on the control input of the counter 11. Changing the potential from high to low at a single output of flip-flop 2 triggers the shaper 8, the output negative pulse of which (Fig. 2, and) sets the flip-flop 4 to a single state at which AND 5 opens at another input. The pulse duration of the imaging unit 8 is chosen slightly shorter than the pulse duration of the overflow of counters 10 and 11 at the output of the OR-NOT element 7. Simultaneously with the appearance of the second pulse, the imaging unit 9 is activated, the output pulse of which through element K 6 blocks the generator 1 reference pulse-25 pulse generator 9, the generator 1 begins to produce pulses of the reference frequency, which are fed to the input of the counter 11, increasing its contents, and through the element And 5 to the input of the counter 10, reducing its contents. Consequently, by the time of the appearance of the second pulse, the packs of the counter 11 are reduced by the amount corresponding to the pulse repetition period of the pack, and the counter 10 continues to remain in the initial (filled) state (all bits of the counter 10 are in unit with standing). After the appearance of the second pulse of the stack, the addition mode is set in the counter 11, and in the counter 10 - the subtraction mode. By the time of the appearance of the third pulse of the packet, the counter 11 is filled, since its input receives the same number of pulses of the reference frequency, which is subtracted from it by the time of arrival of the second pulse of the packet. At the moment of arrival of the third pulse of burst, trigger 2 is set to one state, in counter 10 9 3 the addition mode, in counter 11 - subtraction mode, the imaging unit 9 is started by its output pulse through element I 6, the generator 1 is blocked, and the triggers 3 and C continue to remain in one state. After the pulse of the imaging unit 9 has ended, the reference frequency pulses begin to arrive at the input of the counters 10 and 11. The contents of the counter 10 begin to increase, and the contents of the counter 11 begin to decrease. Further, with the arrival of subsequent burst pulses, the conversion process is repeated. Consequently, by the time of arrival of the next burst of a burst, the number corresponding to the period of the burst pulses is subtracted from one of the counters, and the second counter is filled. At the time of arrival of the next burst of the stack, the generator 1 of the reference pulses is blocked and the operating mode of the counters 10, 11, i.e. if the estimator worked on addition, then it will work on subtraction and vice versa. If the next pulse of the bundle does not arrive at the input bus 12 of the converter, then the generator 1 of the reference pulses is not blocked, and its next pulse, having entered the inputs of both counters 10 and 11, causes an overflow of that reversible counter, which by this moment worked on addition and turned out to be filled . Suppose that a packet of five pulses has arrived at the input bus 12 (Fig. 2, a). Then by the time of the expected appearance of the sixth pulse the counter 10 will be filled. At the time of the expected appearance of the sixth pulse, the driver 9 does not work and the next pulse of the generator 1 causes the counter 10 to overflow, the positive pulse of which overflows to the input of the element OR NOT 7. at the entrance of the element OR-NOT 7, a low potential appears (Fig. 2, m), which returns triggers 2, 3 and k to the initial (zero) state. When triggers 3 and i are set to their initial state, a low potential appears on their single outputs, sets the meters 10 and 11 to their initial state, and a high potential on the zero outputs, marking the trailing edge of the square pulses on the first and second outputs of the converter . Therefore, if the next pulse to the expected moment of time does not arrive at the input bus 12 of the converter, then the generator 1 of the reference pulses is not blocked, and its next pulse, entering the input of the counters 10 and 11, causes an overflow of that reversible counter, which by this moment worked on addition and turned out to be filled. On the overflow pulse of this counter, the converter returns to the initial state before the arrival of the next burst of pulses. Thus, at the first output of the converter (Fig. 2, i) it forms with a rectangular pulse, the leading front of which coincides with the moment of arrival of the first pulse of the packet, with a duration longer than the true duration by an amount equal to the pulse period in the packet. At the second output of the transducer (Fig. 2, o) a rectangular pulse is formed, the leading edge of which coincides with the moment of the appearance of the second pulse of the packet with a duration equal to the true duration of the packet of pulses. Thus, the proposed transducer (as compared to the known one) allows to expand the functional capabilities since the transducer generates a rectangular pulse at the first output, the leading front of which coincides with the first pulse of the pack, and the duration exceeds the duration of the pack by no more than the pulse duration in the packet and at the other output is a pulse whose leading edge coincides with the second pulse of the packet, and the duration is equal to the duration of the packet. The invention of the pulse train converter 8 is a rectangular pulse containing a reference pulse generator, the output of which is connected to the first input of the first element AND, the second element AND whose first input is connected to the first output of the first trigger, the first input of which is connected to the first input of the second trigger and with an input bus, a third trigger, an OR-NOT element, two reversible counters, the first input of which is connected to the output of the first AND element, characterized in that, in order to extend the functionality, Two pulse drivers are entered into it, and the output of the OR-NOT element is connected to the second inputs of the first and second triggers and to the first input of the third trigger, the second input of which is connected to the first output of the second trigger through the first pulse shaper, the second output of which is connected to the first input of the second reversible counter, the second input of which is connected to the output of the reference pulse generator, and the third input is connected to the first output of the first trigger, the first input of the first trigger through the second driver pulse in connected to the second input of the second element And, the output of which is connected to the input of the reference pulse generator, the first output of the third trigger connected to the second input of the first element And to the second input of the first reversible counter, the third input of which is connected to the first output of the second trigger, the outputs of the first and the second reversible counters are connected to the inputs of the element OR NOT. Sources of information taken into account during the examination 1. USSR author's certificate No. 736367, cl. H 03 K 5/156, 1980 2. USSR author's certificate No. 80953 4, cl, H 03 K 5/156, 1979  v / t 1 | "I n e GO J.-wJ.L ± 1- - ± 3- -Гг-rJ Jjl "Sv and Jn U I g g 1 1 ir a lea “ea“ t qj T “S;