SU813796A2 - Pulse generator with controllable repetition frequency - Google Patents

Description

one

The invention relates to radio engineering and can be used in automation and computing devices.

According to the main author. St. No. 519842 is a pulse generator with a controlled tracking frequency, comprising a clock pulse generator, a multiplier consisting of a frequency divider, a reversible counter, valves and a separation element, a pulse counter, a first and a second device. management. The input of the frequency divider is connected to the output of the clock pulse generator, and the outputs are connected to the input of the pulse counter and to the first inputs of the valves, the second inputs of which are connected to the outputs of the reversing counter, and the outputs to the inputs of the separation element The outputs of the reversible counter are connected to the inputs of the first control device which consists of the trigger, the first register, the reference element, the two matching elements, the output of the comparison element connected to the inputs of the matching elements, one output of the trigger connected to the input one. the coincidence element, the output of which is connected to the addition bus of the reversible counter, and the other output of the trigger is connected to the input of the second matching element, the output of which is connected to the subtraction bus of the reversible counter. The second control unit contains a register whose outputs are connected to the impulse inputs through gates, to the other inputs of which the output of the pulse counter is connected.

The disadvantages of this pulse generator are limited functionality, since the device does not receive at any moment

the output time, the frequency setpoint, as well as the insufficiently high speed of obtaining the setpoint value of the pulse frequency at the generator output, caused by the filling time of the reversible counter until its state coincides with the number recorded in the register.

The purpose of the invention is expansion

the functionality of the device and an increase in the speed of obtaining the set value of the pulse frequency.

The goal is achieved by

that the pulse generator with control of the following frequency contains a generator consisting of a frequency divider, a reversible counter and valves, a pulse counter and the first control device, the input of the frequency divider is connected to the output of the clock generator, and the outputs are connected to the input of the pulse counter and to the first inputs of the valves, the output of the pulse counter is connected to the input of the first control device, one output of which is connected to the folding bus, and the other output is connected to the subtracting bus of the reversible counter the output of which is connected to the second valve inputs, the second control device, the input of which is connected to the output of the counter by a pulse, and the outputs are connected to the inputs of the pulse counter, the outputs of the reversible counter are connected to the inputs of the first control device, additional valves, a trigger and an OR element are added, the inputs of which are connected to the trigger inputs of the first control device, and the output with one input of an additional trigger, the output of which is connected to the control inputs of the additional gates, the second inputs to The latter are connected to the corresponding outputs of the register of the first control unit, the outputs of the additional gates are connected to the corresponding inputs of the reversible counter. The drawing shows a block diagram of the proposed pulse generator with a controlled following frequency. The pulse generator with a controlled repetition frequency contains a clock pulse generator 1, a multiplier 2, consisting of a divider 3 frequencies, a reversible counter 4, valves 5 (total n valves), a separation element 6, the first control device 7 consisting of a trigger 8 the register 9, the comparison element 10, the elements 11 and 12 match, the second control device 13, consisting of the register 14, the valves 15, the pulse counter 16, the additional valves 17, the additional trigger 18, the additional element OR 19, the input buses 20 , 21 and 22, the output bus 23. the divider 3 frequency stroke is connected to the clock pulse 1 generator output, and the outputs are connected to the input of counter 16 and to the first inputs of the valves 5, the second inputs of which are connected to the corresponding outputs of the reversing counter 4. The outputs of the valves 5 are connected to the inputs of the separation element b, the output of which is connected to the output bus 23. The second outputs of the reversible counter 4 are connected to the corresponding inputs of the comparison element 10, the second inputs of which are connected to the corresponding outputs of the register 9. The output of the comparison element 10 is connected to ne The first inputs of elements 11 and 12 are coincidence, the second inputs of which are connected to the inverse and forward outputs of trigger 8, respectively. The output of the coincidence element 11 is connected to the subtraction bus, and the output of the coincidence element 12 is connected with the folding bus of the reversible counter 4. The outputs of the register 14 of the second control unit 13 are connected to the corresponding inputs of the counter 16 pulses through the gates 15. The output of the counter 16 is connected to others (control) the inputs of the valves 15 and to the third inputs of the elements 11 and 12 coincidence. The inputs of the additional element OR 19 are connected to the inputs of trigger 8 and to the input buses 20 and 21. The output of the element OR 19 is connected to the zero input of the additional trigger 18, the single input of which is connected to the input bus 22, and the direct output is connected to the control inputs additional gates 17. The second inputs of the gates 17 are connected to the corresponding outputs of the register 9, and the outputs of the additional gates 17 are connected to the corresponding inputs of the reversing counter 4. The state of the flip-flops, at which the output appears in the zero (inverse) output The potential (high) potential is assumed to be zero (O), and the state in which the permitting (high) potential appears as unit (1) at a single (direct) output. The pulse generator with a controlled repetition rate works as follows. In the initial state, the triggers 8 and 18, registers 9 and 14, and the reversing counter 4 are in the zero position. At the same time, the inhibiting (low) potential from the output of the comparison element 10 is present at the inputs of the elements 11 and 12, and therefore no pulses are sent to the addition and subtraction bus 4. Since the state of the reversible counter 4 does not change and remains zero, an inhibitory potential is present at the inputs of the valves 5, as well as at their outputs. At the output 23 of the generator 1 pulses are missing. Pulses from the clock pulse generator 1 are input to the divider 3 frequency input, the frequency divider 3 extracts pulses with frequencies:, p. . -, where f is the frequency of the generator of clock pulses. The overflow pulses of the solider. 3 frequencies arrive at the input of the counter 16, the output pulses of which arrive at the third inputs of the elements 11 and 12 of the match and at the control inputs of the valves 15, overwriting the contents of the register 14

into the counter 16. When the control signal is fed to the input bus 22, the trigger 18 is set to one and the output potential appears at its direct output to the control inputs of the additional gates 17. If the register

9the number corresponding to the given frequency on the output bus 23 of the generator {for example, all units corresponding to the maximum frequency), this number is rewritten to the reversible counter 4 via the gates 17, but since the numbers (cola) of the register 9 and the reversible counter 4 are equal,

At the output of the comparison element 10, the inhibitory potential will still be present and the elements 11 and 12 of the match will remain closed at the first inputs, as a result of which no pulses are sent to the folding bus and to the subtracting bus of the reversible counter 4. In the census: the numbers corresponding to the pre-set frequency value from register 9 to counter 4 correspond to the last bits of the last one (in this case all bits). At this resolution, the potentials appear at the inputs of the corresponding valves 5 (in this case, the inputs of all the valves), from the outputs of which a series of pulses through the separation element b arrive at output 23. The frequency of the pulses at the output 23 of the generator 1 will correspond to the specified value (in this case, the frequency of the output pulses will be approximately equal to the frequency of the impulses lsov generator 1). When operating in the Acceleration mode, the Acceleration command is fed to the input bus 21. This sets 1 trigger 8 and confirms (with the symbol through the element OR 19) zero status of trigger 18. If register 9 of the first control device 7 records the number corresponding to the frequency at the output of the generator, then at the moment a nonzero number in the register 9 is set, the output potential of the comparison element 10 appears. Then the first overflow pulse of the counter 16 passes through the coincidence element 12, opened on the first input by the resolving potential of the element

10 and by the second input is permitted by the potential of the forward output of the trigger 8, to the addition bus of the reversible counter 4. The trigger of the first discharge of the reversing counter 4 is set to position 1, and as a result the permissive potential appears at the first input

from valves 5, to the second input, which receives a series of pulses with a frequency of 4. These pulses come from the output of the valve. 5 through the dividing element b to the output bus 23 of the generator 1 until the counter 16 is filled and the next overflow pulse arrives at the fold input of the reversible counter 4 through the coincidence element 2. In this case, the trigger of the first discharge of the reversible counter 4 is set to the O position, and the trigger of the second discharge to the position 1. Now the enabling potential arises at the first input of the gates 5, to the second input

0 which receives a series of pulses with a frequency. These pulses come from the output of the valve 5 through the separation element 6 to the output bus 23 of the generator 1. Frequency on the output bus

5 23 generator 1 is increased by uf; jT-. Further, the processes are repeated until the state of the reversible counter 4 does not coincide with the number entered in the register 9. At the output of the comparison element 10, a inhibitory potential occurs, as a result of which the pulses flow to the input of the reversible counter 4. Reversible counter 4 saved. its state remains unchanged, and

5 the frequency on the output bus 23 of generator 1 will be constant until the braking command to the bus 20 arrives. In this case, register 9 must be assigned a number corresponding to the frequency that must be obtained at the output 23 of generator 1. On command Braking trigger 8 is set to the zero state, and at its inverse output appears

5 permitting, and at the direct output it is forbidding potentials. The control signal from the input bus 20 through the OR element 19 also goes to the zero input of the trigger 18, confirming its zero state. At the time of establishing in the register 9 a number other than zero, the output potential of the comparison element 10 appears at the output of the comparison element 10. Then the overflow pulses of the counter 16 begin to flow through

5 element 11 coincidence, open On the first input by the resolving potential of the comparison element 10 and on the second input by the resolving potential of the inverse output of the trigger 8, on the subtraction of the reversible counter

4. As a result of a change in the state of the reversible counter 4, alternately inhibiting potentials begin to appear at the first gate inputs.

five

5, the frequency on the output bus 23 of the oscillator 1 begins to decrease. This occurs until the state of the reversible counter 4 does not coincide with the number entered in the register 9. At the same time, at the output of the element

6 IX) comparison, a prohibiting potential occurs, as a result of which pulses flow to the input of reversible counter 4. The up / down counter 4 maintains its state

Claims (1)

Claim Pulse generator with a controlled repetition rate on autosw. № 519842, characterized in that, in order to expand the device capability and speed obtaining setpoint pulse repetition frequencies, it is further introduced valves, a trigger and an OR gate having inputs connected ^Weston inputs trigger the first control device, and output - with one input of an additional trigger, the output of which is connected to the control inputs of additional valves, the second inputs of which are connected to the corresponding outputs of the register of the first control device, outputs Modes gates connected to respective inputs reversiv15 flow methods.