SU802882A1 - Device for detecting and measuring signal frequency in noise - Google Patents

Description

The invention relates to radio engineering and can be used in Doppler navigation systems for measuring the speed of moving objects. 5

A device for detecting and measuring the frequency of a signal in noise, containing a pulse discriminator, two outputs of which are connected via keys to the inputs of a reversible counter, the third output of which is connected to the output of a useful signal detector, the output of which is connected to the control inputs of the keys and to the control input of the search unit, another 15, the input of which is connected to the source of the search frequency, and the output is connected to an additional input of the reverse counter, the output of which is connected to the 20 input via a code-frequency converter th pulse discriminator However, the known device has considerable fluctuation error caused by the influence of broadband noise and random 25 character useful narrowband signal at low signal / noise ratio.

The purpose of the invention is the reduction of fluctuation errors. thirty

To do this, to a device for detecting the measurement of the signal frequency in noise, · containing a pulse discriminator, two outputs of which are connected via keys to the inputs of a reversible counter, the third output of which is connected to the input of the detector of the useful signal, the output of which is connected to the control inputs of the keys and to the control input of the unit search, the other input of which is connected to the source of the search frequency, and the output is connected to the additional input of the reverse counter, the output of which is connected through the code-frequency converter to the input m of a pulse discriminator, a control unit, two AND elements, two OR elements, and two coincidence units are introduced, and the reverse counter contains buffer and information bits, and the outputs of the buffer bits are connected to the inputs of information bits through the first AND and OR elements and the second AND elements and OR, the outputs of the keys are connected to the inputs of the control unit and to the first inputs of the coincidence units, the second inputs of which are connected to the output of the control unit, which is also connected to the second inputs.3 .4 ladies of AND elements, output Since the coincidence blocks are connected to the second inputs _{to the} corresponding OR elements, the inputs of the buffer bits and the output of the information bits of the reversible counter are its inputs and output, respectively.

In FIG. 1 shows a structural electrical diagram of the proposed device; in FIG. 2 - embodiment of the control unit; in FIG. 3 - diagrams explaining the operation of the device.

The device (Fig. 1) contains a pulse discriminator 1, keys 2 and 3, a reverse counter 4, a code-frequency converter 5, a search unit b, a useful signal detector 7, a control unit 8, AND 9 and 10 elements, OR 11 and 12 elements , blocks 13 and 14 matches. Reverse counter 4 contains buffer and information bits 15 and 16.

The control unit (Fig. 2) contains a block 17 for allocating the first pulse of the packet, a block 18 for determining the number of pulses in the packet, a control trigger 19, the block 17 comprising. trigger 20, AND 21 and 22 elements and OR 23 elements, and block 18 contains AND 24 and 25 elements, OR 26, counter 27 and decoder 28.

The device operates as follows.

In the tracking mode, when the energy of the useful mismatch signal falls into the passband of the low-pass filters of the pulse discriminator 1, the useful signal detector 7 generates an output signal that opens the keys 2 and 3 and closes the search block 6.

The output frequency-pulse sequences (Fig. 3 a and b) of the pulse discriminator 1 through the public keys 2 and 3 are fed to the inputs of the buffer bits 15, the inputs of the control unit 8 and the inputs of the coincidence units 13 and 14.

The control unit 8 analyzes the sequence (Fig. 3 a and b) and, depending on the number of pulses in, a pulse packet of a single sign mismatch (& F + or IDR) forms a signal that controls the operation of the elements 9 and 10 and the coincidence blocks 13 and 14.

When the number of pulses in the packet is less than the specified level Ν _ηορ under the action of the output signal of block 8, the And 9 and 10 elements open and the coincidence blocks 13 and 14 are closed, while the inputs of the information bits 16 that control the code-frequency converter 5, through the OR 12 and 11, the elements And 9 and 10 will be connected to the outputs of the buffer bits 15.

When the number of pulses in the pulse train (Fig. 3 a) or (Fig. Zb) is greater than the specified level Ν _ηορ , the inputs of information bits 16 through the elements OR 11 and 12, coincidence blocks 13 and 14 will be connected to the outputs of the keys 2 and 3.

Due to the fact that the buffer bits 15 of the reversible counter 4 smooth out the output frequency-pulse sequences (Figs. 3b and 3) of the pulse discriminator 1, the probability of occurrence of bursts of mismatch pulses (Figs. 3, 3) at the inputs of information bits 16 with a large the number (E Τ '2) of pulses in the packet decreases significantly, and therefore, the fluctuation error of the proposed device for detecting and measuring the signal frequency in noise decreases.

Packs with a large number (E Ν _π0ρ ) of mismatch pulses occur mainly when operating in an unsteady tracking mode and are caused by the inertia of the pulse discriminator 1. To eliminate the effect of increasing the inertia of the proposed device, it uses a control unit 8, which through blocks 13 and 14 of decay and elements OR 11 and 12 connects the inputs of information bits 16 to the outputs of the keys 2 and 3 directly if the packets contain a large number (2 7 N _) of mismatch pulses.

The control unit operates as follows.

When a pulse pack of a different sign arrives at the input of the control unit 8, the trigger 20 is set to the opposite state (Fig. Sv) and, therefore, the elements And 21 or 22 will be open (taking into account the finite trigger time) only for the first pulse of the packet, which and sets trigger 19 through state OR 23 to state 1 and counter 27 to state ”0.

Elements And 24 or 25 will be open to all burst pulses, except the first, and therefore, the counter 27 will carry out the burst counts. If at the same time the mismatch pulse train contains the number of pulses K 7 · ^Ν ηορ ', ^{then Deshi} FR ^at oP 28 sets trigger 19 to state 0 (Fig. 3d, e).

Thus, the use of the invention will reduce the fluctuation error of the device for detecting and measuring the frequency of the signal in noise by 20-30%.

Claims (1)

1. USSR author's certificate 474756, cl. G 01 R 23/00, 03/28/73 (prototype). e