SU786057A1 - Sync generator - Google Patents

Description

(54) SYNCHROGENERATOR

I

The invention relates to television and computing.

A sync generator is known that contains a series-connected master oscillator, a row frequency divider and a frame frequency divider, the setup inputs of which are connected to the outputs of the control unit, to the input of which a signal is transmitted, and also the pulse generator and the pulse generator whose inputs are connected to the outputs, respectively. the line frequency divider and the frame rate divider, and the outputs are the outputs of the sihih generator 1.

However, when entering into synchronism when working with an external synchronization source, the phase output of the clock pulses appears at the output of the clock generator.

The purpose of the invention is to eliminate the jump of the phase of clock pulses when entering synchronization.

D; 1 addition in a snug generator containing a series-connected master oscillator, a line frequency divider and a frame frequency divider, the setup inputs of which are connected to the outputs of the block (and the Control, on whose input a signal

external synchronization, as well as a row pulse generator and a frame pulse generator, whose inputs are connected to the outputs of the row frequency divider and frame frequency divider, and the outputs of the sync generator, the output of the row pulse generator and the output of the frame pulse generator are connected to the corresponding additional inputs control unit, and the control unit is made. in the form of series-connected block

10 frame sync pulses, a frame frame comparator, and a frame sync switch, the signal input of which is connected to the output of the frame sync pulse block, as well as series-connected blocks

 extracting the sync pulses of the rows, the phase comparator of the rows, the matching element, whose input is connected to the output of the phase frame comparator, and the switch of the sync pulses of the rows, the signal input

20 of which is connected to the output of the block of allocation of sync pulses of lines, while the input of the block of allocation of sync pulses of rows and the input of block of allocation of sync pulses of frames are combined and are the inputs of block

control, which is fed to the external synchronization signal, the second inputs of the phase line comparator and the frame frame comparator are additional inputs of the control unit, and the outputs of the line clock switch and frame sync switch are the outputs of the control unit.

The drawing shows a structural electrical circuit of the proposed sync generator. .

The synchronous generator contains a master oscillator 1, dividers 2 and 3 of the line and frame frequencies, generators 4 and 5 of the pulses of the lines and frames and the control unit b, consisting of blocks 7 and 8 of the selection of the sync pulses of the lines and frames, phase comparators 9 and 10 lines and frames, And switches and 12 rows and frame clock pulses and a match element 13.

C. synchro generator works as follows.

In the case that the control unit 6 does not receive an external synchronization signal, the clock generator operates in an autonomous mode, generating sync pulses of rows and frames. When the external synchronization signal is applied to the input, the control unit 6 generates pulses of the initial installation of the master oscillator 1, the divider 2 line frequencies, and the divider 3 frame rates. The synchronous generator is synchronized with an external source in two steps: entering frame synchronization; entry in synchronism in the lines.

The external synchronization signal is fed to the block 7 of the sync pulses of the rows on the block 8 of the sync pulses of the frame. From the output of block 7, the signal arrives at the phase comparator of 9 lines and the switch of 11 line clock pulses. From the output of block 8, the signal enters the phase comparator of 10 frames and the switch of 12 frame syncs. The phase comparator of 10 frames with memory compares the clock phase of the external synchronization frame with the clock of the frame of the synchronous generator itself, and if it coincides with the set accuracy at the output of the 10 frame frame comparator, a signal opens the switch 12 and arrives at the coincidence element 13. Phase comparator 9 lines compares in phase the horizontal synchronization pulses. In this case, in the output of the phase comparator 9 lines on the coincidence element 13, a signal arrives at the output element of the match 13 at the moment of occurrence of the signal at the output of the phase comparator 9 lines on the coincidence element 13 when a signal from the phase comparator of 10 frames was present, then at the output of element 13 of coincidence 13 a signal appears that opens switch II of the clock pulses. Entering into synchronism without a jump in the phase of clock pulses of the clock generator when working with an external clock source allows applying the above synchronization principle for almost all types of memory devices and organizing a single information system of computing and television equipment regardless of memory type.

Claims (1)

Invention Formula A synchronous generator containing a series-connected master oscillator, a row frequency divider and a frame frequency divider, the setup inputs of which are connected to the outputs of the control unit, the input of which receives an external synchronization signal, as well as the row pulse generator and the frame pulse generator, which are connected to the outputs the line frequency divider and the frame rate divider, and the outputs are sync generator outputs, characterized in 1 that, in order to eliminate the phase jump of the sync pulses when entering synchronization, the output of the string pulse generator and the output of the frame pulse generator are connected to the corresponding additional inputs of the control unit, and the control unit is designed as a series-connected frame sync pulse separator, phase frame comparator and switch frame sync pulses, the signal input of which is connected to the output of the sync pulse sync block, as well as the series-connected sync sync block Row pulses, row phase comparator, match element, another input of which is connected to the output of the frame frame comparator, and a row clock switch, whose signal input is connected to the output of a row sync pulse allocation unit, while the block input, the row sync pulse output and the input of the sync pulse pulses frames are combined and are the inputs of the control unit to which the external synchronization signal is applied, the second inputs of the phase line comparator and the frame frame comparator are additional The control unit inputs, and the outputs of the line clock switch and the frame sync switch are the outputs of the control unit. Sources of information taken into account in the examination one; USSR author's certificate 482917, cl. H 04 N 5/04, 1973 (prototype). t