SU760394A1 - Self-sustained inverter controlling and monitoring device - Google Patents

Description

The invention relates to electrical engineering and can be applied to control high frequency inverters.

Typically autonomous inverter control circuit (hereinafter, inverters) are formed in the rigid-ι vre Meni sequence control pulse via the voltage converter _ - frequency ⁽⁰ gene- master oscillator) and the annular distributor (switch) pulses.

However, in the presence of random interference, a rigid temporal sequence of control pulses is disrupted, which can lead to an emergency mode.

A device for controlling an autonomous inverter is known, which 20 contains a generator connected to a switch, a pulse shaper [1].

However, this device has a low / reliable in the event of ^ζ -> random failures.

. It is also known a device for controlling, also containing

generator connected to the switch, and pulse shapers £ 2}. thirty

2

However, if there are failures on one of the switch buses, the control circuit continues to generate control pulses, which contributes to the occurrence of emergency modes.

The closest in technical essence to the invention is a device containing four output buses, through which control pulses are formed (n b), a master oscillator connected to the control trigger, a switch (binary counter) [3].

However, in case of accidental failures on one hz η output bus of the switch, the device continues (until the protection trips) to generate control pulses from the failure interval to the protection tripping, thereby aggravating the emergency mode.

The aim of the invention is to improve the reliability of the device to control.

This goal is achieved by the fact that the device for controlling an autonomous inverter, containing a switch with η output buses, connects to the master oscillator connected to the Trigger, a block of control pulse shapers, buses

760394

“Stop * ¹ and“ Start ”, a pause driver, a start driver and a control unit are entered, each of the η output buses of the switch through the drivers of the control impulse unit connected to the control unit whose output is connected to the stop input

trigger, shaper pause input and stop bus; the output of the pause driver is connected to the input of the start-up driver, the switch installation input and the Start bus, the output of the start-up driver is connected to the trigger trigger input; in addition, the control unit contains an OR element for 2 η inputs, a block of η two-input elements AND, a block of η elements OR, each having (n-1) inputs, a block of η gate formers, and one of the inputs of each element AND block is connected with the corresponding output of the control pulse driver unit, and the other input of each element AND block is connected to the output of the OR element, (p-1) whose inputs are connected to the remaining outputs of the block of control driver formers, and the 'η outputs of the AND block of the element , but torye η inputs of the OR gates via respective conditioners are connected to the respective outputs of the control pulse generator.

FIG. 1 shows a block diagram of a device for control and monitoring; in fig. 2 - control unit diagram.

The device contains a switch 1, one input connected to the master oscillator 2, which is connected to the output of the trigger 3, which has start and table inputs, and η outputs of the switch 1 are connected to the inputs of the block 4 of the control pulse drivers, which also has η outputs. The shaper 5 start-up output is connected to the trigger trigger input, and the input is connected to the start bus and the output of the pause 6 shaper, which is connected to the output of the control unit 7, which contains the element OR 8 (see Fig.2), 2η inputs of which are connected to unit 9 two-input elements And connected to the outputs of the block 10 elements OR · and with the outputs of the driver 4 pulses. Block 11 of the η gate formers is connected to the OR 8 element, and the inputs to the outputs of the 4 pulse generator. The operation of the device is to

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In the initial state, the device is in the positions when the “Stop” command is sent to the trigger 3 and the initial switch-on requires a “Start” signal.

When the start signal is given, switch 1 is set to the original

state, and driver 5 through ¢ 5

time £ 3 using trigger 3 turns on master oscillator 2. In the absence of random failures, master oscillator 2 continuously receives pulses on switch 1.

'If the unit is present only on one of the output buses of the switch 1, and on the others - zeros, in this case units are sequentially fed to the first inputs of elements AND of block 9, and to the second inputs through elements OR blbka 10 - zeros, which leads to no signals at the output of block 9.

The second g, the inputs of the element OR 8, receive pulses from the block of 11 gate formers, which overlap each other in duration, therefore the signals of the zero state come to the input of the element OR 8.

If a random failure occurs, for example, a false unit appears in the 5th bus, the first input to the first input of block 9 is the true one, and the second input through ’(η -1) - the first input element OR of block 10 is a false one. In this case, the input element And 9 there is a match, and the output is formed by a pulse unit, which through the element OR 8 enters the input of the trigger 3, prohibiting the work of the master oscillator 2. At the same time, this pulse starts the shaper 6 pause. Using a pulse cutter of this driver, the switch is set to the initial state, and after a time, with the help of the start-up driver 5, trigger generator 3 is turned on via trigger 3.

In the presence of a failure situation, the protection circuit is activated. Thus, when a failure occurs (a false unit), power switching circuits are turned on, protective devices in power circuits are triggered, and after a finite time determined by the speed of the protection circuits, the master oscillator turns off, i.e. stops the flow of control pulses.

. In the case of the disappearance of the true unit, for example, on the 3rd bus, at the output of the element OR 8, a single impulse with a duration of 1/2 is formed, which includes the driver 6 pauses. Further, the work of elements occurs in a similar way.

Thus, in the event of an accidental failure in the form of a false unit or loss of the true one, the control circuit is activated and the operation of the master oscillator is controlled, which increases the reliability of the inverter.

Claims (2)

Claim 1. Device to control and monitor the operation of autonomous inverto760394 Pa, containing a switch with η output tires, an input connected to a master oscillator connected to a trigger having start and stop inputs, a block of control driver formers, a bus Stop and Start, characterized in that it is equipped with a start driver, a Douse driver, and a control unit, each of the n output buses of the switch is connected to the control unit through the drivers of the control pulse unit, the output of which is connected to the trigger stop input, the driver input pause minutes with bus "Stop", pausing generator output coupled to an input trigger generator, adjusting input of the switch and bus "Start" starter generator output is connected to the trigger input of the flip-flop. 2. Device by π. 1, characterized in that, in order to automatically monitor failures on the control buses, the control unit contains an OR element at 2η inputs, a block of η two-input elements AND, a block of η elements OR, each having (n-1) inputs, a block of n gate driver, with one input each element AND block is connected to the corresponding output of the block of control pulse formers, and the other input of each element AND block is connected to the output of the OR element, (n-1) whose inputs are connected to the remaining outputs of the control pulse driver block, and η outputs of the AND block of the elements are connected to the first η inputs of the OR element, and the second η inputs of the OR element The ’θ corresponding gate formers are connected to the corresponding outputs of the control pulse former. 15