SU752771A1 - Pulse shaper - Google Patents

Description

The drawing shows a schematic diagram of a pulse former.

The pulse shaper contains I-NE elements 1-5, two of which are connected but a trigger circuit, three integrating C-values 6-8, the top of which contains capacitor 9 and reznstor 10 turned on at the input, and the second / C-circuit 7 containing a resistor 11 and a capacitor 12, is turned on at the output of the H – NE 3 element. One of the inputs of the NAND 4 element is connected to the output of the third integrating C-circuit 8 containing a capacitor 13 and a resistor 14. The inputs of the N-5 element and the other the input element AND-NOT 4 is connected to the input of the imager, the output of the element AND-NOT 4 is connected to one of the inputs tr igger, which is one of the inputs of the element AND-NOT 1. The input of the third C-circuit 8 is connected to the output of the element AND-NOT 2. The element AND-NO 5 with a free collector, used as a key, is connected by its output to the output of the first integrating / C-circuit 6, the cathode of the diode 15 and one of the inputs of the element AND-NO 3, the second input of which is connected to the anode of the diode 15 with the output of the element AND-NOT 1. The output of the second C-circuit 7 is connected to the second input of the trigger, which It is one of the inputs of the NAND element 2. The outputs of the elements 4, 3, 1 and 2 are connected respectively to the outputs 16-19 rmirovatel pulses.

The pulse shaper operates as follows.

In the initial state, a low level of power is applied to the driver input. At the output of the elements AND-HE 4, 3 and 2, a high voltage level is established, and at the output of the elements AND-HE 5 and 1 - a low level. The capacitors 13 and 12 are charged to a high level, and the capacitor 9 is charged to a low voltage, the diode 15 is open.

In the case of the input of the high level generator, the element AND-NOT 4 switches, a low voltage appears at its output, which is fed to the input of the trigger assembled on the AND-HE elements 1 and 2, it switches also at the outputs 16 -19 shaper appears low level of voltage, and at shaper 18 output is high, diode 15 closes. The capacitor 13 begins to discharge through the resistor 14.

As the voltage on the capacitor 13 reaches the switching threshold of the NAND 4 element, this element switches and a high voltage level appears at its output. At the same time, when a high voltage level generator appears at the output, the element AND NOT 5, which is used with a free collector, as a switch, switches over and takes current, and prevents the capacitor 9 from charging through the resistor 10. The output level of the shaper does not change From the high to the low element, the AND-NOT 5 is turned off and the air conditioner 9 starts to charge. If you hit a high level at the input, a high level appears, the H – NE 5 element switches and discharges the capacitor 9. This process will be repeated until the driver is at the input

a low voltage level will not be established for a time longer than the charging time of the capacitor 9 until a voltage equal to the switching element H-NOT 3 is observed. At the same time, this element is not switched off,

At output 17, a low voltage level appears. Capacitor 12 begins to discharge. When the voltage across it drops to the switching threshold of the element AND NOT 2, the trigger switches

and a high voltage level appears at the output 19 and the capacitor 13 is charged, and a low voltage level appears at the output 18, a diode 15 opens and the capacitor 9 is charged. The circuit returns to its original state.

Thus, under the condition that the charging time of the capacitor 9 is longer than the storage time at the input of the low voltage generator

between the pulses arriving at the input of the driver, at the outputs 16, 18, 17, 18 of the driver, single pulses will be generated characterizing the output 16 - the beginning of the arrival

the input of a single inertial generator or a series of pulses of a signal and interference, the duration of which is equal to the discharge time of the capacitor 13. Output 18 and inverse output to it - 19 input to the input

a forwarder of one or a series of pulses of a signal and interference, the duration of which is equal to the sum of the action time of one or a series of input pulses, the charge of a capacitor 9, a discharge of a capacitor 12, an output

17 - the termination of the action of one or a series of input pulses, signal n interference, the duration of which is equal to the discharge time of the capacitor 12.

By using the input element AND-HE 5 at the input of the pulse generator with a free collector as a key, high noise immunity is reduced and the performance of the driver increases due to the fact that the charging time of the first integrating / C-circuit 6 is chosen longer than the pause time between the input signal pulses and interference, and no more than the expected duration of a series of input pulses of the signal and interference, as in the known driver, in the formation of a single pulse. A single impulse or a series of pulses of a signal and interferences can be applied to the input of the imager for a random duration of these signals.

The use of the IN-4 element generator at the input allows the pulse 16 output at the output of the shaper with a minimum delay relative to the first input pulse, which is determined by the switching delay time of one AND-NOT logic element, which ensures a high speed of the shaper of single pulses. Introduction of the third integrating RC-u. &Amp; 8 allows to obtain a pulse at the output of the shaper 16, the duration of which depends on the choice of a constant integration time of the third C-circuit 8. The use of diode 15 significantly reduces the discharge time of the capacitor 9 of the first integrating C-circuit 6, which reduces the recovery time of the former.

Claims (1)

Invention Formula Pulse shaper auth. St. No. 487449, characterized in that, with in order to improve speed and noise immunity, a third integrating C-circuit, the fourth and fifth AND-NOT elements are entered into it, and the output of the fourth AND-NOT element is connected to one from the inputs of the first IS-NOT element, the second input of which is connected to the input of the third integrating C-circuit, the output of which is connected to one of the inputs of the fourth AND-NOT element, the other input of which is connected to the inputs of the fifth IS-NE element, the output of which is connected to the output of the first integrating 7 C-circuit. Sources of information taken during the examination , 1. USSR Author's Certificate No. 487449, cl. H OZK 3/28, 1974. rS