SU571754A1 - Digital device for measuring acceleration - Google Patents

Description

one

The invention relates to the field of instrumentation and can be used to measure the acceleration of objects whose velocity value is represented as a frequency pulse signal.

Devices for measuring acceleration 1 are known. However, they do not provide for the registration of measured angular velocity values in the digital ({yurme.

A digital device for measuring acceleration is known, which contains a speed sensor connected through a driver and two-counter gates, a reference frequency generator and a control unit connected directly to one valve, and an inverter 2 j via a second loop. However, its output signal is a parallel binary code, for decimal decoding of which a static code converter is needed. This complicates the registration system 2 by increasing the number of characters of the coded word.

The purpose of the invention is to simplify the system for recording the output information of a device, to be used.

for example, an electron-countable frequency meter operating in the mode of measuring the time interval. This is achieved by the fact that the device is equipped with a selector, the input of which is connected to the reference frequency generator, and the outputs to the counting inputs of reversible counters, decoders connected to the outputs of the counters, trigger and the first inputs are connected to the outputs of the decoders, the EXCLUSIVE IDI circuit, the inputs of which are connected to Trigger Outputs, and Phy1 Driver | reset pulses, the input of which is connected to the output of the EXCLUSIVE OR circuit, and the output to the control unit and the inputs for setting the cool state of the counters and triggers, and the vents are equipped with additional blocking inputs connected to the output of the control unit to which the selector control inputs and reversible counters.

The drawing shows a block diagram of a digital device for measuring acceleration.

The cyanfrequency acceleration measurement device contains a sensor 1, a driver 2,

selector 3t control unit 4, aentipi 5 and 6 | iver1x p 7 | reversible counters 8 and 9, decoders 10 to 11, memory triggers 12 and 13, circuit EXCLUSIVE OR 14 n reset pulse shaper 15.

From the output of sensor 1, electrical pulses with a following frequency /, proportional to the speed Y, through the driver 2. arrive at the entrances of the valves 5 6. The control unit 4 generates a sequence of commands switching circuit elements,

At the moment of time to, the control unit 4 is connected to the input of the valve 5 and the input of the resolution of the addition of the reversible counter 8 directly, and the input of the valve 6 and the input of the resolution of the addition of the reversible counter 9 through the inverter 7 are received equal to adjacent signals of duration f, providing alternate switching of the channels digital information processing. During the duration of these {shtpervalov each of the reverse counters calculates the corresponding number of pulses of frequency f. In order to measure the acceleration value, it is necessary to determine the difference between the states recorded in the reversible state and the counters.

The subtraction of the states of the reversible counters is carried out as follows about & time. The combined blocking inputs of the valves 5 and 6, the control input of the selector 3 and the enable inputs for subtracting the reversible counters 8 and 9 from the control unit 4 at the moment of time t & reversible chik 8 and 9 - subtraction. . At time, the status of the reversible counters 8 and 9 is as follows:

where and NJ, are the states of the reversible counters 45 and 9 and 9 are co-geted.

Through the open selector 3, the inputs of counters 8 and 9 simultaneously receive the signal of the reference frequency / d, driving them to the initial state. If we assume that 50 Hj Mg (deceleration), then at the moment

of time

t,

the reversible counter 9 will return to its initial state and the decoder 11 will give a pulse, 5 which will transfer the memory 13 to the state.

Since the memory trigger 12 is in the state O, the EXCLUSIVE scheme OR 14 is set to state I.

In the moment

 t -2T4N /)

the counter 8 is reset, the descriptor {) the 1O ramp generates a pulse, which triggers the memory trigger 12 into the state, i.e., both inputs of the circuit 14 will be in the state, thereby ensuring the state O at its output.

By switching the circuit 14 to the state O, the reset pulse shaper 15 generates a pulse preparing the device for the next measurement cycle.

Claims (1)

1. USSR author's certificate No. 485387, cl. & -01 P 15/08, 1973. A. Meuegh L.R tachymett e acce erofnetre timere ue,, Mes,, automat 1974, 39, No. 1,