SU560222A1 - Device for converting binary code to gray code and vice versa - Google Patents

Description

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The invention relates to automation and computing technology and is intended for use in various data conversion devices.

Devices are known for converting a binary code into a Gre code, devices for converting a Gre code into binary code 1, and devices in which these conversions are combined.

Of the known devices for converting the code, the closest in technical essence to the invention is a binary code converter to the Gray code and back, containing delay elements, AND elements and a counter, the information inputs of each bit of which are connected to the information input 2.

However, in this converter, to prevent false triggering of the triggers, the conversion signal from the binary code to the Gre code should not exceed the switching time of the triggers in duration. To fulfill the conditions in the converter, it is necessary to use slow-acting triggers, or to artificially increase the switching time of the flip-flops.

The purpose of the invention is to increase the speed of the device for converting a binary code to a Gre code and vice versa while improving reliability.

This is achieved by the fact that the device contains drivers in each digit of the counter, while the output of the high discharge of the counter is connected to the input of the corresponding driver, the output of this driver is connected to the input of the delay element of this counter, the output of which is connected to the input of the next low bit the counter, the outputs of the remaining bits of the counter, except the younger one, are connected to the inputs of the corresponding drivers, the outputs of which are connected to the first inputs of the elements AND the corresponding counter bits, the outputs of these AND elements Connected to the inputs of the delay elements of the same counter bits, the outputs of which are connected to the inputs of the neighboring lower-order bits of the counter, and the second inputs of all I elements to the control input bus.

With such a device implementation, the control input for direct and inverse conversion between the binary code and the Gre code is common, there is no need for small duration conversion signals, since to convert a binary code into the Gre code, a pulse is applied to the control input And after passing the first pulses from the formers after the arrival of the binary code on the trigger register. When converting the Gre code into a.-Needle code, the need for control pulses generally disappears, the elements AND are constantly open by the resolving potential at the control input. In this connection, triggers with any speed can be used in the device, which determines the high speed of the entire code conversion device. In addition, the code conversion process starts immediately from the moment the code is received on the trigger register, and not by a command from the control input.

The drawing shows a diagram of a device for converting a binary code to a Gre code and vice versa.

The device contains a counter 1 of the flip-flops 2 with counting inputs connected to the outputs of the flip-flops 2 shapers 3 generating impulses when the status of the flip-flops changes, the time delay elements 4, the outputs of which are connected to the counting inputs of the triggers, and the AND elements 5 whose control inputs are combined and form a conversion control input on control input bus 6.

In the initial state, the trigger counter 1 is reset to zero and all triggers 2 are in the zero state. The code to be converted enters triggers 2, and the status of the triggers changes from zero to one in those bits in which the code is equal to one. Connected to the outputs of the flip-flops 2, the shapers 3 produce a pulse at each change of state of the corresponding trigger, regardless of whether this state changes from zero to one, or, conversely, from one to zero. The imaging unit 3 can be executed not only by the active, but also by the passive circuit, for example, it can consist of two differentiating chains, one of which is connected to the unit circuit and the other to the zero outputs of trigger 2. In this case, the outputs of the differentiating chains are combined the OR circuit, the output of which is connected to the corresponding element AND 5. The pulses from the outputs of the drivers 3 pass through the elements 5, if at this moment the control potential acts on the control input 6. In the higher order, the presence of the scheme is also optional, and it is absent. From the outputs of the AND 5 circuits, the pulses arrive at elements 4, the delay time ty of which is 4, where Gper is the non-switching time of the trigger. In the case of a conversion from the Gre code to a binary code, the And 5 elements are open via control input 6 for the entire conversion time. To convert from the binary code to the Gre code, the AND elements remain open only for the first pulses from the formers 3, after which they are closed; 7per closed 7per + 3, where 4acr is the time of changing the permissive potential to the inhibitory one at control input 6, counted from the moment code arrives at counter 1.

Example 1. Converting a Gre code into a binary code. Suppose the counter receives the code 1010 (in the decimal system - twelve). The shapers 3 of the fourth and second bits produce pulses that, after a time t ts, receive the counting inputs of the flip-flops 2 of the third and first bits, respectively, changing their state

1010 101

1111

In connection with the change in the state of the third bit trigger, the corresponding driver generates an impulse which, having passed the element 5 and the delay element 4, arrives through time 4 to the counting input of the second bit trigger, changing its state 1111 10

1101

Since the trigger state of the second bit changes, the pulse from the shaper connected to it through time / s is fed to the counting input of the first bit trigger

1101 1

Tgo

as a result, the binary number 1100 appears in the register (12 in the decimal system).

Example 2. Converting binary code to Gre code. Let the counter receives the code number 1101 (thirteen). In connection with the change in the state of the flip-flops 2 of the fourth and third bits, the drivers 3 connected to them generate pulses that after a time t t arrive at the counting inputs of the triggers of the third and second digits, respectively.

1101 software

1011

The state of the third and second bit triggers changes, and the drivers 3 connected to them produce a pulse, however, by this time all elements AND are closed by control input 6, and the result 1 remains result 1011 (thirteen in the Gray code).

An experimental verification of the device confirmed a significant increase in the rate of conversion of codes, due to the lack of speed limits associated with the parameters of the conversion control signals.

Claims (2)

1.Sukhomlinov MM and others. Converters codes of numbers. Kiev, Technique, 1965, p. 120 2. Authors certificate of the USSR №160041, G 06F 5/02, 1962. Nt LdAL7- / N-, N,