SU558418A1 - Aperture Correction Device - Google Patents

Claims (1)

signals (see Fig. 2c), whose duration () depends on the sweep voltage and corresponds to the minimum sweep speed. The correction signal selection circuit (delay blocks 4 and 5) and phase inverter 2 have an amplitude-frequency response corresponding to the maximum delay and the minimum sweep speed. At the same time, the signal (see Fig. 2, a) is not connected to the delay unit 3, whose delay (s) is equal to the duration of the signals (see Fig. 2, e) and varies depending on the sweep voltage supplied through the matching unit 8. The delayed signal (see Fig. 2, a) occupies the corresponding temporary position (see Fig. 2, d). Selected correction signals (see Fig. 2, c) are inverted in phase inverter 2 and summed in adder 1, the output of which produces a corrected signal (see Fig. 2, e), corresponding, for example, to the minimum sweep speed and maximum time delay delay blocks 3, 4 and 5. Accordingly, for the maximum sweep speed, the delay of the delay blocks 3, 4 and 5, which varies according to the law, where (/ p is the sweep speed, P is the minimum source signal (see Fig. 2, a) is shortened by the delay unit 4; The current signal (see Fig. 2, e), which enters the block of the delay 5, where the correction signal is extracted (see Fig. 2, g) is inverted in the phase inverter 2 and summed in the adder 1 with the delayed in the block 3 source signal (see Fig. 2, h). At the output of the adder 1, a corrected signal occurs (see Fig. 2, etc.) Thus, the proposed device provides the possibility of correcting aperture distortion at a variable sweep speed. Claims of the invention Aperture correction device comprising an adder, to the first input of which a phase inverter output is connected, and to the second output of the first delay unit, characterized in that, in order to increase the range of the corrected signal, the second and third delayed units are connected in series, while the output The third delay unit is connected to the phase inverter input, and the first input of the first delay unit is connected to the first input of the second delay unit, to the second inputs of the first, second and third delay units connected respectively entered the first, second and third matching blocks, the inputs of which are interconnected. The source of information taken into account in the examination: 1. Leites, LS, Television equipment, M., “Sv, 1970, p. 190 (prototype). 0 -0 fi / e.1 one -one 8-G hp 7-3 j: F -f