SU430512A1 - REVERSIBLE IMPULSE COUNTER - Google Patents

Description

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The invention relates to the field of electronics, automation and computer technology.

A reversible pulse counter is known, which contains a pulse counter on phase-pulse multi-stable elements with a high-level borrowing signal extraction circuit, with a source of pulses of an auxiliary reference sequence and with a lower-order borrowing trigger, and a sign trigger with a forward and reverse counting channel switch.

The purpose of the invention is to streamline the counter.

For this purpose, the output of the high-resolution loan isolation circuit is connected to the first input of an additionally introduced phase setting circuit, the second input of which is connected to the source of the pulses of the auxiliary reference loop through the delay element, and the output is connected to the lower-trigger trigger input and the counting input trigger sign.

The drawing shows the scheme of the proposed counter.

When the account proceeds through the zero state in the process, if the account is made in. the opposite direction (downward), the first impulse received at the input 1 of the counting, passes through the counting channel through the high-level borrowing pulse separation circuit 2 to the phase setting circuit 3, to the second input of which the pulses of the auxiliary reference leg 4 are fed delays through

element 5 delay or without it. The impulse from the circuit 3 switches on the counting input a trigger of 6 characters, which commutes the inputs of forward 7 and reverse} counts through the AND8 switch circuits 9 channels of forward and reverse counting at the inputs of devices 10, 11. The delay element is necessary when the counter is operating in the reshmme simultaneous counting via forward and reverse counting channels.

At the same time, from the output of circuit 3, the pulse through the circuit OR 12 is fed to the input of the trigger 13 of the low-order loan, due to which a through loan in the bits is excluded, since the duration of the loan impulse

at the output of the trigger 13 is less than the duration of the period of clock pulses. In addition, the pulse from the output of circuit 3 through the delay element 14 and the circuit “OR 15 is fed to the lower-order counting input of the pulse-phase pulse

multi-stable element j6. The delay time of the element 14 is determined by synchronizing the MI pulses of the auxiliary clock sequence from the output of the generator 17. Thus, with the help of a trigger 6 characters

At output 18, a "minus" sign appears, and in the low-order section of element 16, the value "one" is set.

When passing through the zero state in the counting process, if the counting is made upwards (from the region of negative to positive numbers), the first impulse received at the input 7 of the direct counting goes through the counting channel, and the output of circuit 3 coincides with is a pulse that switches the trigger of the 6 Sign to the state corresponding to a positive number. At output 19 of trigger 6, a plus sign appears. Thus, at the outputs 20 of the countable bits of the element 16, information for positive and negative numbers is presented in the forward phase-pulse code.

In the drawing, reference numeral 21 denotes the reference cell.

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Inventory

A reversible pulse counter containing a pulse counter on phase-pulse, multi-stable elements with a high-level borrowing signal extraction circuit, with a source of pulses of an auxiliary reference sequence and with T | rigger 01M loan of a lower bit, cereal trigger

with a forward and reverse counting channel switch, characterized in that, in order to simplify the counter, in it the output of the high-resolution loan isolation circuit is connected to the first input of the additionally introduced phase setting circuit, the second input of which is connected to the pulse source through a delay element auxiliary reference sequence, and the output is connected to the trigger input of the low-order loan and

with a counting sign trigger entry.