SU1697185A1 - Method of checking of permissible time of lead of synchronizer - Google Patents

Description

one

(21) 4687842/07 (22) 05/11/89 (46) 12/07/91. Bul №45

(71) Central Technical Design Bureau of the Scientific-Production Association Shipbuilding

(72) N.V. Shirokov

(53) 621.316.729 (088.8)

(56) USSR Author's Certificate N 1536477, cl. H 02 J 3/40, 1988.

USSR author's certificate M 1629943, cl. H 02 J 3/40, 1988. (54) METHOD FOR MONITORING THE ALLOWABLE TIME OF THE SYNCHRONIZER LAYOUT

(57) The invention relates to electrical engineering. The purpose of the invention is to simplify the method.

For this, two single pulses are formed, one at the time of coincidence of the phases of the mains and generator, and the other at the time of closing the generator switch. At the time of the formation of the first unit pulse, a rectangular pulse is formed, the duration of which is chosen to be equal to the maximum allowable time from the moment of the occurrence of a zero phase shift to the moment of closing the automatic switch. If the second unit impulse is formed during the time interval of action of the rectangular impulse, the allowable lead time is fixed 2 sludge.

The invention relates to electrical engineering and is intended to automatically control the timing of the advance of the synchronizer.

The purpose of the invention is to simplify the method.

FIG. 1 is a timing diagram of the passage of signals; in fig. 2 is a block diagram of a device implementing the proposed method.

FIG. Figure 1a shows the voltage of beat Ub and the timing of the synchronizer to is marked.

In the ideal case, the timing time of the synchronizer t0nep is equal to the response time of the automatic switch synchronized with the TCP generator. AB and switching to parallel operation occurs at the moment w coincides with the network voltage i of the generator (Fig. 1j, point n).

In practice, non-critical deviation of the moment of closing of the circuit breaker from the moment of coincidence of the phases of the mains voltage and the generator ti is allowed. This deviation in FIG. 1 a is labeled At.

It follows from the above that the accuracy of switching on the generator on the gzoal / nyu work is determined in; with the response time of its automatic switch and the timing of the advance of the synchronizer - inteoval ti, g.

However, I-p AB is practically unregulated, during which bn is an adjustable pappemet of it.

ABOUT

well a

In this regard, it is most advisable to control the timing of the synchronizer with respect to the real time of the operation of the circuit breaker. If the interval c. 2 is less than At, then the timing of the synchronizer is normal. If ti, t2 is greater than At, then the lead time does not match the given one.

Two situations are possible: if the circuit breaker closes before the time ti arrives, the tonep time should be reduced; if the circuit breaker closes later than the phases of the mains and generator voltages (ti) match, the lead time should be increased.

Fig. 1b shows a single pulse generated at the time of the coincidence of the phases of the mains and generator voltages, and fig. 1 in - single impulse, formed in ° moment of closing of the automatic switch of the synchronized generator (generator, activated for parallel operation).

At the time of the appearance of the first single impulse (in this case, the first impulse generated at the time of the coincidence of the phases of the mains and generator), a rectangular impulse of duration corresponding to the value of At (as shown in Fig. 1g) is formed

Since the second unit impulse (in this case, the second impulse formed at the instant of closing the automatic switch of the synchronized generator) turned out to be at the moment of the existence of the square impulse, the generator is switched on for parallel operation with a permissible phase mismatch - the admissible lead time is fixed.

Consider a situation where, during the process of operation, the response time of the circuit breaker has increased or the synchronizer forms a command later than it should. In this case, the closure of the automatic switch of the synchronized generator will occur at time t2 (the single pulse in Fig. 1 in is shown by a dotted line).

Simultaneously with the first unit impulse, a rectangular impulse of duration At is formed. Since the time t, 2 does not coincide with the time of existence of a rectangular pulse, the magnitude of the mismatch of the phases of the mains and generator voltages is more than a norm — an unacceptable amount of the synchronizer advance time is fixed

Since the first unit impulse is formed at the time of coincidence of the phases of the mains and generator voltages, the lead time of the synchronizer should be increased.

Suppose that the circuit breaker of the synchronized generator is first closed, then the phases of the mains voltage and the generator coincide, and the time interval between these events is longer than the specified one (A m.). Then, at the time t2, the first unit impulse will be formed (in this case, the first one will be the impulse generated at the instant of closing the circuit breaker).

At the same time, a rectangular impulse of length At is formed (as shown by the dotted line in Fig. 1d), and since the second single impulse (in this case, the second will be a single impulse formed at the time of the coincidence of the phases of the network and generator voltages) rectangular impulse, the magnitude of the phase mismatch of the mains and generator voltages is above the norm — an unacceptable amount of synchronizer advance time is recorded.

Since the first single impulse is formed at the moment of closing the automatic switch of the synchronized generator, the advance time of the synchronizer should be reduced.

The device for monitoring the allowable advance time of the synchronizer (Fig. 2) includes a 1-circuit sensor of the circuit breaker, a beat voltage shaping unit 2, the synchronizer 3, the first collecting circuit 4, the square pulse shaper 5, the second single-pulse 6, the first circuit 7 matches, the first one-shot 8, the second 9, the third 10 and the fourth 11 match schemes, the second 12 and the third 13 collecting circuits, the first 14 and second 15 flip-flops, the display unit 16, the zero setting bus 17 and the key 18. The output of the automatic closing circuit sensor 1 the switch is connected to the first inputs of the first 7 and fourth 11 matching circuits and the first input of the first collecting circuit 4. The output of the beat voltage shaping unit 2 is connected to the input of the square pulse shaper 5, the output of which is connected to the second input of the first collecting circuit 4 and the first inputs of the second 9 and third 10 coincidence circuits, the output of the synchronizer. The 3 is connected to the input of the second single vibrator 6, the output of which is connected to the third inputs of the second 9.

the fourth 11 matching circuits, the output of the first collecting circuit 4 is connected to the input of the first single-bout 8, the output of which is connected to the second inputs of the third 10 and fourth 11 matching circuits, the output of the third matching circuit 10 is connected to the first input of the second collecting circuit 12, the output of the fourth matching circuit 11 connected to the first input of the third collecting circuit 13, the zero setting bus 17 is connected to the input of the key 18 whose output is connected to the second inputs of the second and third collecting circuits 12 and 13 the output of the first matching circuit 7 is connected to unit input of the first trigger 14, the output of which is connected to the first input of the display unit 16, the inverse output of the first trigger 14 is connected to the second input of the second coincidence circuit 9, the output of the second coincidence circuit 9 is connected to the single input of the second trigger 15, the output of which is connected to the second input of the block 16, the inverse output of the second trigger 15 is connected to the second input of the two matching circuit 7, the outputs of the second 12 and third 13 1 collecting circuits are connected to the zero inputs of the first 14 and second 15 triggers, respectively.

elements introduced into the device, a circuit breaker closure sensor — generates a signal of a logical unit in the event of a circuit breaker closure, a known function element, is used for its intended purpose (for example, a circuit breaker contacts or a special inductive pressure sensor can be used as a sensor -6), that the collective schemes, the third and fourth coincidence schemes, two one-slot devices are well-known elements, used for their intended purpose, the display unit is a known function flax block used for other purposes to reflect the information on its inputs (in conventional LEDs can be used as the display unit).

Device for controlling the allowable timing of the synchronizer {fig. 2} works as follows

 The first and second inputs of the beating voltage shaping unit 2 receive signals proportional to 8 to the voltage of the network and the generator, and the output produces a voltage Uo, the amplitude of which is proportional to the phase difference between the voltage of the network and the generator (Fig. 1a).

This beat voltage enters the generator shaper 5 square impulses at the output of which

a single impulse of the DC dh (| ase of the “direct network and generator”) (FIG. 16, time tO

A single impulse with hot springs. 8 formchro wool l 5 square pulses are fed to the second input of the first collecting circuit 4 and appear at its output.

On the leading edge of a single impulse at the output of the first collecting circuit -4 and at the output of the first one-shot

8 the signal of a logical unit of duration At is formed (fit 1 g)

This signal arrives at the second inputs of the third 10 and fourth 11 schemes of coincidence, on the outputs of which there is a sigmal logical zero, since at their third inputs there is a logical zero

Similarly, a single impulse from the output of the rectangular impulse generator is fed to the first inputs of the second 9 and third 10 coincidence circuits, but their outputs have a fixed logical zero signal, since the logical inputs to the network inputs are zero

After what, how the synchronizer 3 will work, the signal of the logical unit will go to the input of the second one-vibrator b and at its output a signal of the logical unit will be generated, the duration of which is much longer than the nominal Topper (for example, the duration of the signal at the output of the second oscillator 6 can be selected twice longer than the nominal response time of the automatic shutdown of the generator being synchronized, since the value of D t is usually 4-5 times less than the nominal value of tLO AI, and the change of the response time of the automatic whom the switch occurs as a rule, smoothly and can not change P, va times)

The signal of the logical unit from the output of the second one-shot 8 goes to the third inputs of the second 9, tracks 10 and the fourth 11 coincidence circuits.

Assume that the response time of the circuit breaker is slightly longer than the timing advance of the synchronizer. In this case, the phases of the mains and generator voltages will first coincide and then a single impulse appears at the output of the 5 square impulse generator (16)

This impulse goes to the first inputs of the second 9 and third 10 coincidence circuits. Since the first trigger 14 is in the zero state, the signal of a logical unit is fixed at its inverse output, which is fed to the second input of the second circuit

9sorpadeku.

Since the synchronizer 3 has operated, the signal of the logical unit appears at the output of the second one-shot 6, which is fed to the third input of the second matching circuit 9.

Since the signal of the logical unit is on all three inputs of the second circuit 9, a signal of the logical unit appears at its output, which is fed to the unit input of the second trigger 15. The second trigger 15 is set to one, its output is the logic signal units, and at the inverse output - a logical zero signal.

The signal of the logical unit from the output of the second trigger 15 is fed to the second input of the display unit 18, the output of which shows that the circuit breaker closed later than the phases of the mains and generator voltages coincided.

The logical zero signal from the inverse output of the second trigger 15 is fed to the second input of the first coincidence circuit 7. A single impulse from the output of the former 5 rectangular pulses at time ti arrives at the second input of the first collecting circuit 4 and appears at its output. In this case, at the output of the first single-vibrator 8, a signal of a logical unit appears, whose duration is equal to At (Fig. 1d), and is fed to the second inputs of the third 10 and fourth 11 coincidence circuits.

Since all three inputs of the third circuit 10 match there are signals of a logical unit, then at its output there is a signal of a logical unit that arrives at the first input of the second collecting circuit 12, the output of the last is a signal of the logical unit and the input zero trigger 14, it remains in the zero state.

At the second and third inputs of the fourth circuit 11 of the coincidence there is a signal of a logical unit, and at its first input there is a logical zero, therefore, the output also has a logical zero.

If the automatic switch of the synchronized generator closes with permissible accuracy (within the interval D t after the moment of coincidence of the phases of the mains voltage and the generator), a single impulse will be generated at the output 1 of the closure sensor of the automatic switch (Fig. 1c), which is fed to the fourth input schemes 11 matches.

Since the second and third inputs of the fourth coincidence circuit 11 already have signals from a logical unit, a single signal is formed at its output, which is fed to the first input of the third collecting circuit 13

Logical unit output signal

The third collecting circuit 13 arrives at the zero input of the second flip-flop 15 and sets it to the zero state. At the output of the second trigger 15 a logical zero signal appears and is fed to the second input

the display unit 16, the information about the lag in the operation of the automatic switch disappears.

Since the At interval is very small (20-30 ms), this information will be presented in the form of a single blink of the corresponding indication element (LED, signal lamp, etc.).

If the automatic switch of the synchronized generator is closed

later than the interval At after the moment of coincidence of the phases of the mains voltage and the generator, the signal of the logical unit from the output of the sensor 1 of the circuit breaker will arrive at the first input of the fourth circuit 11 of the match at the time when the output of the first one-shot 8, and therefore the second the input of the fourth coincidence circuit is a logical zero, and therefore, at the output of the fourth coincidence circuit 1 i, a logical signal, the second trigger 15 will not change its single state.

Information about the lag in the operation of the automatic switch through the display unit 16 will be presented. In this case, it is necessary to increase the timing of the synchronizer

If the lead time of the synchronizer is long, the automatic switch of the synchronized generator closes before the moment of coincidence of the phases of the mains voltage and the generator occurs. In this case, after the synchronizer 3 triggers, the first pulse of a single pulse at the output of the sensor of the circuit breaker circuit 1 will go to the first input of the first matching circuit 7.

Since the second trigger 15 is in the zero state, then its inverse output is a signal of a logical unit, which is fed to the second input of the first coincidence circuit 7. On both inputs of the first circuit

7, the signal of a logical unit coincides, which means that, at its output, a signal of a logical one that arrives at the unit input of the first trigger 14 and sets it to the unit state.

The signal of the unit from the output of the first trigger 14 is fed to the first input of the display unit 16, which provides information that the automatic switch of the generator being synchronized closed earlier, it was the coincidence of the phases of the network voltage and the generator

At the inverse output of the first trigger 14 a signal of the logical unit appears and is fed to the second input of the second coincidence circuit 9, blocking the possibility of occurrence of the signal of the logical unit at its output. A single pulse from the output of the sensor circuit 1 of the circuit breaker is fed to the first input of the first collecting circuit 4, at the output of which a single pulse appears, and is fed to the input of the first one-shot 8

At the output of the first one-shot 8, a signal of a logical unit of length At appears and arrives at the second inputs of the third 10 and fourth 11 coincidence circuits. If during the interval At the phase of the mains voltage and the generator coincide, then the output of the rectangle 5 will produce a single pulse impulse and go to the first input of the third circuit 10 match

Since after triggering the synchronizer 3, the signal of a logical unit is fixed at the output of the second one-shot 6 and, consequently, the third input of the third JK coincidence circuit, the output of the third coincidence circuit is the signal of a logical unit that is fed to the first input of the second collecting circuit 12.

The signal of the logical unit from the output of the second collecting circuit 12 is fed to the zero input of the first trigger 14 and sets it to the zero state. In this case, the signal of a logical zero appears at the output of the first trigger 14 and is fed to the first input of the display unit 16, the information about the advance in the automatic switch operation disappears.

If the phases of the mains and generator voltage do not coincide during the interval At, then a single impulse to the first input of the third circuit 10 will arrive at the moment when at the output of the first single-wave 8 and respectively second

the input of the third circuit 10 matches the WITCH LOGICAL zero signal. Therefore, the output of the third circuit 10 coincides with a fixed logic zero signal.

The first trigger 14 remains in one state. The display unit 16 will provide information that the circuit breaker of the synchronizing generator closed before the phases of the mains voltage and the generator coincided. Therefore, in this case it is necessary to increase the timing advance time 3

To bring the device to its original

state enough to close key 18. In this case, the signal of the logical unit from the bus 17 of the zero setting through the key 18 will go to the second inputs of the second 12 and third 13 collecting circuits at their outputs will receive the signals of the logical unit and will go to the zero inputs of the first 14 and the second 15 triggers, which are set to the zero state. After unlocking the key 18, the device is again ready for operation.

Claims (1)

Invention Formula The method of controlling the allowable timing of the synchronizer ahead, according to which the phase shift between the mains voltage and the generator voltage to the synchronizer input is monitored, and at the moment that the phase shift equals zero, a single impulse is formed, and also fix the closure time of the automatic switch of the synchronized generator, characterized in that, for the purpose of simplification, the closure moment of the automatic switch forms a single impulse, at the moment of the appearance of the first single impulse / pie, a rectangular impulse is formed whose duration is equal to from the moment the occurrence of a zero phase shift between the mains voltage and the generator until the time of the automatic switch of the synchronizing generator, and if the second single impulse is formed during the time interval of action of the rectangular impulse, fix the allowable lead time FI.1