SU1683183A1 - Device for correction of color difference signals in secam color tv system encoder - Google Patents

Abstract

This invention relates to CECAM color television coding devices. The purpose of the invention is to improve the accuracy of the correction. The device contains a predistortion unit 1, an analog-digital converter 2, a restriction block 3, a digital-analog converter 4, a first comparator 5, an zero block 6, a first multiplexer 7, a first computing unit 8, a second comparator 9, a second computing unit 10, the first 11 and the second 12 drives, the third digital comparator 13, the decoder 14, the second multiplexer 15. The pre-distorted video signal is fed to the input of the first comparator 5, where it is compared with the level code O. The second digital comparator 9 is designed to compare the code c difference signal with the code of the selected limit level. This comparator 9 generates the control signals Larger and Lesser, First accumulator 11 accumulates the signal of the cut-off part of the ejection area and this accumulation continues until the excess signal disappears. From this moment on, block 10 and the second accumulator 12 begin to work, calculating the area of the difference between the limiting level and the signal within the dynamic range. The comparator 13 compares the current values of the area signals from the accumulators 11 and 12. The device is constructed so that the distortions arising from the limitation of the color difference predistortion signal are minimized. 1 il. (/ WITH

Description

This invention relates to color television encoders of the SECAM system.

The aim of the invention is to improve the accuracy of the correction.

The drawing shows a block diagram of the proposed device.

The device contains a predistortion unit 1, an analog-to-digital converter (ADC) 2, a limitation block, a digital-to-analog converter (DAC) 4, the first comparator 5, a zero reset unit 6, the first

multiplexer 7, the first computing unit 8, the second comparator 9, the second computing unit 10, the first 11 and the second 12 drives, the third comparator 13, the decoder 14, the second multiplexer 15.

The proposed device works as follows.

The input of the predistortion circuit receives a color and magnetic signal. With the help of the ADC predistortion, the signal is digitized. The first comparator 5 compares the digital code

00

with

J

00

GO

the input to the second information input, with the code level O supplied to the first information input. Correspondingly, one of the outputs of block 5 shows a More or Less signal, controlling the choice of the level of limitation from above or below using the first multiplexer 7. The code of the selected level of limitation is fed to the first information input of the second comparator 9 simultaneously with the code of the color difference signal coming from the input of the device to the second information input of this comparator. Block 9 is designed to compare the code of the color difference signal with the code of the selected limit level. This comparator produces two control signals acting on the computing blocks 8, 10 and drives 11,12.

In computational blocks 8, 10, the difference between the color difference signal code and the level of restriction arriving at their information inputs is determined. In the case when the signal code is out of the dynamic range, the accumulator 11 accumulates a signal of the cutoff part of the outburst; this continues until the excess signal disappears. From this point on, the second computational unit 10 and the second accumulator 12 begin to work, calculating the area of the difference between the limiting level and the signal within the dynamic range, Digital Comparator 13 compares the current values of the area signals from the two accumulators arriving at its data inputs, and Larger or Lower signals controlling the operation of the decoder. The decoder 14 controls the operation of the second multiplexer 15, the task of which is to pass the input signal or the code of one of the restriction levels from the output of the first multiplexer to the output of restriction block 3. The task of the decoder 14 is to output a control signal depending on the combination of input signals. The control code is fed in parallel to the control input of the second multiplexer 15 and to the input of the zeroing unit. This unit generates a zero reset signal for the first and second drives.

Claims (1)

The invention The device for correction of color-difference blocks in the coding device of the SECAM system, contains a predistortion block and a signal limiting block, which is characterized in that, in order to improve the accuracy of the correction, digital-analog and analog-to-digital converters are inserted into it, This video signal limiting unit contains the first, second and third comparators, the first and second multiplexers, the first and second computing units, the first and the second accumulator, the decoder and the zero unit, the output of the predistortion block connected to the input of the analog-digital converter, and the output of the analog-digital converter connected to the first 0 information input of the first comparator, to the first information input of the first computing unit, to the first information input of the second computing unit, to the first information input of the second comparator, to the first information input of the second multiplexer, the first output of the first comparator is connected to the first control input of the first multiplexer and to the first 0 to the input of the decoder, the second output of the first comparator is connected to the first input of the zeroing unit, the third output of the first comparator is connected to the second control input of the first multiplexer, 5 to the second input of the decoder, the output of the first multiplexer is connected to the second information input of the second comparator, to the second input of the first computing unit, to the second input of the second computing unit, and to the second input of the second multiplexer, information inputs of the first and second drives are respectively connected to the first and second outputs the second computing unit, the outputs of the first and second 5 accumulators are connected respectively to the first and second information inputs of the third comparator, the first and second outputs of the third comparator are connected respectively to the third and fourth inputs of the decoder, the first output of the second comparator is connected to the control input of the first computing unit, with the first control the first input of the accumulator and the fifth input of the decoder, 5, the second output of the second comparator is connected to the control input of the second computing unit, the first control bypass of the second accumulator and the sixth input of the decoder, the output of the decoder of the key 0 to the control output of the second multiplexer and the third input of the zeroing unit, the output of the zeroing unit is connected to the second control the input of the first accumulator and the second control input 5 of the second accumulator, the output of the second multiplexer is the output of a limiting unit connected to a digital-to-analog converter, the first and second information inputs of the first multiplexer being voltage inputs Enin and Emax, respectively, the second input of the zero block is the input of a constant level, the second information input the first comparator is the input of level O.