SU1510021A1 - Arrangement for automated checking of relay protection and automatic control systems - Google Patents

Abstract

The invention relates to the automatic control of the health of relay protection and automation. The aim of the invention is to improve the accuracy and speed up the control process. Microcomputer 1 connected to timer 6, via interface 2, current channels 7 and voltage 8, switch 12, interface device 13 to the tested relay protection and automatic equipment 14, are applied to influence signals, the value of which is measured via analogue digital converter 15

The information about the parameters of the acting signals is recorded in frequency registers 3, current amplitudes 19 and voltages 26, phase 11. The current signal (voltage) is generated under the influence of pulses coming from clock generator 5 through controlled frequency divider 4 to reversible counter 16 ( 23) enumerating the sine values of the current signal generated by the digital-to-analog converter 18 (25), the filter 21 (28) and the amplifier 22 (29), and the digital-to-analog converter 20 (27) recorded in the permanent memory 17 (24). The phase shift of the voltage relative to the current begins when the phase synchronization logic 10 is triggered by the microcomputer signals and the null organ 9, and the phase angle is determined by the phase register 11 shifted by the pulses of the frequency divider 4 and allowing the reversible counter 23 to operate channel current 7. 1 Il.

Description

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 recorded in frequency registers 3, current amplitudes 19 and voltages 26, phase 11. The current signal (voltage) is generated under the influence of pulses coming from clock generator 5 through controlled frequency divider 4 to reversible counter 16 (23 ), iterating over the current sine values of the current signal generated by the digital-to-analog converter 18 (25), the filter 21 (28) and the amplifier 22 (29), and the analogue converter 20 (27) recorded in the permanent memory 17 (24), The phase shift counting down is relative to current It starts when the logic circuit triggers. Phase 10 synchronization from the micro-computer signals and the zero-organ 9, and the phase angle is determined by the phase register 11 shifted by the pulses of frequency divider 4 and allowing the reversible counter 23 to work in the current channel 7. 1 il.

The invention relates to electrical engineering, in particular, to devices for testing relay protection and automation (RDF) of traction substations of electrified railways.

The purpose of the invention is to improve the accuracy and speed up the control process.

The drawing shows a block diagram of the device.

The device contains a microcomputer 1., an interface of 2 external objects, a frequency register 3, a controlled divider 4

frequencies, generator of 5 clock pulses, programmable timer 6, channels for current P1 and voltage 7 and voltage 8, null organ 9, logical node (: L .10 phase shift synchronization, phase shift register 11, switch 12, block 13 shield 14 relay protection and automation (RZA) and analog-to-digital converter (LCP) 15. Channel 7 current formation contains a reversible counter 16, a fixed unit (FB) 17 sine values, a digital-analog converter (D / A)

18 current value, register

19 current amplitudes, 1SCh 20 current amplitudes, low-pass filter 21, common-mode amplifier 22. The voltage channel contains a reversible counter 23, PZB

24 values of sine, DAC 25 current values of voltage, register 26 voltage amplitude, DAC 27 voltage amplitude, low-pass filter 28 and common-mode amplifier 29.

The device works as follows. .

On a command from the monitor of the microcomputer 1, in accordance with the monitoring program of a certain protection tt, through the interface 2, information is recorded in

frequency register 3, which determines the intermediate frequency at the output of the divider 4 connected to the clock generator 5. Under the action of the pulses coming from the splitter 4, the reversible counter 16 is switched, performing a synchronous search of the addresses of the PZB 17, in which the sin if values of the generated current signal are recorded. The DAC 18 converts the digital code to an analog value, the width of which is determined by the information recorded in the current amplitude register 19 and converted to an analog value in the DAC 20 current amplitude. A stepped current signal passes through a filter 21 and a common-mode power amplifier 22. This completes the formation of a signal in the current channel 7, from the outputs of which the signal goes to the null organ 9 and the switch 12.

The access of microcomputer 1 via interface 2 to the logic node 10 of phase shift synchronization with coincidence with the signal of the zero-organ 9 determines the time of the beginning of the formation of the phase shift, information about which is recorded in the phase shift register 11. The signal from the output of the counter 16 starts the voltage channel 8, the operation of the nodes 23-29 .. of which is similar to the operation of the corresponding nodes of the channel 7 current resistance pattern.

Thus, current signals are generated, and the voltages are shifted, if necessary, by a predetermined angle. When the relay is monitored, signals are sent through the switch 12, the interface unit 13 to the tested relay protection device 14.

The generated signals are measured at each control position, the duration of which is determined by the programmable timer 6. using the ADC 15. When the relay to be tested triggers, the measured values of electrical signals and time intervals are recorded in the computer memory as the triggering values.

If necessary, the proposed device can be completed in a three-phase version, for which the number of identical channels for forming current 7 and voltage 8 is increased to three. The phase shifts B and C (120 and 240 °) are recorded in the TZB of the respective current and voltage channels, the current value of the phase shift of the voltages relative to the current of phase A is formed in a similar way.

Claims (1)

Invention Formula A device for automated testing of relay protection and automation, containing a micro-EMU connected by inputs and outputs to a programmable timer and external interface, the outputs of which are connected respectively to the inputs of the frequency register, the controlled frequency divider, the current and voltage signaling channels and the first input the switch, the first output of which is connected to the first input of the interface of external objects, the second and third inputs of the controlled frequency divider are connected respectively to the outputs regis The trap frequency and clock generator, the second output and the input of the switch are intended to be connected through the interface unit to the input and output of the tested relay protection and automation unit, which, in order to improve the accuracy and speed up the monitoring process channels to form current signals and 0 five 0 the voltages are in the form of a series-connected reversing counter, a persistent storage block of sine values of the signal, a digital-analog converter of the current or voltage, a low-pass filter, an in-phase amplifier, while the outputs of the reversible counters are combined and connected to the output of the controlled frequency divider and to the first input of the phase shift register, the output of which is connected to the second input of the reverse voltage channel counter, inputs of the current amplitude register, the second inputs of the register with phase, voltage amplitude register, the first input of the phase shift synchronization unit are connected to the corresponding outputs of the external objects interface, the current shaping channel also includes series-connected current amplitude register and digital-to-analog current amplitude converter, the output of which is connected to the second input of the digital-to-analog converter Kyniero value current, the voltage shaping channel also includes a permanently connected ampere voltage register and a digital-to-analog converter Voltage amplitude, the output of which is connected to the second input of a digital-to-analog converter of the current voltage, the first output of the common-mode current channel amplifier is connected through a serially connected zero-organ and the phase shift synchronization unit to the second output of the common-mode current channel amplifier through an analog -digital converter is connected to the third input of the interface of external objects and to the second input of the switch, the third input of which is connected to the output of the common-mode amplifier to Nala voltage and a second input of the analog-to-digital converter. five five 0 five