SU1488854A1 - DEVICE FOR READING INFORMATION FROM THE PERFORMER - Google Patents

Description

FIELD: computing2.

technology and can be used to enter information from perforating media. In order to increase the readability of the device, a memory block, triggers, pulse shapers, a counter, a register, a switch, a comparator, AND elements and a pulse distributor are added to the device, which determine the type of arrays and format independently of information codes, as well as its fixation . 2 Il.

The invention relates to computing and can be used to enter information from perforating media.

The aim of the invention is to increase the reliability of reading.

Nafig 1 shows a functional diagram of the device; in figure 2. functional diagram of the pulse distributor.

The device contains a block 1 of photoelectric converters, the first block 2 amplifiers, the second block 3 amplifiers, switch 4, the first register 5, the first, second and third triggers 6-8, the first, second, third, fourth, fifth, sixth, seventh and eighth elements And 9-16, the first, second, third and fourth elements OR 17-20, the distributor 21 control pulses, the first and second formers 22 and 23 pulses, the delay element 24, the decoder 25, the first and second counters 26-27, the fourth trigger 28 ,

the second register 29, the second switch 30, the comparison block 31, the control block 32, the decoder 33, the memory block 34.

The distributor 21 control pulses contains the counter 35, the decoder 36, the switch 37, consisting of a group of elements And 38, the elements NOT 39 and 40.

The device works as follows.

In the initial position (Fig. 1), registers 5 and 29, counters 26, 27 and 35, triggers 7, 8, 6 and 28 are cleared. The initial setup clutch is not shown) “Pekh red launch of the perfume carrier sets the information recording mode to memory block 34, This input device mode setting potential low signal, which closes the switch 30, the element 16 and sets the recording information at the input I / N. block 34 of memory. The launch of the tape is made with a pulse by the “Start” signal, ko-3 and „„ 1488854 A1

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1488854

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The second sets the trigger 6 to one state. The trigger 6 by the direct output signal issues a “Start” command through the block 3 amplifiers to the output of the device (to the photo reader drive circuit). In addition, the trigger 6 opens the element And 9, prepared for opening the inverse signal of the trigger 7, and the element 9 opens the switch 4 to receive information from the media in the register 5. Information from the media is read line by line by block 1 and through the block 2 of amplifiers and switch 4 written in register 5. Each information line of the punched carrier contains information punching (digits) and punching of a sync track - a sync bit. Blank lines contain only 20, for synchronization discharge punching. On the leading edge of the synchronization discharge of each read line, the shaper 22 generates a pulse, which polls the element 11. Since 25, the trigger 7 is in the zero position, the element 11 remains

closed. The information bits of the read line are fed to the element OR 18, along the cut of the output signal of which the driver 23 generates a pulse that sets the triggers 7 and 8 in one state. The trigger 7 closes the AND 1 1 element to open through the AND 9 element. The trigger 8 sends a signal of permission of the account on the counter 35 of the distributor 21 and starts it. The valve 21 operates cyclically and generates four pulse signals in a cycle using a decoder 36, the pulse selection is provided by the switch 37 and the inverse clock pulses of the HE 40 element. The last quarter of the valve distributor in this cycle zeroes the trigger 8, which in zero position stops the counter 35. Information read line written in register 5, is fed to the information inputs of the memory block 34 and the inputs of the block 32 parity, the decoder 33 empty lines and the inputs of the element OR 19. Block 32 of It reads the read information to parity and, with the correct parity, issues an enable signal to the input element And 14. The decoder 33 detects empty lines and, when reading an empty line, outputs a signal to the input element And 12. The first group of inputs of the element OR 19 receives only information bits (without synchronization bit) of the register 5. The signal from the output of the element OR 19 is fed to the zero inputs of the counter 26, trigger 28. If there are 33 empty lines in the register 5 of the information line, the decoder does not generate signals, the AND 12 element remains closed The test and the counter 26 and the trigger 28 remain in the zero state. The trigger 28 prepares the element 13 for opening. In this cycle, the valve 21 sequentially polls the elements 12 and 13 and 15 and 14. The signal from the output of the element And 13 through the element OR 20 is fed to the control input C5 of the sampling unit 34 of the memory and recording of the register information 5 at the address specified by the counter 27. At the end of the recording, the pulse from the output of the element OR 20 through the delay element 24 increases the contents of the counter 27 by one and sets the address of the next cell of the memory block 34. Then, the signal from the output of the And 14 element clears the trigger 7, the register 5 and returns them to the initial state for receiving the information of the next line. The last pulse of the distributor 21 in the cycle polls the element And 10, resets the trigger 8 and disables the distributor. This completes the processing cycle of a single perfader line.

In case the string information is read with a failure · '- irregular parity, block 32 generates an error signal, which closes the element And 14. At the same time, c. this cycle, the third pulse of the distributor 21 does not reset the trigger 7 and the register 5, and the element 11 is prepared for opening. When reading the next line, the pulse of the shaper 22 through the elements] 1 and 17 resets the trigger 6, which gives the signal "Stop", removes the signal "Start" and stops the movement of the perfume carrier.

In case there is an empty line in register 5, decoder 33 generates a signal and prepares element 12 for opening. After launching distributor 21, its first impulse through element And 12 sets Trig ^{5 1 her} 28 to one state and increases the contents of counter 26 by one . The trigger 28 closes the element And 13 and thereby prohibits the recording of empty line information in the memory block 34. In addition, the predetermined minimum number of empty lines is a criterion for determining the end of an array format readable from a puncture carrier, since a certain number of empty lines usually follow the last data line. After reading the entire array, this number is accumulated in the counter 26 and decoded by the decoder 25. If the empty string is random or, for example, a sign of the Russian register in multi-register codes such as MTK-2, then the information line following it through the element OR 19 resets the counter 26 and the trigger 28 and the formation of a signal about the end of the array does not occur. Upon completion of reading the array of information and accumulation in the counter 26 of a predetermined number of blank lines read, the decoder 25 generates a signal preparing the element 15 for opening.

In the current cycle of operation, the dispenser 21 uses the third pulse through the AND 15, OR OR 17 elements to reset the trigger 6, stops the movement of the media carrier and rewrites the contents of the address counter 27 into the register 29, i.e. Register 29 stores the final address of the read array of information. The trigger 6 in the zero position prepares the opening element AND 10 and the last pulse of the distributor 21 in the current cycle through the element AND 10 zeroing the counter 27 and through the element OR 19 - the counter .26 and the trigger 28. This completes the process of reading information from the recording medium and writing it in block 34 of memory. After stopping the media carrier, the device enters the mode of reading information from memory 34 by sending a high level signal to the read / read mode setting input. This signal opens the switch 30, the element And 16 and sets the input I / K of the memory block 34 reading mode. Reading pulses are fed from an external device through the OR element 20 to the C5 input of the memory unit 34 and, via the delay element 24, successively increase the contents of the ad488854 6

national counter 27, which determines the addresses of the readable cells of the memory block 34. The state of the counter 27 and the register 29 through the switch 30 is continuously compared by the comparison unit 31. When the contents of the counter 27 and the register 29 coincide, the block 31 issues a signal about the end of the array

'to an external device that stops the flow of reading pulses.

Thus, the formation of the sign of the end of the array in the process of reading information from

₁₅ perforating media and writing it into memory, in the process of reading information from memory without using special characters or pointers, which allows you to reliably determine formats

20 arrays, extends the information capabilities of the codes used to represent information. This is achieved by introducing into the device a memory block, an amplifier block, two trigger 25, two pulse formers, a distributor, a counter, a register, a switch, a comparator, seven elements I.

thirty

Claims (1)

Claim A device for reading information from perforating medium containing a block of photoelectric converters connected to the first block of amplifiers, the outputs of which are connected to information inputs of the switch, the outputs of which are connected to the corresponding installation inputs of the first register, the outputs 40 of the first register are connected to the corresponding inputs of the control unit, the first and second decoders, first, second, third and fourth elements OR, first element AND, first 42 and second triggers, first counter, delay element, differing Owing to the fact that, in order to increase the readability, it contains a memory block, a second 2D amplifier block, third and fourth triggers, first and second pulse drivers, a control distributor of pulses, a second counter, a second register, a second switch, a comparator, and a second , third, fourth, fifth, sixth, seventh and eighth elements And, the outputs of the first register are connected to the corresponding inputs of the first decryption35 1488854 eight 7 ‘ and the information inputs of the memory block and the third element OR, the setup input of the first trigger is the Start input of the device, the Reset input of the first trigger is connected to the output of the first OR element, and the direct and inverse outputs are connected to the first and second inputs, respectively Elements And with the corresponding inputs of the second block of amplifiers, the outputs of which are respectively the outputs, "Start" and "Stop" of the device, synchronizing the output of the first block of amplifiers is connected to the input of the first imperial driver The output of which is connected to the first input of the third element AND, the direct and inverse outputs of the second trigger are connected respectively to the second inputs of the first and third elements AND, the output of the first element AND is connected to the control input of the switch, the output of the third element AND is connected to the first input of the first element OR , the information outputs of the first block of amplifiers are connected to the corresponding inputs of the second element OR, the input of the second pulse shaper is connected to the output of the second element OR, and the output is connected to the input inputs s of the second and third triggers, the input of the distributor of control pulses is connected to the output of the third trigger, and the outputs are connected respectively to the first input of the fourth element I, to the first input of the fifth element I, to the first inputs of the sixth and seventh elements I, to the input "Reset" of the third trigger and with the second input of the second element AND, the first input of the fourth element OR is the input "Reading" of the device, the second input is connected to the output of the fifth element I, and the output is connected to the input of the memory block sample and, through a delay element, to the counting input of the second counter, the outputs of which are connected to the information inputs of the second register, to the inputs of the first group of the comparison unit and to the address inputs of the memory block, the output of the second element And is connected to the input "Reset" of the second counter and to the input of control pulses of the third element OR, the second input of the fourth element And is connected to the output of the first decoder, and the output - to the counting input of the first counter As well as with the setup input of the fourth trigger, the output of the third element OR is connected to the "Reset" inputs of the first counter and the fourth trigger, the inverse output of which is connected to the second input of the fifth element And, the inputs of the second decoder are connected to the corresponding outputs of the first counter, and the output to the second input the seventh element And, the output of which is connected to the second input of the first element OR, and to the synchronizing input of the second register, the control input of the switch is connected to the input of setting the operation mode of the memory block, with the first The eighth element of the eighth element is the input for setting the device's mode of operation, the information inputs of the switch are connected to the outputs of the second register, the outputs are connected to the inputs of the second group of the comparator, the second input of the eighth element is connected to the output of the comparator, and the output is the synchronizing output of the device , the outputs of the memory block are informational outputs of the device. 1488854 figure 1 1488854 Vyh1 _at Howl 2 _ν —_— & yl $ MUCH θ—- ^1- FIG. 2