SU1486991A1 - DEVICE FOR PROGRAM • CONTROLS - Google Patents

Description

The invention relates to automation and computing technology and can be used to control a specialized computing device operating in real time or as a controller for an automated control system. The purpose of the invention is to expand the scope of application and improve the device's performance. This goal is achieved by

The invention relates to automation and computing technology and can be used to control a specialized computing device operating in real time, or as a controller for automated process control systems.

The purpose of the invention is to expand the scope of application and increase the speed of the device.

The essence of the invention lies in providing the possibility of combining in one device the simultaneous

that a second decoder, a second pulse counter, a second monostable multivibrator, a fourth, fifth, and sixth AND elements, and a start trigger are introduced into a device comprising a clock generator, an excitation signal generation unit, a register, a first decoder, a multiplexer, a first pulse counter, first and second control triggers, a delay element, a first monostable multivibrator, an OR element, first, second, and third AND elements, a group of AND elements. The introduction of new elements makes it possible to achieve the combination of the simultaneous setting of both the duration of the working cycle and the duration of the pause in a single device, which is especially important for inertial control objects, as well as to expand the set of implemented fragments of control signals and to increase the speed of the device by eliminating idle cycles. 3 fig.

giving both the duration of the working cycle and the duration of the yauza, that

especially important for inertial control objects, as well as expanding the set of implemented fragments of control signals and increasing the speed of response by eliminating idle cycles,

Fig. 1 shows a block diagram of the device; Figs. 2 and 3 are diagrams explaining its operation.

The device contains a generator 1

sync pulses, block 2 for generating excitation signals, register 3,

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the first 4 and second 5 decoders, multiplexer 6, first 7 and second 8 counters, first 9 and second 10 control triggers, start trigger 11, delay element 12, first 13 and second 14 single-shot multivibrators, OR element 15 and AND elements 16-22,

Block 2 for generating excitation signals Serves to provide information about the upcoming operating cycle, i.e., to set the operating modes of the devices controlled by the software control device.

Register 3 is designed to receive, store, and output information received from block 2. It distributes it into six information fields, which carry information about the next operating cycle, the control object number, the operating cycle pattern, the pause, the operating cycle code, and the reset of trigger 1 1 to zero, respectively.

The first decoder 4 converts the positional code arriving at its data inputs into a unitary code. Consequently, an enable signal appears at one of the first inputs of the AND gates of group 22.

The second decoder 5 performs two functions, since two of its outputs are used - unity 5.2 and zero 5.1. One of its outputs (5.2) serves to form a signal at the counting input of the second counter 8, and both together - to start the second trigger 10. Multiplexer 6 serves to select control fragments from their entire set under the action of control signals coming from the third group of outputs of register 3.

The first counter 7 is intended for storing and recalculating information about the duration of the working cycle, the second counter 8 is intended for storing information about the duration of the pause.

The first control trigger 9 serves to permit or request at the appropriate moments of time the passage of signals through the AND elements 16, 17, 18 and 21, as well as to permit or prohibit the strobing of the multiplexer 6, the second control trigger 10 (auxiliary trigger) - for the timely switching of the device to pause processing, to permit or prohibit the strobing of the multiplexer 6 and the passage of signals through the AND elements 16 and 20.

Trigger 11 for starting the device using the sync pulse generator 1.

The device works as follows.

There are two^ modes of operation: the working mode and the pause mode,

1. Working stroke mode.

When the power is turned on, the control trigger 9 and counters 7 and 8 are reset to zero, and upon the “Start” signal, the start trigger 11 is set to the single state. From the inverse output of the control trigger 9, an enabling signal for the passage of clock pulses is sent to the inputs of elements I16 and 17, and a prohibiting signal is sent to the inputs of elements I18 and 21. The first clock pulse from the output of the clock pulse generator 1 passes through element I16 (the second control trigger 10 is in the zero state) and records in register 3 the information prepared by block 2 for generating excitation signals. Information from the outputs of register 3 is sent to the inputs of block 2 and the first decoder 4, which determines the output control signals, to the address inputs of multiplexer 6, the information inputs of the first and second counters 7 and 8, and the reset input of the third start trigger 11 to zero.

The first sync pulse, delayed by the time of setting the outputs of register 3 by delay element 12, through the open second AND element 17 and the first monostable multivibrator 13, changes the state of the first control trigger 9 at the Setup input to one and writes codes to counters 7 and 8 via the control inputs, determining the duration of the working cycle and pause, respectively. Changing the states of the terminals of the first control trigger 9 leads to the prohibition of the passage of subsequent sync pulses through the first 16 and second 17 AND elements and allows the passage of pulses through the first inputs through the third 18 and sixth 21 AND elements. Therefore, ^sync pulses pass through the third AND element 18 to the subtracting input of the first counter 7. The sync pulses subtract the code written to the first counter 7 to zero, while at zero5 1486991

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left output 5 „ 1 of the second decoder, to**· ra 5, and consequently at the third input of the third AND element 18, as well as at the information input of the first 5 control trigger 9, the state "0" is maintained. At the output of the multiplexer 6, a signal appears, selected by the code at the information inputs of the multiplexer 6 and the initial connection of the corresponding information inputs of the multiplexer 6 to the outputs of the first counter 7, the unit output 5.2 of the second decoder 5 and the output of the delay element 12. 15

The signal from the output of multiplexer 6 modulates the output control signals via the second inputs of the group of AND elements 22.

2. Pause mode. 20

When the clock pulses subtract the code written into the first counter 7 to one, the signal "0" will be stored at the zero output 5.1 of the second decoder 5, which allows the clock pulses to pass through the third element AND18 via the third input, and consequently subtracts the code in the first counter 7 to zero. At the unit output 5„2 of the second decoder 5, and 30, respectively, and at the second input of the fourth element AND19 and at the information input of the first control trigger 9, the signal "1" appears, which, on the falling edge of the next 35 synchronization pulse from the output of element AND19, sets the control trigger 9 to zero, allowing the beginning of a new cycle. The same synchronization pulse on the falling edge sets the control trigger 10 to one. At the same time, at the third input of element AND20, the signal "1" appears, which allows the passage of synchronization pulses through it. The synchronization pulses subtract the code written in counter 8 to zero, while at the output of element OR 15, and consequently at the first inputs of elements AND19 and 20 and at the input of monostable multivibrator 14, the state "1" is maintained. In this case, since strobing of the multiplexer is prohibited 6, the device processes the pause. When the clock pulses subtract the code written to counter 8 to zero, a "0" signal appears at the output of OR element 15, and consequently at the first inputs of AND elements 19 and 20. The falling edge of this signal triggers monostable multivibrator 14, and therefore, control trigger 10 goes to the zero state. The signal from _{the first} inverse output of control trigger 10 enables the pulses to pass through AND element 21 via the second input, therefore, strobing of multiplexer 6 is enabled. In addition, a signal from this same output via the third input of AND element 16 and the third input of AND element 17 enables the start of a new cycle.

Thus, by writing a code to counters 7 and 8, output control signals of variable duration, a series of control pulses, and a pause can be obtained at the outputs of the AND element group 22. If, in the next clock cycle, codes are written to counters 7 and 8, and the information input corresponding to the code at the control inputs of multiplexer 6 is connected to the output of the delay element, then a control signal equal in duration to the period of the clock pulses of generator 1 is obtained at the corresponding output of the AND element group. In addition, control signals can be obtained in the form of a series of pulses, or can be clock pulses equal in duration to the time of subtracting the counter code to zero.

The operation of the device with a variable cycle duration, a multiple of the minimum required execution time of any cycle (it is from this condition that the frequency of the generator's clock pulses is selected), allows for an increase in the speed of the device, and the receipt of output control signals in the form of a series of pulses synchronized with the generator's clock pulses significantly expands the class of problems it can solve.

Claims (1)

Claim A device for programmed control, comprising a clock generator, a driver generation unit, a register, a first decoder, a multiplexer, a first pulse counter, a first control trigger, a delay element, a first one-shot, an OR element, a first, second, and third And elements the outputs of which are the group of information outputs of the mouth ⁷ 14869 " The output of the sync pulse generator is connected to the first input of the first element I and the input of the delay element whose output is connected ς by the corresponding information input of the multiplexer, the first input of the third element And and the first input of the second element I, whose output is connected to the start input of the first one of the new vibrator, the output of which is connected to the installation input of the first control trigger and the synchronous input of the first pulse counter, the information outputs of which are connected to the corresponding information inputs a multiplexer, the output of which is connected to the first inputs of elements AND groups, the second inputs of which are connected to the corresponding outputs of the first decoder, the information inputs of which are connected to the second group of information outputs of the register, the first group of information outputs of which are connected to address inputs ·? 25 of the excitation signal generation unit, whose information outputs are connected to the information outputs of the register, the direct output of the first control trigger is connected to the second 30 input of the third element This And, inverse output of the first control trigger is connected to the second input of the second element And and the second input of the first element And, the output of which is connected to the 35 control input of the register entry, characterized in that, in order to expand the scope and improve the performance of the device, The second decoder is 40 rator, the second pulse counter, the second control trigger, the trigger trigger, the second one-shot, the fourth, fifth and sixth elements And, the output of which is connected to the control input of the multiplexer, whose address inputs connected to the third group of informational outputs of the register, the fourth and fifth groups of information outputs connected respectively with > 1 8 information inputs of the first and second pulse counters, the information output of the register is connected to the K-input of the start trigger, the installation input of which is the control input of the device, and the direct output is connected to the control input of the clock generator, the first output of the second decoder is And, the output which is connected to the first input of the fourth element And and the input of the counting back of the first pulse counter, the information outputs of which are connected to the inputs of the second decoder the second output of which is connected to the second input of the fourth element I and the inverse information input of the first control trigger, the direct output of which is connected to the first input of the sixth element I, the information outputs of the second pulse counter are connected to the inputs of the element OR whose output is connected to the first input of the fifth element AND , the third input of the fourth element I and the start input of the second one-oscillator, the output of which is connected to the 8-input of the second control trigger, the K-synchronous input of which is grounded, and the inverse output connect n with the third input of the second element And corresponding to the information input of the multiplexer, the second input of the sixth element And and the third input of the first element And, the output of the first one-oscillator is connected to, the control input of the second impulse counter, the input of the return count of which is connected to the output of the fifth element And and the third outputs of which are connected respectively with the output of the delay element and the direct "output of the second control trigger, the output of the fourth element I is connected to the synchronous installation input, synchronous input m second flip-flop and the clock control of the first control flip-flop. 1486991 1486991